1 #include <dt-bindings/input/input.h>
2 #include "tegra30.dtsi"
5 * This file contains common DT entry for all fab version of Cardhu.
6 * There is multiple fab version of Cardhu starting from A01 to A07.
7 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
8 * A02 will have different sets of GPIOs for fixed regulator compare to
9 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
10 * compatible with fab version A04. Based on Cardhu fab version, the
11 * related dts file need to be chosen like for Cardhu fab version A02,
12 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
13 * tegra30-cardhu-a04.dts.
14 * The identification of board is done in two ways, by looking the sticker
15 * on PCB and by reading board id eeprom.
16 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
17 * number is the fab version like here it is 002 and hence fab version A02.
18 * The (downstream internal) U-Boot of Cardhu display the board-id as
20 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
21 * In this Fab version is 02 i.e. A02.
22 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
23 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
28 model = "NVIDIA Tegra30 Cardhu evaluation board";
29 compatible = "nvidia,cardhu", "nvidia,tegra30";
32 rtc0 = "/i2c@7000d000/tps65911@2d";
33 rtc1 = "/rtc@7000e000";
39 stdout-path = "serial0:115200n8";
43 reg = <0x80000000 0x40000000>;
46 pcie-controller@00003000 {
49 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
50 avdd-pexb-supply = <&ldo1_reg>;
51 vdd-pexb-supply = <&ldo1_reg>;
52 avdd-pex-pll-supply = <&ldo1_reg>;
53 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
54 vddio-pex-ctl-supply = <&sys_3v3_reg>;
55 avdd-plle-supply = <&ldo2_reg>;
58 nvidia,num-lanes = <4>;
62 nvidia,num-lanes = <1>;
67 nvidia,num-lanes = <1>;
76 nvidia,panel = <&panel>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&state_default>;
85 state_default: pinmux {
87 nvidia,pins = "sdmmc1_clk_pz0";
88 nvidia,function = "sdmmc1";
89 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
90 nvidia,tristate = <TEGRA_PIN_DISABLE>;
93 nvidia,pins = "sdmmc1_cmd_pz1",
98 nvidia,function = "sdmmc1";
99 nvidia,pull = <TEGRA_PIN_PULL_UP>;
100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
103 nvidia,pins = "sdmmc3_clk_pa6";
104 nvidia,function = "sdmmc3";
105 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106 nvidia,tristate = <TEGRA_PIN_DISABLE>;
109 nvidia,pins = "sdmmc3_cmd_pa7",
114 nvidia,function = "sdmmc3";
115 nvidia,pull = <TEGRA_PIN_PULL_UP>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 nvidia,pins = "sdmmc4_clk_pcc4",
121 nvidia,function = "sdmmc4";
122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
126 nvidia,pins = "sdmmc4_dat0_paa0",
134 nvidia,function = "sdmmc4";
135 nvidia,pull = <TEGRA_PIN_PULL_UP>;
136 nvidia,tristate = <TEGRA_PIN_DISABLE>;
139 nvidia,pins = "dap2_fs_pa2",
143 nvidia,function = "i2s1";
144 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
145 nvidia,tristate = <TEGRA_PIN_DISABLE>;
148 nvidia,pins = "drive_sdio3";
149 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
150 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
151 nvidia,pull-down-strength = <46>;
152 nvidia,pull-up-strength = <42>;
153 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
154 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
157 nvidia,pins = "uart3_txd_pw6",
161 nvidia,function = "uartc";
162 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
163 nvidia,tristate = <TEGRA_PIN_DISABLE>;
173 compatible = "nvidia,tegra30-hsuart";
181 panelddc: i2c@7000c000 {
183 clock-frequency = <100000>;
188 clock-frequency = <100000>;
193 clock-frequency = <100000>;
195 /* ALS and Proximity sensor */
197 compatible = "isil,isl29028";
199 interrupt-parent = <&gpio>;
200 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
204 compatible = "nxp,pca9546";
205 #address-cells = <1>;
208 reset-gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
214 clock-frequency = <100000>;
219 clock-frequency = <100000>;
222 compatible = "wlf,wm8903";
224 interrupt-parent = <&gpio>;
225 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
231 micdet-delay = <100>;
232 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
236 compatible = "ti,tps65911";
239 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
240 #interrupt-cells = <2>;
241 interrupt-controller;
243 ti,system-power-controller;
248 vcc1-supply = <&vdd_ac_bat_reg>;
249 vcc2-supply = <&vdd_ac_bat_reg>;
250 vcc3-supply = <&vio_reg>;
251 vcc4-supply = <&vdd_5v0_reg>;
252 vcc5-supply = <&vdd_ac_bat_reg>;
253 vcc6-supply = <&vdd2_reg>;
254 vcc7-supply = <&vdd_ac_bat_reg>;
255 vccio-supply = <&vdd_ac_bat_reg>;
259 regulator-name = "vddio_ddr_1v2";
260 regulator-min-microvolt = <1200000>;
261 regulator-max-microvolt = <1200000>;
266 regulator-name = "vdd_1v5_gen";
267 regulator-min-microvolt = <1500000>;
268 regulator-max-microvolt = <1500000>;
272 vddctrl_reg: vddctrl {
273 regulator-name = "vdd_cpu,vdd_sys";
274 regulator-min-microvolt = <1000000>;
275 regulator-max-microvolt = <1000000>;
280 regulator-name = "vdd_1v8_gen";
281 regulator-min-microvolt = <1800000>;
282 regulator-max-microvolt = <1800000>;
287 regulator-name = "vdd_pexa,vdd_pexb";
288 regulator-min-microvolt = <1050000>;
289 regulator-max-microvolt = <1050000>;
293 regulator-name = "vdd_sata,avdd_plle";
294 regulator-min-microvolt = <1050000>;
295 regulator-max-microvolt = <1050000>;
298 /* LDO3 is not connected to anything */
301 regulator-name = "vdd_rtc";
302 regulator-min-microvolt = <1200000>;
303 regulator-max-microvolt = <1200000>;
308 regulator-name = "vddio_sdmmc,avdd_vdac";
309 regulator-min-microvolt = <3300000>;
310 regulator-max-microvolt = <3300000>;
315 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
316 regulator-min-microvolt = <1200000>;
317 regulator-max-microvolt = <1200000>;
321 regulator-name = "vdd_pllm,x,u,a_p_c_s";
322 regulator-min-microvolt = <1200000>;
323 regulator-max-microvolt = <1200000>;
328 regulator-name = "vdd_ddr_hs";
329 regulator-min-microvolt = <1000000>;
330 regulator-max-microvolt = <1000000>;
336 temperature-sensor@4c {
337 compatible = "onnn,nct1008";
339 vcc-supply = <&sys_3v3_reg>;
340 interrupt-parent = <&gpio>;
341 interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
345 compatible = "ti,tps62361";
348 regulator-name = "tps62361-vout";
349 regulator-min-microvolt = <500000>;
350 regulator-max-microvolt = <1500000>;
360 spi-max-frequency = <25000000>;
362 compatible = "winbond,w25q32";
364 spi-max-frequency = <20000000>;
370 nvidia,invert-interrupt;
371 nvidia,suspend-mode = <1>;
372 nvidia,cpu-pwr-good-time = <2000>;
373 nvidia,cpu-pwr-off-time = <200>;
374 nvidia,core-pwr-good-time = <3845 3845>;
375 nvidia,core-pwr-off-time = <0>;
376 nvidia,core-power-req-active-high;
377 nvidia,sys-clock-req-active-high;
388 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
389 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
390 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
405 vbus-supply = <&usb3_vbus_reg>;
409 backlight: backlight {
410 compatible = "pwm-backlight";
412 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
413 power-supply = <&vdd_bl_reg>;
414 pwms = <&pwm 0 5000000>;
416 brightness-levels = <0 4 8 16 32 64 128 255>;
417 default-brightness-level = <6>;
421 compatible = "simple-bus";
422 #address-cells = <1>;
426 compatible = "fixed-clock";
429 clock-frequency = <32768>;
434 compatible = "chunghwa,claa101wb01", "simple-panel";
435 ddc-i2c-bus = <&panelddc>;
437 power-supply = <&vdd_pnl1_reg>;
438 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
440 backlight = <&backlight>;
444 compatible = "simple-bus";
445 #address-cells = <1>;
448 vdd_ac_bat_reg: regulator@0 {
449 compatible = "regulator-fixed";
451 regulator-name = "vdd_ac_bat";
452 regulator-min-microvolt = <5000000>;
453 regulator-max-microvolt = <5000000>;
457 cam_1v8_reg: regulator@1 {
458 compatible = "regulator-fixed";
460 regulator-name = "cam_1v8";
461 regulator-min-microvolt = <1800000>;
462 regulator-max-microvolt = <1800000>;
464 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
465 vin-supply = <&vio_reg>;
468 cp_5v_reg: regulator@2 {
469 compatible = "regulator-fixed";
471 regulator-name = "cp_5v";
472 regulator-min-microvolt = <5000000>;
473 regulator-max-microvolt = <5000000>;
477 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
480 emmc_3v3_reg: regulator@3 {
481 compatible = "regulator-fixed";
483 regulator-name = "emmc_3v3";
484 regulator-min-microvolt = <3300000>;
485 regulator-max-microvolt = <3300000>;
489 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
490 vin-supply = <&sys_3v3_reg>;
493 modem_3v3_reg: regulator@4 {
494 compatible = "regulator-fixed";
496 regulator-name = "modem_3v3";
497 regulator-min-microvolt = <3300000>;
498 regulator-max-microvolt = <3300000>;
500 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
503 pex_hvdd_3v3_reg: regulator@5 {
504 compatible = "regulator-fixed";
506 regulator-name = "pex_hvdd_3v3";
507 regulator-min-microvolt = <3300000>;
508 regulator-max-microvolt = <3300000>;
510 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
511 vin-supply = <&sys_3v3_reg>;
514 vdd_cam1_ldo_reg: regulator@6 {
515 compatible = "regulator-fixed";
517 regulator-name = "vdd_cam1_ldo";
518 regulator-min-microvolt = <2800000>;
519 regulator-max-microvolt = <2800000>;
521 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
522 vin-supply = <&sys_3v3_reg>;
525 vdd_cam2_ldo_reg: regulator@7 {
526 compatible = "regulator-fixed";
528 regulator-name = "vdd_cam2_ldo";
529 regulator-min-microvolt = <2800000>;
530 regulator-max-microvolt = <2800000>;
532 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
533 vin-supply = <&sys_3v3_reg>;
536 vdd_cam3_ldo_reg: regulator@8 {
537 compatible = "regulator-fixed";
539 regulator-name = "vdd_cam3_ldo";
540 regulator-min-microvolt = <3300000>;
541 regulator-max-microvolt = <3300000>;
543 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
544 vin-supply = <&sys_3v3_reg>;
547 vdd_com_reg: regulator@9 {
548 compatible = "regulator-fixed";
550 regulator-name = "vdd_com";
551 regulator-min-microvolt = <3300000>;
552 regulator-max-microvolt = <3300000>;
556 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
557 vin-supply = <&sys_3v3_reg>;
560 vdd_fuse_3v3_reg: regulator@10 {
561 compatible = "regulator-fixed";
563 regulator-name = "vdd_fuse_3v3";
564 regulator-min-microvolt = <3300000>;
565 regulator-max-microvolt = <3300000>;
567 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
568 vin-supply = <&sys_3v3_reg>;
571 vdd_pnl1_reg: regulator@11 {
572 compatible = "regulator-fixed";
574 regulator-name = "vdd_pnl1";
575 regulator-min-microvolt = <3300000>;
576 regulator-max-microvolt = <3300000>;
580 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
581 vin-supply = <&sys_3v3_reg>;
584 vdd_vid_reg: regulator@12 {
585 compatible = "regulator-fixed";
587 regulator-name = "vddio_vid";
588 regulator-min-microvolt = <5000000>;
589 regulator-max-microvolt = <5000000>;
591 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
593 vin-supply = <&vdd_5v0_reg>;
598 compatible = "nvidia,tegra-audio-wm8903-cardhu",
599 "nvidia,tegra-audio-wm8903";
600 nvidia,model = "NVIDIA Tegra Cardhu";
602 nvidia,audio-routing =
603 "Headphone Jack", "HPOUTR",
604 "Headphone Jack", "HPOUTL",
609 "Mic Jack", "MICBIAS",
612 nvidia,i2s-controller = <&tegra_i2s1>;
613 nvidia,audio-codec = <&wm8903>;
615 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
616 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
619 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
620 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
621 <&tegra_car TEGRA30_CLK_EXTERN1>;
622 clock-names = "pll_a", "pll_a_out0", "mclk";
626 compatible = "gpio-keys";
630 interrupt-parent = <&pmic>;
632 linux,code = <KEY_POWER>;
633 debounce-interval = <100>;
638 label = "Volume Down";
639 gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
640 linux,code = <KEY_VOLUMEDOWN>;
641 debounce-interval = <10>;
646 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
647 linux,code = <KEY_VOLUMEUP>;
648 debounce-interval = <10>;