arch/arm/boot/dts/tegra30-cardhu.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/thermal/thermal.h>
   4 #include "tegra30.dtsi"
   5 #include "tegra30-cpu-opp.dtsi"
   6 #include "tegra30-cpu-opp-microvolt.dtsi"
   7
   8 /**
   9  * This file contains common DT entry for all fab version of Cardhu.
  10  * There is multiple fab version of Cardhu starting from A01 to A07.
  11  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
  12  * A02 will have different sets of GPIOs for fixed regulator compare to
  13  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
  14  * compatible with fab version A04. Based on Cardhu fab version, the
  15  * related dts file need to be chosen like for Cardhu fab version A02,
  16  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
  17  * tegra30-cardhu-a04.dts.
  18  * The identification of board is done in two ways, by looking the sticker
  19  * on PCB and by reading board id eeprom.
  20  * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
  21  * number is the fab version like here it is 002 and hence fab version A02.
  22  * The (downstream internal) U-Boot of Cardhu display the board-id as
  23  * follows:
  24  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
  25  * In this Fab version is 02 i.e. A02.
  26  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
  27  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
  28  * wide.
  29  */
  30
  31 / {
  32         model = "NVIDIA Tegra30 Cardhu evaluation board";
  33         compatible = "nvidia,cardhu", "nvidia,tegra30";
  34
  35         aliases {
  36                 rtc0 = "/i2c@7000d000/tps65911@2d";
  37                 rtc1 = "/rtc@7000e000";
  38                 serial0 = &uarta;
  39                 serial1 = &uartc;
  40         };
  41
  42         chosen {
  43                 stdout-path = "serial0:115200n8";
  44         };
  45
  46         memory@80000000 {
  47                 reg = <0x80000000 0x40000000>;
  48         };
  49
  50         pcie@3000 {
  51                 status = "okay";
  52
  53                 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
  54                 avdd-pexb-supply = <&ldo1_reg>;
  55                 vdd-pexb-supply = <&ldo1_reg>;
  56                 avdd-pex-pll-supply = <&ldo1_reg>;
  57                 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
  58                 vddio-pex-ctl-supply = <&sys_3v3_reg>;
  59                 avdd-plle-supply = <&ldo2_reg>;
  60
  61                 pci@1,0 {
  62                         nvidia,num-lanes = <4>;
  63                 };
  64
  65                 pci@2,0 {
  66                         nvidia,num-lanes = <1>;
  67                 };
  68
  69                 pci@3,0 {
  70                         status = "okay";
  71                         nvidia,num-lanes = <1>;
  72                 };
  73         };
  74
  75         host1x@50000000 {
  76                 dc@54200000 {
  77                         rgb {
  78                                 status = "okay";
  79
  80                                 nvidia,panel = <&panel>;
  81                         };
  82                 };
  83         };
  84
  85         pinmux@70000868 {
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&state_default>;
  88
  89                 state_default: pinmux {
  90                         sdmmc1_clk_pz0 {
  91                                 nvidia,pins = "sdmmc1_clk_pz0";
  92                                 nvidia,function = "sdmmc1";
  93                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  94                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  95                         };
  96                         sdmmc1_cmd_pz1 {
  97                                 nvidia,pins =   "sdmmc1_cmd_pz1",
  98                                                 "sdmmc1_dat0_py7",
  99                                                 "sdmmc1_dat1_py6",
 100                                                 "sdmmc1_dat2_py5",
 101                                                 "sdmmc1_dat3_py4";
 102                                 nvidia,function = "sdmmc1";
 103                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 104                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 105                         };
 106                         sdmmc3_clk_pa6 {
 107                                 nvidia,pins = "sdmmc3_clk_pa6";
 108                                 nvidia,function = "sdmmc3";
 109                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 110                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 111                         };
 112                         sdmmc3_cmd_pa7 {
 113                                 nvidia,pins =   "sdmmc3_cmd_pa7",
 114                                                 "sdmmc3_dat0_pb7",
 115                                                 "sdmmc3_dat1_pb6",
 116                                                 "sdmmc3_dat2_pb5",
 117                                                 "sdmmc3_dat3_pb4";
 118                                 nvidia,function = "sdmmc3";
 119                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 120                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 121                         };
 122                         sdmmc4_clk_pcc4 {
 123                                 nvidia,pins =   "sdmmc4_clk_pcc4",
 124                                                 "sdmmc4_rst_n_pcc3";
 125                                 nvidia,function = "sdmmc4";
 126                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 127                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 128                         };
 129                         sdmmc4_dat0_paa0 {
 130                                 nvidia,pins =   "sdmmc4_dat0_paa0",
 131                                                 "sdmmc4_dat1_paa1",
 132                                                 "sdmmc4_dat2_paa2",
 133                                                 "sdmmc4_dat3_paa3",
 134                                                 "sdmmc4_dat4_paa4",
 135                                                 "sdmmc4_dat5_paa5",
 136                                                 "sdmmc4_dat6_paa6",
 137                                                 "sdmmc4_dat7_paa7";
 138                                 nvidia,function = "sdmmc4";
 139                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 140                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 141                         };
 142                         dap2_fs_pa2 {
 143                                 nvidia,pins =   "dap2_fs_pa2",
 144                                                 "dap2_sclk_pa3",
 145                                                 "dap2_din_pa4",
 146                                                 "dap2_dout_pa5";
 147                                 nvidia,function = "i2s1";
 148                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 149                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 150                         };
 151                         sdio3 {
 152                                 nvidia,pins = "drive_sdio3";
 153                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 154                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 155                                 nvidia,pull-down-strength = <46>;
 156                                 nvidia,pull-up-strength = <42>;
 157                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
 158                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
 159                         };
 160                         uart3_txd_pw6 {
 161                                 nvidia,pins =   "uart3_txd_pw6",
 162                                                 "uart3_cts_n_pa1",
 163                                                 "uart3_rts_n_pc0",
 164                                                 "uart3_rxd_pw7";
 165                                 nvidia,function = "uartc";
 166                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 167                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 168                         };
 169                 };
 170         };
 171
 172         serial@70006000 {
 173                 status = "okay";
 174         };
 175
 176         serial@70006200 {
 177                 compatible = "nvidia,tegra30-hsuart";
 178                 /delete-property/ reg-shift;
 179                 status = "okay";
 180         };
 181
 182         pwm@7000a000 {
 183                 status = "okay";
 184         };
 185
 186         panelddc: i2c@7000c000 {
 187                 status = "okay";
 188                 clock-frequency = <100000>;
 189         };
 190
 191         i2c@7000c400 {
 192                 status = "okay";
 193                 clock-frequency = <100000>;
 194         };
 195
 196         i2c@7000c500 {
 197                 status = "okay";
 198                 clock-frequency = <100000>;
 199
 200                 /* ALS and Proximity sensor */
 201                 isl29028@44 {
 202                         compatible = "isil,isl29028";
 203                         reg = <0x44>;
 204                         interrupt-parent = <&gpio>;
 205                         interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
 206                 };
 207
 208                 i2cmux@70 {
 209                         compatible = "nxp,pca9546";
 210                         #address-cells = <1>;
 211                         #size-cells = <0>;
 212                         reg = <0x70>;
 213                         reset-gpios = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
 214                 };
 215         };
 216
 217         i2c@7000c700 {
 218                 status = "okay";
 219                 clock-frequency = <100000>;
 220         };
 221
 222         i2c@7000d000 {
 223                 status = "okay";
 224                 clock-frequency = <100000>;
 225
 226                 wm8903: wm8903@1a {
 227                         compatible = "wlf,wm8903";
 228                         reg = <0x1a>;
 229                         interrupt-parent = <&gpio>;
 230                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
 231
 232                         gpio-controller;
 233                         #gpio-cells = <2>;
 234
 235                         micdet-cfg = <0>;
 236                         micdet-delay = <100>;
 237                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 238                 };
 239
 240                 pmic: tps65911@2d {
 241                         compatible = "ti,tps65911";
 242                         reg = <0x2d>;
 243
 244                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 245                         #interrupt-cells = <2>;
 246                         interrupt-controller;
 247                         wakeup-source;
 248
 249                         ti,system-power-controller;
 250
 251                         #gpio-cells = <2>;
 252                         gpio-controller;
 253
 254                         vcc1-supply = <&vdd_ac_bat_reg>;
 255                         vcc2-supply = <&vdd_ac_bat_reg>;
 256                         vcc3-supply = <&vio_reg>;
 257                         vcc4-supply = <&vdd_5v0_reg>;
 258                         vcc5-supply = <&vdd_ac_bat_reg>;
 259                         vcc6-supply = <&vdd2_reg>;
 260                         vcc7-supply = <&vdd_ac_bat_reg>;
 261                         vccio-supply = <&vdd_ac_bat_reg>;
 262
 263                         regulators {
 264                                 vdd1_reg: vdd1 {
 265                                         regulator-name = "vddio_ddr_1v2";
 266                                         regulator-min-microvolt = <1200000>;
 267                                         regulator-max-microvolt = <1200000>;
 268                                         regulator-always-on;
 269                                 };
 270
 271                                 vdd2_reg: vdd2 {
 272                                         regulator-name = "vdd_1v5_gen";
 273                                         regulator-min-microvolt = <1500000>;
 274                                         regulator-max-microvolt = <1500000>;
 275                                         regulator-always-on;
 276                                 };
 277
 278                                 vddctrl_reg: vddctrl {
 279                                         regulator-name = "vdd_cpu,vdd_sys";
 280                                         regulator-min-microvolt = <800000>;
 281                                         regulator-max-microvolt = <1250000>;
 282                                         regulator-coupled-with = <&vdd_core>;
 283                                         regulator-coupled-max-spread = <300000>;
 284                                         regulator-max-step-microvolt = <100000>;
 285                                         regulator-always-on;
 286
 287                                         nvidia,tegra-cpu-regulator;
 288                                 };
 289
 290                                 vio_reg: vio {
 291                                         regulator-name = "vdd_1v8_gen";
 292                                         regulator-min-microvolt = <1800000>;
 293                                         regulator-max-microvolt = <1800000>;
 294                                         regulator-always-on;
 295                                 };
 296
 297                                 ldo1_reg: ldo1 {
 298                                         regulator-name = "vdd_pexa,vdd_pexb";
 299                                         regulator-min-microvolt = <1050000>;
 300                                         regulator-max-microvolt = <1050000>;
 301                                 };
 302
 303                                 ldo2_reg: ldo2 {
 304                                         regulator-name = "vdd_sata,avdd_plle";
 305                                         regulator-min-microvolt = <1050000>;
 306                                         regulator-max-microvolt = <1050000>;
 307                                 };
 308
 309                                 /* LDO3 is not connected to anything */
 310
 311                                 ldo4_reg: ldo4 {
 312                                         regulator-name = "vdd_rtc";
 313                                         regulator-min-microvolt = <1200000>;
 314                                         regulator-max-microvolt = <1200000>;
 315                                         regulator-always-on;
 316                                 };
 317
 318                                 ldo5_reg: ldo5 {
 319                                         regulator-name = "vddio_sdmmc,avdd_vdac";
 320                                         regulator-min-microvolt = <3300000>;
 321                                         regulator-max-microvolt = <3300000>;
 322                                         regulator-always-on;
 323                                 };
 324
 325                                 ldo6_reg: ldo6 {
 326                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
 327                                         regulator-min-microvolt = <1200000>;
 328                                         regulator-max-microvolt = <1200000>;
 329                                 };
 330
 331                                 ldo7_reg: ldo7 {
 332                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
 333                                         regulator-min-microvolt = <1200000>;
 334                                         regulator-max-microvolt = <1200000>;
 335                                         regulator-always-on;
 336                                 };
 337
 338                                 ldo8_reg: ldo8 {
 339                                         regulator-name = "vdd_ddr_hs";
 340                                         regulator-min-microvolt = <1000000>;
 341                                         regulator-max-microvolt = <1000000>;
 342                                         regulator-always-on;
 343                                 };
 344                         };
 345                 };
 346
 347                 nct1008: temperature-sensor@4c {
 348                         compatible = "onnn,nct1008";
 349                         reg = <0x4c>;
 350                         vcc-supply = <&sys_3v3_reg>;
 351                         interrupt-parent = <&gpio>;
 352                         interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
 353                         #thermal-sensor-cells = <1>;
 354                 };
 355
 356                 vdd_core: tps62361@60 {
 357                         compatible = "ti,tps62361";
 358                         reg = <0x60>;
 359
 360                         regulator-name = "tps62361-vout";
 361                         regulator-min-microvolt = <500000>;
 362                         regulator-max-microvolt = <1500000>;
 363                         regulator-coupled-with = <&vddctrl_reg>;
 364                         regulator-coupled-max-spread = <300000>;
 365                         regulator-max-step-microvolt = <100000>;
 366                         regulator-boot-on;
 367                         regulator-always-on;
 368                         ti,vsel0-state-high;
 369                         ti,vsel1-state-high;
 370
 371                         nvidia,tegra-core-regulator;
 372                 };
 373         };
 374
 375         spi@7000da00 {
 376                 status = "okay";
 377                 spi-max-frequency = <25000000>;
 378
 379                 flash@1 {
 380                         compatible = "winbond,w25q32", "jedec,spi-nor";
 381                         reg = <1>;
 382                         spi-max-frequency = <20000000>;
 383                 };
 384         };
 385
 386         pmc@7000e400 {
 387                 status = "okay";
 388                 nvidia,invert-interrupt;
 389                 nvidia,suspend-mode = <1>;
 390                 nvidia,cpu-pwr-good-time = <2000>;
 391                 nvidia,cpu-pwr-off-time = <200>;
 392                 nvidia,core-pwr-good-time = <3845 3845>;
 393                 nvidia,core-pwr-off-time = <0>;
 394                 nvidia,core-power-req-active-high;
 395                 nvidia,sys-clock-req-active-high;
 396                 core-supply = <&vdd_core>;
 397         };
 398
 399         ahub@70080000 {
 400                 i2s@70080400 {
 401                         status = "okay";
 402                 };
 403         };
 404
 405         mmc@78000000 {
 406                 status = "okay";
 407                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 408                 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 409                 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
 410                 bus-width = <4>;
 411         };
 412
 413         mmc@78000600 {
 414                 status = "okay";
 415                 bus-width = <8>;
 416                 non-removable;
 417         };
 418
 419         usb@7d008000 {
 420                 status = "okay";
 421         };
 422
 423         usb-phy@7d008000 {
 424                 vbus-supply = <&usb3_vbus_reg>;
 425                 status = "okay";
 426         };
 427
 428         backlight: backlight {
 429                 compatible = "pwm-backlight";
 430
 431                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 432                 power-supply = <&vdd_bl_reg>;
 433                 pwms = <&pwm 0 5000000>;
 434
 435                 brightness-levels = <0 4 8 16 32 64 128 255>;
 436                 default-brightness-level = <6>;
 437         };
 438
 439         clk32k_in: clock-32k {
 440                 compatible = "fixed-clock";
 441                 clock-frequency = <32768>;
 442                 #clock-cells = <0>;
 443         };
 444
 445         cpus {
 446                 cpu0: cpu@0 {
 447                         cpu-supply = <&vddctrl_reg>;
 448                         operating-points-v2 = <&cpu0_opp_table>;
 449                         #cooling-cells = <2>;
 450                 };
 451
 452                 cpu1: cpu@1 {
 453                         cpu-supply = <&vddctrl_reg>;
 454                         operating-points-v2 = <&cpu0_opp_table>;
 455                         #cooling-cells = <2>;
 456                 };
 457
 458                 cpu2: cpu@2 {
 459                         cpu-supply = <&vddctrl_reg>;
 460                         operating-points-v2 = <&cpu0_opp_table>;
 461                         #cooling-cells = <2>;
 462                 };
 463
 464                 cpu3: cpu@3 {
 465                         cpu-supply = <&vddctrl_reg>;
 466                         operating-points-v2 = <&cpu0_opp_table>;
 467                         #cooling-cells = <2>;
 468                 };
 469         };
 470
 471         panel: panel {
 472                 compatible = "chunghwa,claa101wb01";
 473                 ddc-i2c-bus = <&panelddc>;
 474
 475                 power-supply = <&vdd_pnl1_reg>;
 476                 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
 477
 478                 backlight = <&backlight>;
 479         };
 480
 481         vdd_ac_bat_reg: regulator-acbat {
 482                 compatible = "regulator-fixed";
 483                 regulator-name = "vdd_ac_bat";
 484                 regulator-min-microvolt = <5000000>;
 485                 regulator-max-microvolt = <5000000>;
 486                 regulator-always-on;
 487         };
 488
 489         cam_1v8_reg: regulator-cam {
 490                 compatible = "regulator-fixed";
 491                 regulator-name = "cam_1v8";
 492                 regulator-min-microvolt = <1800000>;
 493                 regulator-max-microvolt = <1800000>;
 494                 enable-active-high;
 495                 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
 496                 vin-supply = <&vio_reg>;
 497         };
 498
 499         cp_5v_reg: regulator-5v0cp {
 500                 compatible = "regulator-fixed";
 501                 regulator-name = "cp_5v";
 502                 regulator-min-microvolt = <5000000>;
 503                 regulator-max-microvolt = <5000000>;
 504                 regulator-boot-on;
 505                 regulator-always-on;
 506                 enable-active-high;
 507                 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 508         };
 509
 510         emmc_3v3_reg: regulator-emmc {
 511                 compatible = "regulator-fixed";
 512                 regulator-name = "emmc_3v3";
 513                 regulator-min-microvolt = <3300000>;
 514                 regulator-max-microvolt = <3300000>;
 515                 regulator-always-on;
 516                 regulator-boot-on;
 517                 enable-active-high;
 518                 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
 519                 vin-supply = <&sys_3v3_reg>;
 520         };
 521
 522         modem_3v3_reg: regulator-modem {
 523                 compatible = "regulator-fixed";
 524                 regulator-name = "modem_3v3";
 525                 regulator-min-microvolt = <3300000>;
 526                 regulator-max-microvolt = <3300000>;
 527                 enable-active-high;
 528                 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
 529         };
 530
 531         pex_hvdd_3v3_reg: regulator-pex {
 532                 compatible = "regulator-fixed";
 533                 regulator-name = "pex_hvdd_3v3";
 534                 regulator-min-microvolt = <3300000>;
 535                 regulator-max-microvolt = <3300000>;
 536                 enable-active-high;
 537                 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
 538                 vin-supply = <&sys_3v3_reg>;
 539         };
 540
 541         vdd_cam1_ldo_reg: regulator-cam1 {
 542                 compatible = "regulator-fixed";
 543                 regulator-name = "vdd_cam1_ldo";
 544                 regulator-min-microvolt = <2800000>;
 545                 regulator-max-microvolt = <2800000>;
 546                 enable-active-high;
 547                 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
 548                 vin-supply = <&sys_3v3_reg>;
 549         };
 550
 551         vdd_cam2_ldo_reg: regulator-cam2 {
 552                 compatible = "regulator-fixed";
 553                 regulator-name = "vdd_cam2_ldo";
 554                 regulator-min-microvolt = <2800000>;
 555                 regulator-max-microvolt = <2800000>;
 556                 enable-active-high;
 557                 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
 558                 vin-supply = <&sys_3v3_reg>;
 559         };
 560
 561         vdd_cam3_ldo_reg: regulator-cam3 {
 562                 compatible = "regulator-fixed";
 563                 regulator-name = "vdd_cam3_ldo";
 564                 regulator-min-microvolt = <3300000>;
 565                 regulator-max-microvolt = <3300000>;
 566                 enable-active-high;
 567                 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
 568                 vin-supply = <&sys_3v3_reg>;
 569         };
 570
 571         vdd_com_reg: regulator-com {
 572                 compatible = "regulator-fixed";
 573                 regulator-name = "vdd_com";
 574                 regulator-min-microvolt = <3300000>;
 575                 regulator-max-microvolt = <3300000>;
 576                 regulator-always-on;
 577                 regulator-boot-on;
 578                 enable-active-high;
 579                 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 580                 vin-supply = <&sys_3v3_reg>;
 581         };
 582
 583         vdd_fuse_3v3_reg: regulator-fuse {
 584                 compatible = "regulator-fixed";
 585                 regulator-name = "vdd_fuse_3v3";
 586                 regulator-min-microvolt = <3300000>;
 587                 regulator-max-microvolt = <3300000>;
 588                 enable-active-high;
 589                 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
 590                 vin-supply = <&sys_3v3_reg>;
 591         };
 592
 593         vdd_pnl1_reg: regulator-pnl1 {
 594                 compatible = "regulator-fixed";
 595                 regulator-name = "vdd_pnl1";
 596                 regulator-min-microvolt = <3300000>;
 597                 regulator-max-microvolt = <3300000>;
 598                 regulator-always-on;
 599                 regulator-boot-on;
 600                 enable-active-high;
 601                 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
 602                 vin-supply = <&sys_3v3_reg>;
 603         };
 604
 605         vdd_vid_reg: regulator-vid {
 606                 compatible = "regulator-fixed";
 607                 regulator-name = "vddio_vid";
 608                 regulator-min-microvolt = <5000000>;
 609                 regulator-max-microvolt = <5000000>;
 610                 enable-active-high;
 611                 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
 612                 gpio-open-drain;
 613                 vin-supply = <&vdd_5v0_reg>;
 614         };
 615
 616         sound {
 617                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
 618                              "nvidia,tegra-audio-wm8903";
 619                 nvidia,model = "NVIDIA Tegra Cardhu";
 620
 621                 nvidia,audio-routing =
 622                         "Headphone Jack", "HPOUTR",
 623                         "Headphone Jack", "HPOUTL",
 624                         "Int Spk", "ROP",
 625                         "Int Spk", "RON",
 626                         "Int Spk", "LOP",
 627                         "Int Spk", "LON",
 628                         "Mic Jack", "MICBIAS",
 629                         "IN1L", "Mic Jack";
 630
 631                 nvidia,i2s-controller = <&tegra_i2s1>;
 632                 nvidia,audio-codec = <&wm8903>;
 633
 634                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 635                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 636                         GPIO_ACTIVE_LOW>;
 637
 638                 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
 639                          <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 640                          <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
 641                 clock-names = "pll_a", "pll_a_out0", "mclk";
 642
 643                 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
 644                                   <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
 645
 646                 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 647                                          <&tegra_car TEGRA30_CLK_EXTERN1>;
 648         };
 649
 650         thermal-zones {
 651                 cpu-thermal {
 652                         polling-delay-passive = <1000>; /* milliseconds */
 653                         polling-delay = <5000>; /* milliseconds */
 654
 655                         thermal-sensors = <&nct1008 1>;
 656
 657                         trips {
 658                                 trip0: cpu-alert0 {
 659                                         /* throttle at 57C until temperature drops to 56.8C */
 660                                         temperature = <57000>;
 661                                         hysteresis = <200>;
 662                                         type = "passive";
 663                                 };
 664
 665                                 trip1: cpu-crit {
 666                                         /* shut down at 60C */
 667                                         temperature = <60000>;
 668                                         hysteresis = <2000>;
 669                                         type = "critical";
 670                                 };
 671                         };
 672
 673                         cooling-maps {
 674                                 map0 {
 675                                         trip = <&trip0>;
 676                                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 677                                                          <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 678                                                          <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 679                                                          <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 680                                 };
 681                         };
 682                 };
 683         };
 684
 685         gpio-keys {
 686                 compatible = "gpio-keys";
 687
 688                 key-power {
 689                         label = "Power";
 690                         interrupt-parent = <&pmic>;
 691                         interrupts = <2 0>;
 692                         linux,code = <KEY_POWER>;
 693                         debounce-interval = <100>;
 694                         wakeup-source;
 695                 };
 696
 697                 key-volume-down {
 698                         label = "Volume Down";
 699                         gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
 700                         linux,code = <KEY_VOLUMEDOWN>;
 701                         debounce-interval = <10>;
 702                 };
 703
 704                 key-volume-up {
 705                         label = "Volume Up";
 706                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
 707                         linux,code = <KEY_VOLUMEUP>;
 708                         debounce-interval = <10>;
 709                 };
 710         };
 711 };