arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts

   1 /*
   2  * Copyright 2015 Chen-Yu Tsai
   3  *
   4  * Chen-Yu Tsai <wens@csie.org>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 /dts-v1/;
  46 #include "sun8i-a83t.dtsi"
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49
  50 / {
  51         model = "Cubietech Cubietruck Plus";
  52         compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
  53
  54         aliases {
  55                 ethernet0 = &emac;
  56                 serial0 = &uart0;
  57         };
  58
  59         chosen {
  60                 stdout-path = "serial0:115200n8";
  61         };
  62
  63         leds {
  64                 compatible = "gpio-leds";
  65
  66                 blue {
  67                         label = "cubietruck-plus:blue:usr";
  68                         gpios = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */
  69                 };
  70
  71                 orange {
  72                         label = "cubietruck-plus:orange:usr";
  73                         gpios = <&pio 3 26 GPIO_ACTIVE_HIGH>; /* PD26 */
  74                 };
  75
  76                 white {
  77                         label = "cubietruck-plus:white:usr";
  78                         gpios = <&pio 3 27 GPIO_ACTIVE_HIGH>; /* PD27 */
  79                 };
  80
  81                 green {
  82                         label = "cubietruck-plus:green:usr";
  83                         gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
  84                 };
  85         };
  86
  87         usb-hub {
  88                 /* I2C is not connected */
  89                 compatible = "smsc,usb3503";
  90                 initial-mode = <1>; /* initialize in HUB mode */
  91                 disabled-ports = <1>;
  92                 intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
  93                 reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
  94                 connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
  95                 refclk-frequency = <19200000>;
  96         };
  97
  98         reg_usb1_vbus: reg-usb1-vbus {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "usb1-vbus";
 101                 regulator-min-microvolt = <5000000>;
 102                 regulator-max-microvolt = <5000000>;
 103                 regulator-boot-on;
 104                 enable-active-high;
 105                 gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
 106         };
 107
 108         reg_usb2_vbus: reg-usb2-vbus {
 109                 compatible = "regulator-fixed";
 110                 regulator-name = "usb2-vbus";
 111                 regulator-min-microvolt = <5000000>;
 112                 regulator-max-microvolt = <5000000>;
 113                 regulator-boot-on;
 114                 enable-active-high;
 115                 gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
 116         };
 117
 118         sound {
 119                 compatible = "simple-audio-card";
 120                 simple-audio-card,name = "On-board SPDIF";
 121
 122                 simple-audio-card,cpu {
 123                         sound-dai = <&spdif>;
 124                 };
 125
 126                 simple-audio-card,codec {
 127                         sound-dai = <&spdif_out>;
 128                 };
 129         };
 130
 131         spdif_out: spdif-out {
 132                 #sound-dai-cells = <0>;
 133                 compatible = "linux,spdif-dit";
 134         };
 135
 136         wifi_pwrseq: wifi_pwrseq {
 137                 compatible = "mmc-pwrseq-simple";
 138                 clocks = <&ac100_rtc 1>;
 139                 clock-names = "ext_clock";
 140                 /* The WiFi low power clock must be 32768 Hz */
 141                 assigned-clocks = <&ac100_rtc 1>;
 142                 assigned-clock-rates = <32768>;
 143                 /* enables internal regulator and de-asserts reset */
 144                 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
 145         };
 146 };
 147
 148 &cpu0 {
 149         cpu-supply = <&reg_dcdc2>;
 150 };
 151
 152 &cpu100 {
 153         cpu-supply = <&reg_dcdc3>;
 154 };
 155
 156 &ehci0 {
 157         /* GL830 USB-to-SATA bridge here */
 158         status = "okay";
 159 };
 160
 161 &ehci1 {
 162         /* USB3503 HSIC USB 2.0 hub here */
 163         status = "okay";
 164 };
 165
 166 &emac {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&emac_rgmii_pins>;
 169         phy-supply = <&reg_dldo4>;
 170         phy-handle = <&rgmii_phy>;
 171         phy-mode = "rgmii-id";
 172         status = "okay";
 173 };
 174
 175 &mdio {
 176         rgmii_phy: ethernet-phy@1 {
 177                 compatible = "ethernet-phy-ieee802.3-c22";
 178                 reg = <1>;
 179         };
 180 };
 181
 182 &mmc0 {
 183         pinctrl-names = "default";
 184         pinctrl-0 = <&mmc0_pins>;
 185         vmmc-supply = <&reg_dcdc1>;
 186         bus-width = <4>;
 187         cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
 188         status = "okay";
 189 };
 190
 191 &mmc1 {
 192         vmmc-supply = <&reg_dcdc1>;
 193         vqmmc-supply = <&reg_sw>;
 194         mmc-pwrseq = <&wifi_pwrseq>;
 195         bus-width = <4>;
 196         non-removable;
 197         status = "okay";
 198 };
 199
 200 &mmc2 {
 201         pinctrl-names = "default";
 202         pinctrl-0 = <&mmc2_8bit_emmc_pins>;
 203         vmmc-supply = <&reg_dcdc1>;
 204         bus-width = <8>;
 205         non-removable;
 206         cap-mmc-hw-reset;
 207         status = "okay";
 208 };
 209
 210 &r_rsb {
 211         status = "okay";
 212
 213         axp81x: pmic@3a3 {
 214                 compatible = "x-powers,axp818", "x-powers,axp813";
 215                 reg = <0x3a3>;
 216                 interrupt-parent = <&r_intc>;
 217                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 218                 eldoin-supply = <&reg_dcdc1>;
 219                 swin-supply = <&reg_dcdc1>;
 220                 x-powers,drive-vbus-en;
 221         };
 222
 223         ac100: codec@e89 {
 224                 compatible = "x-powers,ac100";
 225                 reg = <0xe89>;
 226
 227                 ac100_codec: codec {
 228                         compatible = "x-powers,ac100-codec";
 229                         interrupt-parent = <&r_pio>;
 230                         interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
 231                         #clock-cells = <0>;
 232                         clock-output-names = "4M_adda";
 233                 };
 234
 235                 ac100_rtc: rtc {
 236                         compatible = "x-powers,ac100-rtc";
 237                         interrupt-parent = <&r_intc>;
 238                         interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 239                         clocks = <&ac100_codec>;
 240                         #clock-cells = <1>;
 241                         clock-output-names = "cko1_rtc",
 242                                              "cko2_rtc",
 243                                              "cko3_rtc";
 244                 };
 245         };
 246 };
 247
 248 #include "axp81x.dtsi"
 249
 250 &reg_aldo1 {
 251         regulator-always-on;
 252         regulator-min-microvolt = <1800000>;
 253         regulator-max-microvolt = <1800000>;
 254         regulator-name = "vcc-1v8";
 255 };
 256
 257 &reg_aldo2 {
 258         regulator-always-on;
 259         regulator-min-microvolt = <1800000>;
 260         regulator-max-microvolt = <1800000>;
 261         regulator-name = "dram-pll";
 262 };
 263
 264 &reg_aldo3 {
 265         regulator-always-on;
 266         regulator-min-microvolt = <3000000>;
 267         regulator-max-microvolt = <3000000>;
 268         regulator-name = "avcc";
 269 };
 270
 271 &reg_dcdc1 {
 272         /*
 273          * The schematics say this should be 3.3V, but the FEX file says
 274          * it should be 3V. The latter makes sense, as the WiFi module's
 275          * I/O is indirectly powered from DCDC1, through SW. It is rated
 276          * at 2.98V maximum.
 277          */
 278         regulator-always-on;
 279         regulator-min-microvolt = <3000000>;
 280         regulator-max-microvolt = <3000000>;
 281         regulator-name = "vcc-3v";
 282 };
 283
 284 &reg_dcdc2 {
 285         regulator-always-on;
 286         regulator-min-microvolt = <700000>;
 287         regulator-max-microvolt = <1100000>;
 288         regulator-name = "vdd-cpua";
 289 };
 290
 291 &reg_dcdc3 {
 292         regulator-always-on;
 293         regulator-min-microvolt = <700000>;
 294         regulator-max-microvolt = <1100000>;
 295         regulator-name = "vdd-cpub";
 296 };
 297
 298 &reg_dcdc4 {
 299         regulator-min-microvolt = <700000>;
 300         regulator-max-microvolt = <1100000>;
 301         regulator-name = "vdd-gpu";
 302 };
 303
 304 &reg_dcdc5 {
 305         regulator-always-on;
 306         regulator-min-microvolt = <1500000>;
 307         regulator-max-microvolt = <1500000>;
 308         regulator-name = "vcc-dram";
 309 };
 310
 311 &reg_dcdc6 {
 312         regulator-always-on;
 313         regulator-min-microvolt = <900000>;
 314         regulator-max-microvolt = <900000>;
 315         regulator-name = "vdd-sys";
 316 };
 317
 318 &reg_dldo2 {
 319         regulator-min-microvolt = <3300000>;
 320         regulator-max-microvolt = <3300000>;
 321         regulator-name = "dp-pwr";
 322 };
 323
 324 &reg_dldo3 {
 325         regulator-always-on;
 326         regulator-min-microvolt = <2500000>;
 327         regulator-max-microvolt = <2500000>;
 328         regulator-name = "ephy-io";
 329 };
 330
 331 &reg_dldo4 {
 332         /*
 333          * The PHY requires 20ms after all voltages are applied until core
 334          * logic is ready and 30ms after the reset pin is de-asserted.
 335          * Set a 100ms delay to account for PMIC ramp time and board traces.
 336          */
 337         regulator-enable-ramp-delay = <100000>;
 338         regulator-min-microvolt = <3300000>;
 339         regulator-max-microvolt = <3300000>;
 340         regulator-name = "ephy";
 341 };
 342
 343 &reg_drivevbus {
 344         regulator-name = "usb0-vbus";
 345         status = "okay";
 346 };
 347
 348 &reg_eldo1 {
 349         regulator-min-microvolt = <1200000>;
 350         regulator-max-microvolt = <1200000>;
 351         regulator-name = "dp-bridge-1";
 352 };
 353
 354 &reg_eldo2 {
 355         regulator-min-microvolt = <1200000>;
 356         regulator-max-microvolt = <1200000>;
 357         regulator-name = "dp-bridge-2";
 358 };
 359
 360 &reg_fldo1 {
 361         /* TODO should be handled by USB PHY */
 362         regulator-always-on;
 363         regulator-min-microvolt = <1080000>;
 364         regulator-max-microvolt = <1320000>;
 365         regulator-name = "vdd12-hsic";
 366 };
 367
 368 &reg_fldo2 {
 369         /*
 370          * Despite the embedded CPUs core not being used in any way,
 371          * this must remain on or the system will hang.
 372          */
 373         regulator-always-on;
 374         regulator-min-microvolt = <700000>;
 375         regulator-max-microvolt = <1100000>;
 376         regulator-name = "vdd-cpus";
 377 };
 378
 379 &reg_rtc_ldo {
 380         regulator-name = "vcc-rtc";
 381 };
 382
 383 &reg_sw {
 384         regulator-name = "vcc-wifi-io";
 385 };
 386
 387 &spdif {
 388         status = "okay";
 389 };
 390
 391 &uart0 {
 392         pinctrl-names = "default";
 393         pinctrl-0 = <&uart0_pb_pins>;
 394         status = "okay";
 395 };
 396
 397 &usbphy {
 398         usb1_vbus-supply = <&reg_usb1_vbus>;
 399         usb2_vbus-supply = <&reg_usb2_vbus>;
 400         status = "okay";
 401 };