arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
   4  * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "stm32mp157a-dk1.dts"
  10 #include "stm32mp15-scmi.dtsi"
  11
  12 / {
  13         model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
  14         compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157";
  15
  16         reserved-memory {
  17                 optee@de000000 {
  18                         reg = <0xde000000 0x2000000>;
  19                         no-map;
  20                 };
  21         };
  22 };
  23
  24 &cpu0 {
  25         clocks = <&scmi_clk CK_SCMI_MPU>;
  26 };
  27
  28 &cpu1 {
  29         clocks = <&scmi_clk CK_SCMI_MPU>;
  30 };
  31
  32 &dsi {
  33         clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
  34 };
  35
  36 &gpioz {
  37         clocks = <&scmi_clk CK_SCMI_GPIOZ>;
  38 };
  39
  40 &hash1 {
  41         clocks = <&scmi_clk CK_SCMI_HASH1>;
  42         resets = <&scmi_reset RST_SCMI_HASH1>;
  43 };
  44
  45 &i2c4 {
  46         clocks = <&scmi_clk CK_SCMI_I2C4>;
  47         resets = <&scmi_reset RST_SCMI_I2C4>;
  48 };
  49
  50 &iwdg2 {
  51         clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
  52 };
  53
  54 &mdma1 {
  55         resets = <&scmi_reset RST_SCMI_MDMA>;
  56 };
  57
  58 &mlahb {
  59         resets = <&scmi_reset RST_SCMI_MCU>;
  60 };
  61
  62 &rcc {
  63         compatible = "st,stm32mp1-rcc-secure", "syscon";
  64         clock-names = "hse", "hsi", "csi", "lse", "lsi";
  65         clocks = <&scmi_clk CK_SCMI_HSE>,
  66                  <&scmi_clk CK_SCMI_HSI>,
  67                  <&scmi_clk CK_SCMI_CSI>,
  68                  <&scmi_clk CK_SCMI_LSE>,
  69                  <&scmi_clk CK_SCMI_LSI>;
  70 };
  71
  72 &rng1 {
  73         clocks = <&scmi_clk CK_SCMI_RNG1>;
  74         resets = <&scmi_reset RST_SCMI_RNG1>;
  75 };
  76
  77 &rtc {
  78         clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
  79 };