arch/arm/boot/dts/stih407-family.dtsi

   1 /*
   2  * Copyright (C) 2014 STMicroelectronics Limited.
   3  * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * publishhed by the Free Software Foundation.
   8  */
   9 #include "stih407-pinctrl.dtsi"
  10 #include <dt-bindings/mfd/st-lpc.h>
  11 #include <dt-bindings/phy/phy.h>
  12 #include <dt-bindings/reset/stih407-resets.h>
  13 #include <dt-bindings/interrupt-controller/irq-st.h>
  14 / {
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         reserved-memory {
  19                 #address-cells = <1>;
  20                 #size-cells = <1>;
  21                 ranges;
  22
  23                 gp0_reserved: rproc@40000000 {
  24                         compatible = "shared-dma-pool";
  25                         reg = <0x40000000 0x01000000>;
  26                         no-map;
  27                         status = "disabled";
  28                 };
  29
  30                 gp1_reserved: rproc@41000000 {
  31                         compatible = "shared-dma-pool";
  32                         reg = <0x41000000 0x01000000>;
  33                         no-map;
  34                         status = "disabled";
  35                 };
  36
  37                 audio_reserved: rproc@42000000 {
  38                         compatible = "shared-dma-pool";
  39                         reg = <0x42000000 0x01000000>;
  40                         no-map;
  41                         status = "disabled";
  42                 };
  43
  44                 dmu_reserved: rproc@43000000 {
  45                         compatible = "shared-dma-pool";
  46                         reg = <0x43000000 0x01000000>;
  47                         no-map;
  48                 };
  49         };
  50
  51         cpus {
  52                 #address-cells = <1>;
  53                 #size-cells = <0>;
  54                 cpu@0 {
  55                         device_type = "cpu";
  56                         compatible = "arm,cortex-a9";
  57                         reg = <0>;
  58
  59                         /* u-boot puts hpen in SBC dmem at 0xa4 offset */
  60                         cpu-release-addr = <0x94100A4>;
  61
  62                                          /* kHz     uV   */
  63                         operating-points = <1500000 0
  64                                             1200000 0
  65                                             800000  0
  66                                             500000  0>;
  67
  68                         clocks = <&clk_m_a9>;
  69                         clock-names = "cpu";
  70                         clock-latency = <100000>;
  71                         cpu0-supply = <&pwm_regulator>;
  72                         st,syscfg = <&syscfg_core 0x8e0>;
  73                 };
  74                 cpu@1 {
  75                         device_type = "cpu";
  76                         compatible = "arm,cortex-a9";
  77                         reg = <1>;
  78
  79                         /* u-boot puts hpen in SBC dmem at 0xa4 offset */
  80                         cpu-release-addr = <0x94100A4>;
  81
  82                                          /* kHz     uV   */
  83                         operating-points = <1500000 0
  84                                             1200000 0
  85                                             800000  0
  86                                             500000  0>;
  87                 };
  88         };
  89
  90         intc: interrupt-controller@08761000 {
  91                 compatible = "arm,cortex-a9-gic";
  92                 #interrupt-cells = <3>;
  93                 interrupt-controller;
  94                 reg = <0x08761000 0x1000>, <0x08760100 0x100>;
  95         };
  96
  97         scu@08760000 {
  98                 compatible = "arm,cortex-a9-scu";
  99                 reg = <0x08760000 0x1000>;
 100         };
 101
 102         timer@08760200 {
 103                 interrupt-parent = <&intc>;
 104                 compatible = "arm,cortex-a9-global-timer";
 105                 reg = <0x08760200 0x100>;
 106                 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
 107                 clocks = <&arm_periph_clk>;
 108         };
 109
 110         l2: cache-controller {
 111                 compatible = "arm,pl310-cache";
 112                 reg = <0x08762000 0x1000>;
 113                 arm,data-latency = <3 3 3>;
 114                 arm,tag-latency = <2 2 2>;
 115                 cache-unified;
 116                 cache-level = <2>;
 117         };
 118
 119         arm-pmu {
 120                 interrupt-parent = <&intc>;
 121                 compatible = "arm,cortex-a9-pmu";
 122                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 123         };
 124
 125         pwm_regulator: pwm-regulator {
 126                 compatible = "pwm-regulator";
 127                 pwms = <&pwm1 3 8448>;
 128                 regulator-name = "CPU_1V0_AVS";
 129                 regulator-min-microvolt = <784000>;
 130                 regulator-max-microvolt = <1299000>;
 131                 regulator-always-on;
 132                 max-duty-cycle = <255>;
 133                 status = "okay";
 134         };
 135
 136         soc {
 137                 #address-cells = <1>;
 138                 #size-cells = <1>;
 139                 interrupt-parent = <&intc>;
 140                 ranges;
 141                 compatible = "simple-bus";
 142
 143                 restart {
 144                         compatible = "st,stih407-restart";
 145                         st,syscfg = <&syscfg_sbc_reg>;
 146                         status = "okay";
 147                 };
 148
 149                 powerdown: powerdown-controller {
 150                         compatible = "st,stih407-powerdown";
 151                         #reset-cells = <1>;
 152                 };
 153
 154                 softreset: softreset-controller {
 155                         compatible = "st,stih407-softreset";
 156                         #reset-cells = <1>;
 157                 };
 158
 159                 picophyreset: picophyreset-controller {
 160                         compatible = "st,stih407-picophyreset";
 161                         #reset-cells = <1>;
 162                 };
 163
 164                 syscfg_sbc: sbc-syscfg@9620000 {
 165                         compatible = "st,stih407-sbc-syscfg", "syscon";
 166                         reg = <0x9620000 0x1000>;
 167                 };
 168
 169                 syscfg_front: front-syscfg@9280000 {
 170                         compatible = "st,stih407-front-syscfg", "syscon";
 171                         reg = <0x9280000 0x1000>;
 172                 };
 173
 174                 syscfg_rear: rear-syscfg@9290000 {
 175                         compatible = "st,stih407-rear-syscfg", "syscon";
 176                         reg = <0x9290000 0x1000>;
 177                 };
 178
 179                 syscfg_flash: flash-syscfg@92a0000 {
 180                         compatible = "st,stih407-flash-syscfg", "syscon";
 181                         reg = <0x92a0000 0x1000>;
 182                 };
 183
 184                 syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
 185                         compatible = "st,stih407-sbc-reg-syscfg", "syscon";
 186                         reg = <0x9600000 0x1000>;
 187                 };
 188
 189                 syscfg_core: core-syscfg@92b0000 {
 190                         compatible = "st,stih407-core-syscfg", "syscon";
 191                         reg = <0x92b0000 0x1000>;
 192                 };
 193
 194                 syscfg_lpm: lpm-syscfg@94b5100 {
 195                         compatible = "st,stih407-lpm-syscfg", "syscon";
 196                         reg = <0x94b5100 0x1000>;
 197                 };
 198
 199                 irq-syscfg {
 200                         compatible    = "st,stih407-irq-syscfg";
 201                         st,syscfg     = <&syscfg_core>;
 202                         st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
 203                                         <ST_IRQ_SYSCFG_PMU_1>;
 204                         st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
 205                                         <ST_IRQ_SYSCFG_DISABLED>;
 206                 };
 207
 208                 /* Display */
 209                 vtg_main: sti-vtg-main@8d02800 {
 210                         compatible = "st,vtg";
 211                         reg = <0x8d02800 0x200>;
 212                         interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
 213                 };
 214
 215                 vtg_aux: sti-vtg-aux@8d00200 {
 216                         compatible = "st,vtg";
 217                         reg = <0x8d00200 0x100>;
 218                         interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
 219                 };
 220
 221                 serial@9830000 {
 222                         compatible = "st,asc";
 223                         reg = <0x9830000 0x2c>;
 224                         interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
 225                         pinctrl-names = "default";
 226                         pinctrl-0 = <&pinctrl_serial0>;
 227                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 228
 229                         status = "disabled";
 230                 };
 231
 232                 serial@9831000 {
 233                         compatible = "st,asc";
 234                         reg = <0x9831000 0x2c>;
 235                         interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;
 236                         pinctrl-names = "default";
 237                         pinctrl-0 = <&pinctrl_serial1>;
 238                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 239
 240                         status = "disabled";
 241                 };
 242
 243                 serial@9832000 {
 244                         compatible = "st,asc";
 245                         reg = <0x9832000 0x2c>;
 246                         interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;
 247                         pinctrl-names = "default";
 248                         pinctrl-0 = <&pinctrl_serial2>;
 249                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 250
 251                         status = "disabled";
 252                 };
 253
 254                 /* SBC_ASC0 - UART10 */
 255                 sbc_serial0: serial@9530000 {
 256                         compatible = "st,asc";
 257                         reg = <0x9530000 0x2c>;
 258                         interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>;
 259                         pinctrl-names = "default";
 260                         pinctrl-0 = <&pinctrl_sbc_serial0>;
 261                         clocks = <&clk_sysin>;
 262
 263                         status = "disabled";
 264                 };
 265
 266                 serial@9531000 {
 267                         compatible = "st,asc";
 268                         reg = <0x9531000 0x2c>;
 269                         interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;
 270                         pinctrl-names = "default";
 271                         pinctrl-0 = <&pinctrl_sbc_serial1>;
 272                         clocks = <&clk_sysin>;
 273
 274                         status = "disabled";
 275                 };
 276
 277                 i2c@9840000 {
 278                         compatible = "st,comms-ssc4-i2c";
 279                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 280                         reg = <0x9840000 0x110>;
 281                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 282                         clock-names = "ssc";
 283                         clock-frequency = <400000>;
 284                         pinctrl-names = "default";
 285                         pinctrl-0 = <&pinctrl_i2c0_default>;
 286                         #address-cells = <1>;
 287                         #size-cells = <0>;
 288
 289                         status = "disabled";
 290                 };
 291
 292                 i2c@9841000 {
 293                         compatible = "st,comms-ssc4-i2c";
 294                         reg = <0x9841000 0x110>;
 295                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 296                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 297                         clock-names = "ssc";
 298                         clock-frequency = <400000>;
 299                         pinctrl-names = "default";
 300                         pinctrl-0 = <&pinctrl_i2c1_default>;
 301                         #address-cells = <1>;
 302                         #size-cells = <0>;
 303
 304                         status = "disabled";
 305                 };
 306
 307                 i2c@9842000 {
 308                         compatible = "st,comms-ssc4-i2c";
 309                         reg = <0x9842000 0x110>;
 310                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 311                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 312                         clock-names = "ssc";
 313                         clock-frequency = <400000>;
 314                         pinctrl-names = "default";
 315                         pinctrl-0 = <&pinctrl_i2c2_default>;
 316                         #address-cells = <1>;
 317                         #size-cells = <0>;
 318
 319                         status = "disabled";
 320                 };
 321
 322                 i2c@9843000 {
 323                         compatible = "st,comms-ssc4-i2c";
 324                         reg = <0x9843000 0x110>;
 325                         interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
 326                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 327                         clock-names = "ssc";
 328                         clock-frequency = <400000>;
 329                         pinctrl-names = "default";
 330                         pinctrl-0 = <&pinctrl_i2c3_default>;
 331                         #address-cells = <1>;
 332                         #size-cells = <0>;
 333
 334                         status = "disabled";
 335                 };
 336
 337                 i2c@9844000 {
 338                         compatible = "st,comms-ssc4-i2c";
 339                         reg = <0x9844000 0x110>;
 340                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 341                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 342                         clock-names = "ssc";
 343                         clock-frequency = <400000>;
 344                         pinctrl-names = "default";
 345                         pinctrl-0 = <&pinctrl_i2c4_default>;
 346                         #address-cells = <1>;
 347                         #size-cells = <0>;
 348
 349                         status = "disabled";
 350                 };
 351
 352                 i2c@9845000 {
 353                         compatible = "st,comms-ssc4-i2c";
 354                         reg = <0x9845000 0x110>;
 355                         interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 356                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 357                         clock-names = "ssc";
 358                         clock-frequency = <400000>;
 359                         pinctrl-names = "default";
 360                         pinctrl-0 = <&pinctrl_i2c5_default>;
 361                         #address-cells = <1>;
 362                         #size-cells = <0>;
 363
 364                         status = "disabled";
 365                 };
 366
 367
 368                 /* SSCs on SBC */
 369                 i2c@9540000 {
 370                         compatible = "st,comms-ssc4-i2c";
 371                         reg = <0x9540000 0x110>;
 372                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 373                         clocks = <&clk_sysin>;
 374                         clock-names = "ssc";
 375                         clock-frequency = <400000>;
 376                         pinctrl-names = "default";
 377                         pinctrl-0 = <&pinctrl_i2c10_default>;
 378                         #address-cells = <1>;
 379                         #size-cells = <0>;
 380
 381                         status = "disabled";
 382                 };
 383
 384                 i2c@9541000 {
 385                         compatible = "st,comms-ssc4-i2c";
 386                         reg = <0x9541000 0x110>;
 387                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 388                         clocks = <&clk_sysin>;
 389                         clock-names = "ssc";
 390                         clock-frequency = <400000>;
 391                         pinctrl-names = "default";
 392                         pinctrl-0 = <&pinctrl_i2c11_default>;
 393                         #address-cells = <1>;
 394                         #size-cells = <0>;
 395
 396                         status = "disabled";
 397                 };
 398
 399                 usb2_picophy0: phy1 {
 400                         compatible = "st,stih407-usb2-phy";
 401                         #phy-cells = <0>;
 402                         st,syscfg = <&syscfg_core 0x100 0xf4>;
 403                         resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
 404                                  <&picophyreset STIH407_PICOPHY2_RESET>;
 405                         reset-names = "global", "port";
 406                 };
 407
 408                 miphy28lp_phy: miphy28lp@9b22000 {
 409                         compatible = "st,miphy28lp-phy";
 410                         st,syscfg = <&syscfg_core>;
 411                         #address-cells  = <1>;
 412                         #size-cells     = <1>;
 413                         ranges;
 414
 415                         phy_port0: port@9b22000 {
 416                                 reg = <0x9b22000 0xff>,
 417                                       <0x9b09000 0xff>,
 418                                       <0x9b04000 0xff>;
 419                                 reg-names = "sata-up",
 420                                             "pcie-up",
 421                                             "pipew";
 422
 423                                 st,syscfg = <0x114 0x818 0xe0 0xec>;
 424                                 #phy-cells = <1>;
 425
 426                                 reset-names = "miphy-sw-rst";
 427                                 resets = <&softreset STIH407_MIPHY0_SOFTRESET>;
 428                         };
 429
 430                         phy_port1: port@9b2a000 {
 431                                 reg = <0x9b2a000 0xff>,
 432                                       <0x9b19000 0xff>,
 433                                       <0x9b14000 0xff>;
 434                                 reg-names = "sata-up",
 435                                             "pcie-up",
 436                                             "pipew";
 437
 438                                 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
 439
 440                                 #phy-cells = <1>;
 441
 442                                 reset-names = "miphy-sw-rst";
 443                                 resets = <&softreset STIH407_MIPHY1_SOFTRESET>;
 444                         };
 445
 446                         phy_port2: port@8f95000 {
 447                                 reg = <0x8f95000 0xff>,
 448                                       <0x8f90000 0xff>;
 449                                 reg-names = "pipew",
 450                                             "usb3-up";
 451
 452                                 st,syscfg = <0x11c 0x820>;
 453
 454                                 #phy-cells = <1>;
 455
 456                                 reset-names = "miphy-sw-rst";
 457                                 resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
 458                         };
 459                 };
 460
 461                 spi@9840000 {
 462                         compatible = "st,comms-ssc4-spi";
 463                         reg = <0x9840000 0x110>;
 464                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 465                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 466                         clock-names = "ssc";
 467                         pinctrl-0 = <&pinctrl_spi0_default>;
 468                         pinctrl-names = "default";
 469                         #address-cells = <1>;
 470                         #size-cells = <0>;
 471
 472                         status = "disabled";
 473                 };
 474
 475                 spi@9841000 {
 476                         compatible = "st,comms-ssc4-spi";
 477                         reg = <0x9841000 0x110>;
 478                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 479                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 480                         clock-names = "ssc";
 481                         pinctrl-names = "default";
 482                         pinctrl-0 = <&pinctrl_spi1_default>;
 483
 484                         status = "disabled";
 485                 };
 486
 487                 spi@9842000 {
 488                         compatible = "st,comms-ssc4-spi";
 489                         reg = <0x9842000 0x110>;
 490                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 491                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 492                         clock-names = "ssc";
 493                         pinctrl-names = "default";
 494                         pinctrl-0 = <&pinctrl_spi2_default>;
 495
 496                         status = "disabled";
 497                 };
 498
 499                 spi@9843000 {
 500                         compatible = "st,comms-ssc4-spi";
 501                         reg = <0x9843000 0x110>;
 502                         interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
 503                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 504                         clock-names = "ssc";
 505                         pinctrl-names = "default";
 506                         pinctrl-0 = <&pinctrl_spi3_default>;
 507
 508                         status = "disabled";
 509                 };
 510
 511                 spi@9844000 {
 512                         compatible = "st,comms-ssc4-spi";
 513                         reg = <0x9844000 0x110>;
 514                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 515                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 516                         clock-names = "ssc";
 517                         pinctrl-names = "default";
 518                         pinctrl-0 = <&pinctrl_spi4_default>;
 519
 520                         status = "disabled";
 521                 };
 522
 523                 /* SBC SSC */
 524                 spi@9540000 {
 525                         compatible = "st,comms-ssc4-spi";
 526                         reg = <0x9540000 0x110>;
 527                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
 528                         clocks = <&clk_sysin>;
 529                         clock-names = "ssc";
 530                         pinctrl-names = "default";
 531                         pinctrl-0 = <&pinctrl_spi10_default>;
 532
 533                         status = "disabled";
 534                 };
 535
 536                 spi@9541000 {
 537                         compatible = "st,comms-ssc4-spi";
 538                         reg = <0x9541000 0x110>;
 539                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 540                         clocks = <&clk_sysin>;
 541                         clock-names = "ssc";
 542                         pinctrl-names = "default";
 543                         pinctrl-0 = <&pinctrl_spi11_default>;
 544
 545                         status = "disabled";
 546                 };
 547
 548                 spi@9542000 {
 549                         compatible = "st,comms-ssc4-spi";
 550                         reg = <0x9542000 0x110>;
 551                         interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
 552                         clocks = <&clk_sysin>;
 553                         clock-names = "ssc";
 554                         pinctrl-names = "default";
 555                         pinctrl-0 = <&pinctrl_spi12_default>;
 556
 557                         status = "disabled";
 558                 };
 559
 560                 mmc0: sdhci@09060000 {
 561                         compatible = "st,sdhci-stih407", "st,sdhci";
 562                         status = "disabled";
 563                         reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
 564                         reg-names = "mmc", "top-mmc-delay";
 565                         interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
 566                         interrupt-names = "mmcirq";
 567                         pinctrl-names = "default";
 568                         pinctrl-0 = <&pinctrl_mmc0>;
 569                         clock-names = "mmc", "icn";
 570                         clocks = <&clk_s_c0_flexgen CLK_MMC_0>,
 571                                  <&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
 572                         bus-width = <8>;
 573                 };
 574
 575                 mmc1: sdhci@09080000 {
 576                         compatible = "st,sdhci-stih407", "st,sdhci";
 577                         status = "disabled";
 578                         reg = <0x09080000 0x7ff>;
 579                         reg-names = "mmc";
 580                         interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
 581                         interrupt-names = "mmcirq";
 582                         pinctrl-names = "default";
 583                         pinctrl-0 = <&pinctrl_sd1>;
 584                         clock-names = "mmc", "icn";
 585                         clocks = <&clk_s_c0_flexgen CLK_MMC_1>,
 586                                  <&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
 587                         resets = <&softreset STIH407_MMC1_SOFTRESET>;
 588                         bus-width = <4>;
 589                 };
 590
 591                 /* Watchdog and Real-Time Clock */
 592                 lpc@8787000 {
 593                         compatible = "st,stih407-lpc";
 594                         reg = <0x8787000 0x1000>;
 595                         interrupts = <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>;
 596                         clocks = <&clk_s_d3_flexgen CLK_LPC_0>;
 597                         timeout-sec = <120>;
 598                         st,syscfg = <&syscfg_core>;
 599                         st,lpc-mode = <ST_LPC_MODE_WDT>;
 600                 };
 601
 602                 lpc@8788000 {
 603                         compatible = "st,stih407-lpc";
 604                         reg = <0x8788000 0x1000>;
 605                         interrupts = <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>;
 606                         clocks = <&clk_s_d3_flexgen CLK_LPC_1>;
 607                         st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
 608                 };
 609
 610                 sata0: sata@9b20000 {
 611                         compatible = "st,ahci";
 612                         reg = <0x9b20000 0x1000>;
 613
 614                         interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
 615                         interrupt-names = "hostc";
 616
 617                         phys = <&phy_port0 PHY_TYPE_SATA>;
 618                         phy-names = "ahci_phy";
 619
 620                         resets = <&powerdown STIH407_SATA0_POWERDOWN>,
 621                                  <&softreset STIH407_SATA0_SOFTRESET>,
 622                                  <&softreset STIH407_SATA0_PWR_SOFTRESET>;
 623                         reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
 624
 625                         clock-names = "ahci_clk";
 626                         clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
 627
 628                         ports-implemented = <0x1>;
 629
 630                         status = "disabled";
 631                 };
 632
 633                 sata1: sata@9b28000 {
 634                         compatible = "st,ahci";
 635                         reg = <0x9b28000 0x1000>;
 636
 637                         interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
 638                         interrupt-names = "hostc";
 639
 640                         phys = <&phy_port1 PHY_TYPE_SATA>;
 641                         phy-names = "ahci_phy";
 642
 643                         resets = <&powerdown STIH407_SATA1_POWERDOWN>,
 644                                  <&softreset STIH407_SATA1_SOFTRESET>,
 645                                  <&softreset STIH407_SATA1_PWR_SOFTRESET>;
 646                         reset-names = "pwr-dwn",
 647                                       "sw-rst",
 648                                       "pwr-rst";
 649
 650                         clock-names = "ahci_clk";
 651                         clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
 652
 653                         ports-implemented = <0x1>;
 654
 655                         status = "disabled";
 656                 };
 657
 658
 659                 st_dwc3: dwc3@8f94000 {
 660                         compatible      = "st,stih407-dwc3";
 661                         reg             = <0x08f94000 0x1000>, <0x110 0x4>;
 662                         reg-names       = "reg-glue", "syscfg-reg";
 663                         st,syscfg       = <&syscfg_core>;
 664                         resets          = <&powerdown STIH407_USB3_POWERDOWN>,
 665                                           <&softreset STIH407_MIPHY2_SOFTRESET>;
 666                         reset-names     = "powerdown", "softreset";
 667                         #address-cells  = <1>;
 668                         #size-cells     = <1>;
 669                         pinctrl-names   = "default";
 670                         pinctrl-0       = <&pinctrl_usb3>;
 671                         ranges;
 672
 673                         status = "disabled";
 674
 675                         dwc3: dwc3@9900000 {
 676                                 compatible      = "snps,dwc3";
 677                                 reg             = <0x09900000 0x100000>;
 678                                 interrupts      = <GIC_SPI 155 IRQ_TYPE_NONE>;
 679                                 dr_mode         = "host";
 680                                 phy-names       = "usb2-phy", "usb3-phy";
 681                                 phys            = <&usb2_picophy0>,
 682                                                   <&phy_port2 PHY_TYPE_USB3>;
 683                                 snps,dis_u3_susphy_quirk;
 684                         };
 685                 };
 686
 687                 /* COMMS PWM Module */
 688                 pwm0: pwm@9810000 {
 689                         compatible      = "st,sti-pwm";
 690                         #pwm-cells      = <2>;
 691                         reg             = <0x9810000 0x68>;
 692                         interrupts      = <GIC_SPI 128 IRQ_TYPE_NONE>;
 693                         pinctrl-names   = "default";
 694                         pinctrl-0       = <&pinctrl_pwm0_chan0_default>;
 695                         clock-names     = "pwm";
 696                         clocks          = <&clk_sysin>;
 697                         st,pwm-num-chan = <1>;
 698
 699                         status          = "disabled";
 700                 };
 701
 702                 /* SBC PWM Module */
 703                 pwm1: pwm@9510000 {
 704                         compatible      = "st,sti-pwm";
 705                         #pwm-cells      = <2>;
 706                         reg             = <0x9510000 0x68>;
 707                         pinctrl-names   = "default";
 708                         pinctrl-0       = <&pinctrl_pwm1_chan0_default
 709                                         &pinctrl_pwm1_chan1_default
 710                                         &pinctrl_pwm1_chan2_default
 711                                         &pinctrl_pwm1_chan3_default>;
 712                         clock-names     = "pwm";
 713                         clocks          = <&clk_sysin>;
 714                         st,pwm-num-chan = <4>;
 715
 716                         status          = "disabled";
 717                 };
 718
 719                 rng10: rng@08a89000 {
 720                         compatible      = "st,rng";
 721                         reg             = <0x08a89000 0x1000>;
 722                         clocks          = <&clk_sysin>;
 723                         status          = "okay";
 724                 };
 725
 726                 rng11: rng@08a8a000 {
 727                         compatible      = "st,rng";
 728                         reg             = <0x08a8a000 0x1000>;
 729                         clocks          = <&clk_sysin>;
 730                         status          = "okay";
 731                 };
 732
 733                 ethernet0: dwmac@9630000 {
 734                         device_type = "network";
 735                         status = "disabled";
 736                         compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
 737                         reg = <0x9630000 0x8000>, <0x80 0x4>;
 738                         reg-names = "stmmaceth", "sti-ethconf";
 739
 740                         st,syscon = <&syscfg_sbc_reg 0x80>;
 741                         st,gmac_en;
 742                         resets = <&softreset STIH407_ETH1_SOFTRESET>;
 743                         reset-names = "stmmaceth";
 744
 745                         interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,
 746                                      <GIC_SPI 99 IRQ_TYPE_NONE>;
 747                         interrupt-names = "macirq", "eth_wake_irq";
 748
 749                         /* DMA Bus Mode */
 750                         snps,pbl = <8>;
 751
 752                         pinctrl-names = "default";
 753                         pinctrl-0 = <&pinctrl_rgmii1>;
 754
 755                         clock-names = "stmmaceth", "sti-ethclk";
 756                         clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>,
 757                                  <&clk_s_c0_flexgen CLK_ETH_PHY>;
 758                 };
 759
 760                 cec: sti-cec@094a087c {
 761                         compatible = "st,stih-cec";
 762                         reg = <0x94a087c 0x64>;
 763                         clocks = <&clk_sysin>;
 764                         clock-names = "cec-clk";
 765                         interrupts = <GIC_SPI 140 IRQ_TYPE_NONE>;
 766                         interrupt-names = "cec-irq";
 767                         pinctrl-names = "default";
 768                         pinctrl-0 = <&pinctrl_cec0_default>;
 769                         resets = <&softreset STIH407_LPM_SOFTRESET>;
 770                 };
 771
 772                 rng10: rng@08a89000 {
 773                         compatible      = "st,rng";
 774                         reg             = <0x08a89000 0x1000>;
 775                         clocks          = <&clk_sysin>;
 776                         status          = "okay";
 777                 };
 778
 779                 rng11: rng@08a8a000 {
 780                         compatible      = "st,rng";
 781                         reg             = <0x08a8a000 0x1000>;
 782                         clocks          = <&clk_sysin>;
 783                         status          = "okay";
 784                 };
 785
 786                 mailbox0: mailbox@8f00000  {
 787                         compatible      = "st,stih407-mailbox";
 788                         reg             = <0x8f00000 0x1000>;
 789                         interrupts      = <GIC_SPI 1 IRQ_TYPE_NONE>;
 790                         #mbox-cells     = <2>;
 791                         mbox-name       = "a9";
 792                         status          = "okay";
 793                 };
 794
 795                 mailbox1: mailbox@8f01000 {
 796                         compatible      = "st,stih407-mailbox";
 797                         reg             = <0x8f01000 0x1000>;
 798                         #mbox-cells     = <2>;
 799                         mbox-name       = "st231_gp_1";
 800                         status          = "okay";
 801                 };
 802
 803                 mailbox2: mailbox@8f02000 {
 804                         compatible      = "st,stih407-mailbox";
 805                         reg             = <0x8f02000 0x1000>;
 806                         #mbox-cells     = <2>;
 807                         mbox-name       = "st231_gp_0";
 808                         status          = "okay";
 809                 };
 810
 811                 mailbox3: mailbox@8f03000 {
 812                         compatible      = "st,stih407-mailbox";
 813                         reg             = <0x8f03000 0x1000>;
 814                         #mbox-cells     = <2>;
 815                         mbox-name       = "st231_audio_video";
 816                         status          = "okay";
 817                 };
 818
 819                 st231_gp0: remote-processor {
 820                         compatible      = "st,st231-rproc";
 821                         memory-region   = <&gp0_reserved>;
 822                         resets          = <&softreset STIH407_ST231_GP0_SOFTRESET>;
 823                         reset-names     = "sw_reset";
 824                         clocks          = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
 825                         clock-frequency = <600000000>;
 826                         st,syscfg       = <&syscfg_core 0x22c>;
 827                 };
 828
 829
 830                 st231_gp1: remote-processor {
 831                         compatible      = "st,st231-rproc";
 832                         memory-region   = <&gp1_reserved>;
 833                         resets          = <&softreset STIH407_ST231_GP1_SOFTRESET>;
 834                         reset-names     = "sw_reset";
 835                         clocks          = <&clk_s_c0_flexgen CLK_ST231_GP_1>;
 836                         clock-frequency = <600000000>;
 837                         st,syscfg       = <&syscfg_core 0x220>;
 838                 };
 839
 840                 st231_audio: remote-processor {
 841                         compatible      = "st,st231-rproc";
 842                         memory-region   = <&audio_reserved>;
 843                         resets          = <&softreset STIH407_ST231_AUD_SOFTRESET>;
 844                         reset-names     = "sw_reset";
 845                         clocks          = <&clk_s_c0_flexgen CLK_ST231_AUD_0>;
 846                         clock-frequency = <600000000>;
 847                         st,syscfg       = <&syscfg_core 0x228>;
 848                 };
 849
 850                 st231_dmu: remote-processor {
 851                         compatible      = "st,st231-rproc";
 852                         memory-region   = <&dmu_reserved>;
 853                         resets          = <&softreset STIH407_ST231_DMU_SOFTRESET>;
 854                         reset-names     = "sw_reset";
 855                         clocks          = <&clk_s_c0_flexgen CLK_ST231_DMU>;
 856                         clock-frequency = <600000000>;
 857                         st,syscfg       = <&syscfg_core 0x224>;
 858                 };
 859
 860                 /* fdma audio */
 861                 fdma0: dma-controller@8e20000 {
 862                         compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
 863                         reg = <0x8e20000 0x8000>,
 864                               <0x8e30000 0x3000>,
 865                               <0x8e37000 0x1000>,
 866                               <0x8e38000 0x8000>;
 867                         reg-names = "slimcore", "dmem", "peripherals", "imem";
 868                         clocks = <&clk_s_c0_flexgen CLK_FDMA>,
 869                                  <&clk_s_c0_flexgen CLK_EXT2F_A9>,
 870                                  <&clk_s_c0_flexgen CLK_EXT2F_A9>,
 871                                  <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 872                         interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>;
 873                         dma-channels = <16>;
 874                         #dma-cells = <3>;
 875                 };
 876
 877                 /* fdma app */
 878                 fdma1: dma-controller@8e40000 {
 879                         compatible = "st,stih407-fdma-mpe31-12", "st,slim-rproc";
 880                         reg = <0x8e40000 0x8000>,
 881                               <0x8e50000 0x3000>,
 882                               <0x8e57000 0x1000>,
 883                               <0x8e58000 0x8000>;
 884                         reg-names = "slimcore", "dmem", "peripherals", "imem";
 885                         clocks = <&clk_s_c0_flexgen CLK_FDMA>,
 886                                 <&clk_s_c0_flexgen CLK_TX_ICN_DMU>,
 887                                 <&clk_s_c0_flexgen CLK_TX_ICN_DMU>,
 888                                 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 889
 890                         interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>;
 891                         dma-channels = <16>;
 892                         #dma-cells = <3>;
 893                 };
 894
 895                 /* fdma free running */
 896                 fdma2: dma-controller@8e60000 {
 897                         compatible = "st,stih407-fdma-mpe31-13", "st,slim-rproc";
 898                         reg = <0x8e60000 0x8000>,
 899                               <0x8e70000 0x3000>,
 900                               <0x8e77000 0x1000>,
 901                               <0x8e78000 0x8000>;
 902                         reg-names = "slimcore", "dmem", "peripherals", "imem";
 903                         interrupts = <GIC_SPI 9 IRQ_TYPE_NONE>;
 904                         dma-channels = <16>;
 905                         #dma-cells = <3>;
 906                         clocks = <&clk_s_c0_flexgen CLK_FDMA>,
 907                                 <&clk_s_c0_flexgen CLK_EXT2F_A9>,
 908                                 <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
 909                                 <&clk_s_c0_flexgen CLK_EXT2F_A9>;
 910                 };
 911
 912                 sti_sasg_codec: sti-sasg-codec {
 913                         compatible = "st,stih407-sas-codec";
 914                         #sound-dai-cells = <1>;
 915                         status = "disabled";
 916                         st,syscfg = <&syscfg_core>;
 917                 };
 918
 919                 sti_uni_player0: sti-uni-player@8d80000 {
 920                         compatible = "st,sti-uni-player";
 921                         #sound-dai-cells = <0>;
 922                         st,syscfg = <&syscfg_core>;
 923                         clocks = <&clk_s_d0_flexgen CLK_PCM_0>;
 924                         assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
 925                         assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
 926                         assigned-clock-rates = <50000000>;
 927                         reg = <0x8d80000 0x158>;
 928                         interrupts = <GIC_SPI 84 IRQ_TYPE_NONE>;
 929                         dmas = <&fdma0 2 0 1>;
 930                         dai-name = "Uni Player #0 (HDMI)";
 931                         dma-names = "tx";
 932                         st,uniperiph-id = <0>;
 933                         st,version = <5>;
 934                         st,mode = "HDMI";
 935
 936                         status          = "disabled";
 937                 };
 938
 939                 sti_uni_player1: sti-uni-player@8d81000 {
 940                         compatible = "st,sti-uni-player";
 941                         #sound-dai-cells = <0>;
 942                         st,syscfg = <&syscfg_core>;
 943                         clocks = <&clk_s_d0_flexgen CLK_PCM_1>;
 944                         assigned-clocks = <&clk_s_d0_quadfs 1>, <&clk_s_d0_flexgen CLK_PCM_1>;
 945                         assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
 946                         assigned-clock-rates = <50000000>;
 947                         reg = <0x8d81000 0x158>;
 948                         interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
 949                         dmas = <&fdma0 3 0 1>;
 950                         dai-name = "Uni Player #1 (PIO)";
 951                         dma-names = "tx";
 952                         st,uniperiph-id = <1>;
 953                         st,version = <5>;
 954                         st,mode = "PCM";
 955
 956                         status = "disabled";
 957                 };
 958
 959                 sti_uni_player2: sti-uni-player@8d82000 {
 960                         compatible = "st,sti-uni-player";
 961                         #sound-dai-cells = <0>;
 962                         st,syscfg = <&syscfg_core>;
 963                         clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
 964                         assigned-clocks = <&clk_s_d0_quadfs 2>, <&clk_s_d0_flexgen CLK_PCM_2>;
 965                         assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
 966                         assigned-clock-rates = <50000000>;
 967                         reg = <0x8d82000 0x158>;
 968                         interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
 969                         dmas = <&fdma0 4 0 1>;
 970                         dai-name = "Uni Player #1 (DAC)";
 971                         dma-names = "tx";
 972                         st,uniperiph-id = <2>;
 973                         st,version = <5>;
 974                         st,mode = "PCM";
 975
 976                         status = "disabled";
 977                 };
 978
 979                 sti_uni_player3: sti-uni-player@8d85000 {
 980                         compatible = "st,sti-uni-player";
 981                         #sound-dai-cells = <0>;
 982                         st,syscfg = <&syscfg_core>;
 983                         clocks = <&clk_s_d0_flexgen CLK_SPDIFF>;
 984                         assigned-clocks = <&clk_s_d0_quadfs 3>, <&clk_s_d0_flexgen CLK_SPDIFF>;
 985                         assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
 986                         assigned-clock-rates = <50000000>;
 987                         reg = <0x8d85000 0x158>;
 988                         interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
 989                         dmas = <&fdma0 7 0 1>;
 990                         dma-names = "tx";
 991                         dai-name = "Uni Player #1 (PIO)";
 992                         st,uniperiph-id = <3>;
 993                         st,version = <5>;
 994                         st,mode = "SPDIF";
 995
 996                         status = "disabled";
 997                 };
 998
 999                 sti_uni_reader0: sti-uni-reader@8d83000 {
1000                         compatible = "st,sti-uni-reader";
1001                         #sound-dai-cells = <0>;
1002                         st,syscfg = <&syscfg_core>;
1003                         reg = <0x8d83000 0x158>;
1004                         interrupts = <GIC_SPI 87 IRQ_TYPE_NONE>;
1005                         dmas = <&fdma0 5 0 1>;
1006                         dma-names = "rx";
1007                         dai-name = "Uni Reader #0 (PCM IN)";
1008                         st,version = <3>;
1009
1010                         status = "disabled";
1011                 };
1012
1013                 sti_uni_reader1: sti-uni-reader@8d84000 {
1014                         compatible = "st,sti-uni-reader";
1015                         #sound-dai-cells = <0>;
1016                         st,syscfg = <&syscfg_core>;
1017                         reg = <0x8d84000 0x158>;
1018                         interrupts = <GIC_SPI 88 IRQ_TYPE_NONE>;
1019                         dmas = <&fdma0 6 0 1>;
1020                         dma-names = "rx";
1021                         dai-name = "Uni Reader #1 (HDMI RX)";
1022                         st,version = <3>;
1023
1024                         status = "disabled";
1025                 };
1026         };
1027 };