1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
6 #include <dt-bindings/gpio/gpio.h>
7 #include "skeleton.dtsi"
14 reg = <0x00000000 0x04000000>,
15 <0x08000000 0x04000000>;
19 compatible = "arm,l210-cache";
20 reg = <0x10210000 0x1000>;
21 interrupt-parent = <&vica>;
25 cache-size = <131072>;
27 cache-line-size = <32>;
28 /* At full speed latency must be >=2 */
29 arm,tag-latency = <8>;
30 arm,data-latency = <8 8>;
31 arm,dirty-latency = <8>;
35 /* Nomadik system timer */
36 compatible = "st,nomadik-mtu";
37 reg = <0x101e2000 0x1000>;
38 interrupt-parent = <&vica>;
40 clocks = <&timclk>, <&pclk>;
41 clock-names = "timclk", "apb_pclk";
46 reg = <0x101e3000 0x1000>;
47 interrupt-parent = <&vica>;
49 clocks = <&timclk>, <&pclk>;
50 clock-names = "timclk", "apb_pclk";
53 gpio0: gpio@101e4000 {
54 compatible = "st,nomadik-gpio";
55 reg = <0x101e4000 0x80>;
56 interrupt-parent = <&vica>;
59 #interrupt-cells = <2>;
63 gpio-ranges = <&pinctrl 0 0 32>;
67 gpio1: gpio@101e5000 {
68 compatible = "st,nomadik-gpio";
69 reg = <0x101e5000 0x80>;
70 interrupt-parent = <&vica>;
73 #interrupt-cells = <2>;
77 gpio-ranges = <&pinctrl 0 32 32>;
81 gpio2: gpio@101e6000 {
82 compatible = "st,nomadik-gpio";
83 reg = <0x101e6000 0x80>;
84 interrupt-parent = <&vica>;
87 #interrupt-cells = <2>;
91 gpio-ranges = <&pinctrl 0 64 32>;
95 gpio3: gpio@101e7000 {
96 compatible = "st,nomadik-gpio";
97 reg = <0x101e7000 0x80>;
99 interrupt-parent = <&vica>;
101 interrupt-controller;
102 #interrupt-cells = <2>;
106 gpio-ranges = <&pinctrl 0 96 28>;
111 compatible = "stericsson,stn8815-pinctrl";
112 nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
113 /* Pin configurations */
115 uart1_default_mux: uart1_mux {
123 mmcsd_default_mux: mmcsd_mux {
126 groups = "mmcsd_a_1", "mmcsd_b_1";
129 mmcsd_default_mode: mmcsd_default {
132 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
133 * MCCMD, MCDAT3-0, MCMSFBCLK
135 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
136 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
137 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
143 i2c0_default_mux: i2c0_mux {
149 i2c0_default_mode: i2c0_default {
151 pins = "GPIO62_D3", "GPIO63_D2";
157 i2c1_default_mux: i2c1_mux {
163 i2c1_default_mode: i2c1_default {
165 pins = "GPIO53_L4", "GPIO54_L3";
172 * This should be activated to use the additional
173 * 8 lines for bits 16 thru 23 from the CLCD block.
175 clcd_24bit_mux: clcd_mux {
178 groups = "clcd_16_23_b_1";
184 /* Power Management Unit */
186 compatible = "stericsson,nomadik-pmu", "syscon";
187 reg = <0x101e0000 0x1000>;
191 compatible = "stericsson,nomadik-src";
192 reg = <0x101e0000 0x1000>;
195 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
196 * that is parent of TIMCLK, PLL1 and PLL2
200 compatible = "fixed-clock";
201 clock-frequency = <19200000>;
205 * The 2.4 MHz TIMCLK reference clock is active at
206 * boot time, this is actually the MXTALCLK @19.2 MHz
207 * divided by 8. This clock is used by the timers and
208 * watchdog. See page 105 ff.
210 timclk: timclk@2.4M {
212 compatible = "fixed-factor-clock";
218 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
221 compatible = "st,nomadik-pll-clock";
226 /* HCLK divides the PLL1 with 1,2,3 or 4 */
229 compatible = "st,nomadik-hclk-clock";
232 /* The PCLK domain uses HCLK right off */
235 compatible = "fixed-factor-clock";
241 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
244 compatible = "st,nomadik-pll-clock";
248 clk216: clk216@216M {
250 compatible = "fixed-factor-clock";
255 clk108: clk108@108M {
257 compatible = "fixed-factor-clock";
264 compatible = "fixed-factor-clock";
265 /* The data sheet does not say how this is derived */
272 compatible = "fixed-factor-clock";
273 /* The data sheet does not say how this is derived */
280 compatible = "fixed-factor-clock";
286 /* This apparently exists as well */
287 ulpiclk: ulpiclk@60M {
289 compatible = "fixed-clock";
290 clock-frequency = <60000000>;
294 * IP AMBA bus clocks, driving the bus side of the
295 * peripheral clocking, clock gates.
298 hclkdma0: hclkdma0@48M {
300 compatible = "st,nomadik-src-clock";
304 hclksmc: hclksmc@48M {
306 compatible = "st,nomadik-src-clock";
310 hclksdram: hclksdram@48M {
312 compatible = "st,nomadik-src-clock";
316 hclkdma1: hclkdma1@48M {
318 compatible = "st,nomadik-src-clock";
322 hclkclcd: hclkclcd@48M {
324 compatible = "st,nomadik-src-clock";
328 pclkirda: pclkirda@48M {
330 compatible = "st,nomadik-src-clock";
334 pclkssp: pclkssp@48M {
336 compatible = "st,nomadik-src-clock";
340 pclkuart0: pclkuart0@48M {
342 compatible = "st,nomadik-src-clock";
346 pclksdi: pclksdi@48M {
348 compatible = "st,nomadik-src-clock";
352 pclki2c0: pclki2c0@48M {
354 compatible = "st,nomadik-src-clock";
358 pclki2c1: pclki2c1@48M {
360 compatible = "st,nomadik-src-clock";
364 pclkuart1: pclkuart1@48M {
366 compatible = "st,nomadik-src-clock";
370 pclkmsp0: pclkmsp0@48M {
372 compatible = "st,nomadik-src-clock";
376 hclkusb: hclkusb@48M {
378 compatible = "st,nomadik-src-clock";
382 hclkdif: hclkdif@48M {
384 compatible = "st,nomadik-src-clock";
388 hclksaa: hclksaa@48M {
390 compatible = "st,nomadik-src-clock";
394 hclksva: hclksva@48M {
396 compatible = "st,nomadik-src-clock";
400 pclkhsi: pclkhsi@48M {
402 compatible = "st,nomadik-src-clock";
406 pclkxti: pclkxti@48M {
408 compatible = "st,nomadik-src-clock";
412 pclkuart2: pclkuart2@48M {
414 compatible = "st,nomadik-src-clock";
418 pclkmsp1: pclkmsp1@48M {
420 compatible = "st,nomadik-src-clock";
424 pclkmsp2: pclkmsp2@48M {
426 compatible = "st,nomadik-src-clock";
430 pclkowm: pclkowm@48M {
432 compatible = "st,nomadik-src-clock";
436 hclkhpi: hclkhpi@48M {
438 compatible = "st,nomadik-src-clock";
442 pclkske: pclkske@48M {
444 compatible = "st,nomadik-src-clock";
448 pclkhsem: pclkhsem@48M {
450 compatible = "st,nomadik-src-clock";
456 compatible = "st,nomadik-src-clock";
460 hclkhash: hclkhash@48M {
462 compatible = "st,nomadik-src-clock";
466 hclkcryp: hclkcryp@48M {
468 compatible = "st,nomadik-src-clock";
472 pclkmshc: pclkmshc@48M {
474 compatible = "st,nomadik-src-clock";
478 hclkusbm: hclkusbm@48M {
480 compatible = "st,nomadik-src-clock";
484 hclkrng: hclkrng@48M {
486 compatible = "st,nomadik-src-clock";
491 /* IP kernel clocks */
494 compatible = "st,nomadik-src-clock";
496 clocks = <&clk72 &clk48>;
498 irdaclk: irdaclk@48M {
500 compatible = "st,nomadik-src-clock";
504 sspiclk: sspiclk@48M {
506 compatible = "st,nomadik-src-clock";
510 uart0clk: uart0clk@48M {
512 compatible = "st,nomadik-src-clock";
517 /* Also called MCCLK in some documents */
519 compatible = "st,nomadik-src-clock";
523 i2c0clk: i2c0clk@48M {
525 compatible = "st,nomadik-src-clock";
529 i2c1clk: i2c1clk@48M {
531 compatible = "st,nomadik-src-clock";
535 uart1clk: uart1clk@48M {
537 compatible = "st,nomadik-src-clock";
541 mspclk0: mspclk0@48M {
543 compatible = "st,nomadik-src-clock";
549 compatible = "st,nomadik-src-clock";
551 clocks = <&clk48>; /* 48 MHz not ULPI */
555 compatible = "st,nomadik-src-clock";
559 ipi2cclk: ipi2cclk@48M {
561 compatible = "st,nomadik-src-clock";
563 clocks = <&clk48>; /* Guess */
565 ipbmcclk: ipbmcclk@48M {
567 compatible = "st,nomadik-src-clock";
569 clocks = <&clk48>; /* Guess */
571 hsiclkrx: hsiclkrx@216M {
573 compatible = "st,nomadik-src-clock";
577 hsiclktx: hsiclktx@108M {
579 compatible = "st,nomadik-src-clock";
583 uart2clk: uart2clk@48M {
585 compatible = "st,nomadik-src-clock";
589 mspclk1: mspclk1@48M {
591 compatible = "st,nomadik-src-clock";
595 mspclk2: mspclk2@48M {
597 compatible = "st,nomadik-src-clock";
603 compatible = "st,nomadik-src-clock";
605 clocks = <&clk48>; /* Guess */
609 compatible = "st,nomadik-src-clock";
611 clocks = <&clk48>; /* Guess */
615 compatible = "st,nomadik-src-clock";
617 clocks = <&clk48>; /* Guess */
619 pclkmsp3: pclkmsp3@48M {
621 compatible = "st,nomadik-src-clock";
625 mspclk3: mspclk3@48M {
627 compatible = "st,nomadik-src-clock";
631 mshcclk: mshcclk@48M {
633 compatible = "st,nomadik-src-clock";
635 clocks = <&clk48>; /* Guess */
637 usbmclk: usbmclk@48M {
639 compatible = "st,nomadik-src-clock";
641 /* Stated as "48 MHz not ULPI clock" */
644 rngcclk: rngcclk@48M {
646 compatible = "st,nomadik-src-clock";
648 clocks = <&clk48>; /* Guess */
652 /* A NAND flash of 128 MiB */
653 fsmc: flash@40000000 {
654 compatible = "stericsson,fsmc-nand";
655 #address-cells = <1>;
657 reg = <0x10100000 0x1000>, /* FSMC Register*/
658 <0x40000000 0x2000>, /* NAND Base DATA */
659 <0x41000000 0x2000>, /* NAND Base ADDR */
660 <0x40800000 0x2000>; /* NAND Base CMD */
661 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
666 label = "X-Loader(NAND)";
670 label = "MemInit(NAND)";
671 reg = <0x40000 0x40000>;
674 label = "BootLoader(NAND)";
675 reg = <0x80000 0x200000>;
678 label = "Kernel zImage(NAND)";
679 reg = <0x280000 0x300000>;
682 label = "Root Filesystem(NAND)";
683 reg = <0x580000 0x1600000>;
686 label = "User Filesystem(NAND)";
687 reg = <0x1b80000 0x6480000>;
691 /* I2C0 connected to the STw4811 power management chip */
693 compatible = "st,nomadik-i2c", "arm,primecell";
694 reg = <0x101f8000 0x1000>;
695 interrupt-parent = <&vica>;
697 clock-frequency = <100000>;
698 #address-cells = <1>;
700 clocks = <&i2c0clk>, <&pclki2c0>;
701 clock-names = "mclk", "apb_pclk";
702 pinctrl-names = "default";
703 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
706 compatible = "st,stw4811";
708 vmmc_regulator: vmmc {
709 compatible = "st,stw481x-vmmc";
710 regulator-name = "VMMC";
711 regulator-min-microvolt = <1800000>;
712 regulator-max-microvolt = <3300000>;
717 /* I2C1 connected to various sensors */
719 compatible = "st,nomadik-i2c", "arm,primecell";
720 reg = <0x101f7000 0x1000>;
721 interrupt-parent = <&vica>;
723 clock-frequency = <100000>;
724 #address-cells = <1>;
726 clocks = <&i2c1clk>, <&pclki2c1>;
727 clock-names = "mclk", "apb_pclk";
728 pinctrl-names = "default";
729 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
732 compatible = "st,camera";
736 compatible = "st,stw5095";
742 compatible = "simple-bus";
743 #address-cells = <1>;
748 compatible = "arm,pl110", "arm,primecell";
749 reg = <0x10120000 0x1000>;
750 interrupt-names = "combined";
752 interrupt-parent = <&vica>;
753 clocks = <&clcdclk>, <&hclkclcd>;
754 clock-names = "clcdclk", "apb_pclk";
758 vica: interrupt-controller@10140000 {
759 compatible = "arm,versatile-vic";
760 interrupt-controller;
761 #interrupt-cells = <1>;
762 reg = <0x10140000 0x20>;
765 vicb: interrupt-controller@10140020 {
766 compatible = "arm,versatile-vic";
767 interrupt-controller;
768 #interrupt-cells = <1>;
769 reg = <0x10140020 0x20>;
772 uart0: uart@101fd000 {
773 compatible = "arm,pl011", "arm,primecell";
774 reg = <0x101fd000 0x1000>;
775 interrupt-parent = <&vica>;
777 clocks = <&uart0clk>, <&pclkuart0>;
778 clock-names = "uartclk", "apb_pclk";
780 dmas = <&dmac0 14 1>,
782 dma-names = "rx", "tx";
785 uart1: uart@101fb000 {
786 compatible = "arm,pl011", "arm,primecell";
787 reg = <0x101fb000 0x1000>;
788 interrupt-parent = <&vica>;
790 clocks = <&uart1clk>, <&pclkuart1>;
791 clock-names = "uartclk", "apb_pclk";
792 pinctrl-names = "default";
793 pinctrl-0 = <&uart1_default_mux>;
794 dmas = <&dmac1 22 1>,
796 dma-names = "rx", "tx";
799 uart2: uart@101f2000 {
800 compatible = "arm,pl011", "arm,primecell";
801 reg = <0x101f2000 0x1000>;
802 interrupt-parent = <&vica>;
804 clocks = <&uart2clk>, <&pclkuart2>;
805 clock-names = "uartclk", "apb_pclk";
807 dmas = <&dmac1 30 1>,
809 dma-names = "rx", "tx";
813 compatible = "arm,primecell";
814 reg = <0x101b0000 0x1000>;
815 clocks = <&rngcclk>, <&hclkrng>;
816 clock-names = "rng", "apb_pclk";
820 compatible = "arm,pl031", "arm,primecell";
821 reg = <0x101e8000 0x1000>;
823 clock-names = "apb_pclk";
824 interrupt-parent = <&vica>;
828 mmcsd: sdi@101f6000 {
829 compatible = "arm,pl18x", "arm,primecell";
830 reg = <0x101f6000 0x1000>;
831 clocks = <&sdiclk>, <&pclksdi>;
832 clock-names = "mclk", "apb_pclk";
833 interrupt-parent = <&vica>;
835 max-frequency = <400000>;
841 * The STw4811 circuit used with the Nomadik strictly
842 * requires that all of these signal direction pins be
843 * routed and used for its 4-bit levelshifter.
850 pinctrl-names = "default";
851 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
852 vmmc-supply = <&vmmc_regulator>;
855 dmac0: dma-controller@10130000 {
856 compatible = "arm,pl080", "arm,primecell";
857 reg = <0x10130000 0x1000>;
858 interrupt-parent = <&vica>;
860 clocks = <&hclkdma0>;
861 clock-names = "apb_pclk";
862 lli-bus-interface-ahb1;
863 lli-bus-interface-ahb2;
864 mem-bus-interface-ahb2;
865 memcpy-burst-size = <256>;
866 memcpy-bus-width = <32>;
869 dmac1: dma-controller@10150000 {
870 compatible = "arm,pl080", "arm,primecell";
871 reg = <0x10150000 0x1000>;
872 interrupt-parent = <&vica>;
874 clocks = <&hclkdma1>;
875 clock-names = "apb_pclk";
876 lli-bus-interface-ahb1;
877 lli-bus-interface-ahb2;
878 mem-bus-interface-ahb2;
879 memcpy-burst-size = <256>;
880 memcpy-bus-width = <32>;