2 * DTS file for SPEAr300 SoC
4 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
14 /include/ "spear3xx.dtsi"
20 compatible = "simple-bus";
21 ranges = <0x60000000 0x60000000 0x50000000
22 0xd0000000 0xd0000000 0x30000000>;
25 compatible = "st,spear300-pinmux";
26 reg = <0x99000000 0x1000>;
30 compatible = "arm,pl110", "arm,primecell";
31 reg = <0x60000000 0x1000>;
36 fsmc: flash@94000000 {
37 compatible = "st,spear600-fsmc-nand";
40 reg = <0x94000000 0x1000 /* FSMC Register */
41 0x80000000 0x0010 /* NAND Base DATA */
42 0x80020000 0x0010 /* NAND Base ADDR */
43 0x80010000 0x0010>; /* NAND Base CMD */
44 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
49 compatible = "st,sdhci-spear";
50 reg = <0x70000000 0x100>;
55 shirq: interrupt-controller@0x50000000 {
56 compatible = "st,spear300-shirq";
57 reg = <0x50000000 0x1000>;
59 #interrupt-cells = <1>;
66 compatible = "simple-bus";
67 ranges = <0xa0000000 0xa0000000 0x10000000
68 0xd0000000 0xd0000000 0x30000000>;
70 gpio1: gpio@a9000000 {
72 compatible = "arm,pl061", "arm,primecell";
74 reg = <0xa9000000 0x1000>;
76 interrupt-parent = <&shirq>;
81 compatible = "st,spear300-kbd";
82 reg = <0xa0000000 0x1000>;
84 interrupt-parent = <&shirq>;