2 * DTS file for all SPEAr13xx SoCs
4 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
14 /include/ "skeleton.dtsi"
17 interrupt-parent = <&gic>;
24 compatible = "arm,cortex-a9";
27 next-level-cache = <&L2>;
31 compatible = "arm,cortex-a9";
34 next-level-cache = <&L2>;
38 gic: interrupt-controller@ec801000 {
39 compatible = "arm,cortex-a9-gic";
41 #interrupt-cells = <3>;
42 reg = < 0xec801000 0x1000 >,
43 < 0xec800100 0x0100 >;
47 compatible = "arm,cortex-a9-pmu";
48 interrupts = <0 6 0x04
53 compatible = "arm,pl310-cache";
54 reg = <0xed000000 0x1000>;
61 device_type = "memory";
66 bootargs = "console=ttyAMA0,115200";
70 compatible = "st,cpufreq-spear";
71 cpufreq_tbl = < 166000
84 compatible = "simple-bus";
85 ranges = <0x50000000 0x50000000 0x10000000
86 0x80000000 0x80000000 0x20000000
87 0xb0000000 0xb0000000 0x22000000
88 0xd8000000 0xd8000000 0x01000000
89 0xe0000000 0xe0000000 0x10000000>;
92 compatible = "st,sdhci-spear";
93 reg = <0xb3000000 0x100>;
94 interrupts = <0 28 0x4>;
99 compatible = "arasan,cf-spear1340";
100 reg = <0xb2800000 0x1000>;
101 interrupts = <0 29 0x4>;
103 dmas = <&dwdma0 0 0 0>;
107 dwdma0: dma@ea800000 {
108 compatible = "snps,dma-spear1340";
109 reg = <0xea800000 0x1000>;
110 interrupts = <0 19 0x4>;
116 chan_allocation_order = <1>;
118 block_size = <0xfff>;
121 multi-block = <1 1 1 1 1 1 1 1>;
125 compatible = "snps,dma-spear1340";
126 reg = <0xeb000000 0x1000>;
127 interrupts = <0 59 0x4>;
134 chan_allocation_order = <1>;
136 block_size = <0xfff>;
138 multi-block = <1 1 1 1 1 1 1 1>;
141 fsmc: flash@b0000000 {
142 compatible = "st,spear600-fsmc-nand";
143 #address-cells = <1>;
145 reg = <0xb0000000 0x1000 /* FSMC Register*/
146 0xb0800000 0x0010 /* NAND Base DATA */
147 0xb0820000 0x0010 /* NAND Base ADDR */
148 0xb0810000 0x0010>; /* NAND Base CMD */
149 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
150 interrupts = <0 20 0x4
158 gmac0: eth@e2000000 {
159 compatible = "st,spear600-gmac";
160 reg = <0xe2000000 0x8000>;
161 interrupts = <0 33 0x4
163 interrupt-names = "macirq", "eth_wake_irq";
168 compatible = "st,pcm-audio";
169 #address-cells = <0>;
174 smi: flash@ea000000 {
175 compatible = "st,spear600-smi";
176 #address-cells = <1>;
178 reg = <0xea000000 0x1000>;
179 interrupts = <0 30 0x4>;
184 compatible = "st,spear600-ehci", "usb-ehci";
185 reg = <0xe4800000 0x1000>;
186 interrupts = <0 64 0x4>;
192 compatible = "st,spear600-ehci", "usb-ehci";
193 reg = <0xe5800000 0x1000>;
194 interrupts = <0 66 0x4>;
200 compatible = "st,spear600-ohci", "usb-ohci";
201 reg = <0xe4000000 0x1000>;
202 interrupts = <0 65 0x4>;
208 compatible = "st,spear600-ohci", "usb-ohci";
209 reg = <0xe5000000 0x1000>;
210 interrupts = <0 67 0x4>;
216 #address-cells = <1>;
218 compatible = "simple-bus";
219 ranges = <0x50000000 0x50000000 0x10000000
220 0xb0000000 0xb0000000 0x10000000
221 0xd0000000 0xd0000000 0x02000000
222 0xd8000000 0xd8000000 0x01000000
223 0xe0000000 0xe0000000 0x10000000>;
225 misc: syscon@e0700000 {
226 compatible = "st,spear1340-misc", "syscon";
227 reg = <0xe0700000 0x1000>;
230 gpio0: gpio@e0600000 {
231 compatible = "arm,pl061", "arm,primecell";
232 reg = <0xe0600000 0x1000>;
233 interrupts = <0 24 0x4>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
241 gpio1: gpio@e0680000 {
242 compatible = "arm,pl061", "arm,primecell";
243 reg = <0xe0680000 0x1000>;
244 interrupts = <0 25 0x4>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
253 compatible = "st,spear300-kbd";
254 reg = <0xe0300000 0x1000>;
255 interrupts = <0 52 0x4>;
260 #address-cells = <1>;
262 compatible = "snps,designware-i2c";
263 reg = <0xe0280000 0x1000>;
264 interrupts = <0 41 0x4>;
269 compatible = "st,designware-i2s";
270 reg = <0xe0180000 0x1000>;
271 interrupt-names = "play_irq", "record_irq";
272 interrupts = <0 10 0x4
278 compatible = "st,designware-i2s";
279 reg = <0xe0200000 0x1000>;
280 interrupt-names = "play_irq", "record_irq";
281 interrupts = <0 26 0x4
287 compatible = "arm,pl022", "arm,primecell";
288 reg = <0xe0100000 0x1000>;
289 #address-cells = <1>;
291 interrupts = <0 31 0x4>;
293 dmas = <&dwdma0 5 0 0>,
295 dma-names = "rx", "tx";
299 compatible = "st,spear600-rtc";
300 reg = <0xe0580000 0x1000>;
301 interrupts = <0 36 0x4>;
306 compatible = "arm,pl011", "arm,primecell";
307 reg = <0xe0000000 0x1000>;
308 interrupts = <0 35 0x4>;
313 compatible = "st,spear600-adc";
314 reg = <0xe0080000 0x1000>;
315 interrupts = <0 12 0x4>;
320 compatible = "st,spear-timer";
321 reg = <0xe0380000 0x400>;
322 interrupts = <0 37 0x4>;
326 compatible = "arm,cortex-a9-twd-timer";
327 reg = <0xec800600 0x20>;
328 interrupts = <1 13 0x4>;
333 compatible = "arm,cortex-a9-twd-wdt";
334 reg = <0xec800620 0x20>;
339 compatible = "st,thermal-spear1340";
340 reg = <0xe07008c4 0x4>;
341 thermal_flags = <0x7000>;