arch/arm/boot/dts/spear1310.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * DTS file for all SPEAr1310 SoCs
   4  *
   5  * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
   6  */
   7
   8 /include/ "spear13xx.dtsi"
   9
  10 / {
  11         compatible = "st,spear1310";
  12
  13         ahb {
  14                 spics: spics@e0700000{
  15                         compatible = "st,spear-spics-gpio";
  16                         reg = <0xe0700000 0x1000>;
  17                         st-spics,peripcfg-reg = <0x3b0>;
  18                         st-spics,sw-enable-bit = <12>;
  19                         st-spics,cs-value-bit = <11>;
  20                         st-spics,cs-enable-mask = <3>;
  21                         st-spics,cs-enable-shift = <8>;
  22                         gpio-controller;
  23                         #gpio-cells = <2>;
  24                 };
  25
  26                 miphy0: miphy@eb800000 {
  27                         compatible = "st,spear1310-miphy";
  28                         reg = <0xeb800000 0x4000>;
  29                         misc = <&misc>;
  30                         phy-id = <0>;
  31                         #phy-cells = <1>;
  32                         status = "disabled";
  33                 };
  34
  35                 miphy1: miphy@eb804000 {
  36                         compatible = "st,spear1310-miphy";
  37                         reg = <0xeb804000 0x4000>;
  38                         misc = <&misc>;
  39                         phy-id = <1>;
  40                         #phy-cells = <1>;
  41                         status = "disabled";
  42                 };
  43
  44                 miphy2: miphy@eb808000 {
  45                         compatible = "st,spear1310-miphy";
  46                         reg = <0xeb808000 0x4000>;
  47                         misc = <&misc>;
  48                         phy-id = <2>;
  49                         #phy-cells = <1>;
  50                         status = "disabled";
  51                 };
  52
  53                 ahci0: ahci@b1000000 {
  54                         compatible = "snps,spear-ahci";
  55                         reg = <0xb1000000 0x10000>;
  56                         interrupts = <0 68 0x4>;
  57                         phys = <&miphy0 0>;
  58                         phy-names = "sata-phy";
  59                         status = "disabled";
  60                 };
  61
  62                 ahci1: ahci@b1800000 {
  63                         compatible = "snps,spear-ahci";
  64                         reg = <0xb1800000 0x10000>;
  65                         interrupts = <0 69 0x4>;
  66                         phys = <&miphy1 0>;
  67                         phy-names = "sata-phy";
  68                         status = "disabled";
  69                 };
  70
  71                 ahci2: ahci@b4000000 {
  72                         compatible = "snps,spear-ahci";
  73                         reg = <0xb4000000 0x10000>;
  74                         interrupts = <0 70 0x4>;
  75                         phys = <&miphy2 0>;
  76                         phy-names = "sata-phy";
  77                         status = "disabled";
  78                 };
  79
  80                 pcie0: pcie@b1000000 {
  81                         compatible = "st,spear1340-pcie", "snps,dw-pcie";
  82                         reg = <0xb1000000 0x4000>, <0x80000000 0x20000>;
  83                         reg-names = "dbi", "config";
  84                         interrupts = <0 68 0x4>;
  85                         num-lanes = <1>;
  86                         phys = <&miphy0 1>;
  87                         phy-names = "pcie-phy";
  88                         #address-cells = <3>;
  89                         #size-cells = <2>;
  90                         device_type = "pci";
  91                         ranges = <0x81000000 0 0         0x80020000 0 0x00010000   /* downstream I/O */
  92                                 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
  93                         bus-range = <0x00 0xff>;
  94                         status = "disabled";
  95                 };
  96
  97                 pcie1: pcie@b1800000 {
  98                         compatible = "st,spear1340-pcie", "snps,dw-pcie";
  99                         reg = <0xb1800000 0x4000>, <0x90000000 0x20000>;
 100                         reg-names = "dbi", "config";
 101                         interrupts = <0 69 0x4>;
 102                         num-lanes = <1>;
 103                         phys = <&miphy1 1>;
 104                         phy-names = "pcie-phy";
 105                         #address-cells = <3>;
 106                         #size-cells = <2>;
 107                         device_type = "pci";
 108                         ranges = <0x81000000 0 0  0x90020000 0 0x00010000   /* downstream I/O */
 109                                 0x82000000 0 0x90030000 0x90030000 0 0x0ffd0000>; /* non-prefetchable memory */
 110                         bus-range = <0x00 0xff>;
 111                         status = "disabled";
 112                 };
 113
 114                 pcie2: pcie@b4000000 {
 115                         compatible = "st,spear1340-pcie", "snps,dw-pcie";
 116                         reg = <0xb4000000 0x4000>, <0xc0000000 0x20000>;
 117                         reg-names = "dbi", "config";
 118                         interrupts = <0 70 0x4>;
 119                         num-lanes = <1>;
 120                         phys = <&miphy2 1>;
 121                         phy-names = "pcie-phy";
 122                         #address-cells = <3>;
 123                         #size-cells = <2>;
 124                         device_type = "pci";
 125                         ranges = <0x81000000 0 0         0xc0020000 0 0x00010000   /* downstream I/O */
 126                                 0x82000000 0 0xc0030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
 127                         bus-range = <0x00 0xff>;
 128                         status = "disabled";
 129                 };
 130
 131                 gmac1: eth@5c400000 {
 132                         compatible = "st,spear600-gmac";
 133                         reg = <0x5c400000 0x8000>;
 134                         interrupts = <0 95 0x4>;
 135                         interrupt-names = "macirq";
 136                         phy-mode = "mii";
 137                         status = "disabled";
 138                 };
 139
 140                 gmac2: eth@5c500000 {
 141                         compatible = "st,spear600-gmac";
 142                         reg = <0x5c500000 0x8000>;
 143                         interrupts = <0 96 0x4>;
 144                         interrupt-names = "macirq";
 145                         phy-mode = "mii";
 146                         status = "disabled";
 147                 };
 148
 149                 gmac3: eth@5c600000 {
 150                         compatible = "st,spear600-gmac";
 151                         reg = <0x5c600000 0x8000>;
 152                         interrupts = <0 97 0x4>;
 153                         interrupt-names = "macirq";
 154                         phy-mode = "rmii";
 155                         status = "disabled";
 156                 };
 157
 158                 gmac4: eth@5c700000 {
 159                         compatible = "st,spear600-gmac";
 160                         reg = <0x5c700000 0x8000>;
 161                         interrupts = <0 98 0x4>;
 162                         interrupt-names = "macirq";
 163                         phy-mode = "rgmii";
 164                         status = "disabled";
 165                 };
 166
 167                 pinmux: pinmux@e0700000 {
 168                         compatible = "st,spear1310-pinmux";
 169                         reg = <0xe0700000 0x1000>;
 170                         #gpio-range-cells = <3>;
 171                 };
 172
 173                 apb {
 174                         i2c1: i2c@5cd00000 {
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                                 compatible = "snps,designware-i2c";
 178                                 reg = <0x5cd00000 0x1000>;
 179                                 interrupts = <0 87 0x4>;
 180                                 status = "disabled";
 181                         };
 182
 183                         i2c2: i2c@5ce00000 {
 184                                 #address-cells = <1>;
 185                                 #size-cells = <0>;
 186                                 compatible = "snps,designware-i2c";
 187                                 reg = <0x5ce00000 0x1000>;
 188                                 interrupts = <0 88 0x4>;
 189                                 status = "disabled";
 190                         };
 191
 192                         i2c3: i2c@5cf00000 {
 193                                 #address-cells = <1>;
 194                                 #size-cells = <0>;
 195                                 compatible = "snps,designware-i2c";
 196                                 reg = <0x5cf00000 0x1000>;
 197                                 interrupts = <0 89 0x4>;
 198                                 status = "disabled";
 199                         };
 200
 201                         i2c4: i2c@5d000000 {
 202                                 #address-cells = <1>;
 203                                 #size-cells = <0>;
 204                                 compatible = "snps,designware-i2c";
 205                                 reg = <0x5d000000 0x1000>;
 206                                 interrupts = <0 90 0x4>;
 207                                 status = "disabled";
 208                         };
 209
 210                         i2c5: i2c@5d100000 {
 211                                 #address-cells = <1>;
 212                                 #size-cells = <0>;
 213                                 compatible = "snps,designware-i2c";
 214                                 reg = <0x5d100000 0x1000>;
 215                                 interrupts = <0 91 0x4>;
 216                                 status = "disabled";
 217                         };
 218
 219                         i2c6: i2c@5d200000 {
 220                                 #address-cells = <1>;
 221                                 #size-cells = <0>;
 222                                 compatible = "snps,designware-i2c";
 223                                 reg = <0x5d200000 0x1000>;
 224                                 interrupts = <0 92 0x4>;
 225                                 status = "disabled";
 226                         };
 227
 228                         i2c7: i2c@5d300000 {
 229                                 #address-cells = <1>;
 230                                 #size-cells = <0>;
 231                                 compatible = "snps,designware-i2c";
 232                                 reg = <0x5d300000 0x1000>;
 233                                 interrupts = <0 93 0x4>;
 234                                 status = "disabled";
 235                         };
 236
 237                         spi1: spi@5d400000 {
 238                                 compatible = "arm,pl022", "arm,primecell";
 239                                 reg = <0x5d400000 0x1000>;
 240                                 interrupts = <0 99 0x4>;
 241                                 #address-cells = <1>;
 242                                 #size-cells = <0>;
 243                                 status = "disabled";
 244                         };
 245
 246                         serial@5c800000 {
 247                                 compatible = "arm,pl011", "arm,primecell";
 248                                 reg = <0x5c800000 0x1000>;
 249                                 interrupts = <0 82 0x4>;
 250                                 status = "disabled";
 251                         };
 252
 253                         serial@5c900000 {
 254                                 compatible = "arm,pl011", "arm,primecell";
 255                                 reg = <0x5c900000 0x1000>;
 256                                 interrupts = <0 83 0x4>;
 257                                 status = "disabled";
 258                         };
 259
 260                         serial@5ca00000 {
 261                                 compatible = "arm,pl011", "arm,primecell";
 262                                 reg = <0x5ca00000 0x1000>;
 263                                 interrupts = <0 84 0x4>;
 264                                 status = "disabled";
 265                         };
 266
 267                         serial@5cb00000 {
 268                                 compatible = "arm,pl011", "arm,primecell";
 269                                 reg = <0x5cb00000 0x1000>;
 270                                 interrupts = <0 85 0x4>;
 271                                 status = "disabled";
 272                         };
 273
 274                         serial@5cc00000 {
 275                                 compatible = "arm,pl011", "arm,primecell";
 276                                 reg = <0x5cc00000 0x1000>;
 277                                 interrupts = <0 86 0x4>;
 278                                 status = "disabled";
 279                         };
 280
 281                         thermal@e07008c4 {
 282                                 st,thermal-flags = <0x7000>;
 283                         };
 284
 285                         gpiopinctrl: gpio@d8400000 {
 286                                 compatible = "st,spear-plgpio";
 287                                 reg = <0xd8400000 0x1000>;
 288                                 interrupts = <0 100 0x4>;
 289                                 #interrupt-cells = <1>;
 290                                 interrupt-controller;
 291                                 gpio-controller;
 292                                 #gpio-cells = <2>;
 293                                 gpio-ranges = <&pinmux 0 0 246>;
 294                                 status = "disabled";
 295
 296                                 st-plgpio,ngpio = <246>;
 297                                 st-plgpio,enb-reg = <0xd0>;
 298                                 st-plgpio,wdata-reg = <0x90>;
 299                                 st-plgpio,dir-reg = <0xb0>;
 300                                 st-plgpio,ie-reg = <0x30>;
 301                                 st-plgpio,rdata-reg = <0x70>;
 302                                 st-plgpio,mis-reg = <0x10>;
 303                                 st-plgpio,eit-reg = <0x50>;
 304                         };
 305                 };
 306         };
 307 };