GNU Linux-libre 4.4.300-gnu1
[releases.git] / arch / arm / boot / dts / samsung_k3pe0e000b.dtsi
1 /*
2  * Timings and Geometry for Samsung K3PE0E000B memory part
3  */
4
5 / {
6         samsung_K3PE0E000B: lpddr2 {
7                 compatible      = "Samsung,K3PE0E000B","jedec,lpddr2-s4";
8                 density         = <4096>;
9                 io-width        = <32>;
10
11                 tRPab-min-tck   = <3>;
12                 tRCD-min-tck    = <3>;
13                 tWR-min-tck     = <3>;
14                 tRASmin-min-tck = <3>;
15                 tRRD-min-tck    = <2>;
16                 tWTR-min-tck    = <2>;
17                 tXP-min-tck     = <2>;
18                 tRTP-min-tck    = <2>;
19                 tCKE-min-tck    = <3>;
20                 tCKESR-min-tck  = <3>;
21                 tFAW-min-tck    = <8>;
22
23                 timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 {
24                         compatible      = "jedec,lpddr2-timings";
25                         min-freq        = <10000000>;
26                         max-freq        = <533333333>;
27                         tRPab           = <21000>;
28                         tRCD            = <18000>;
29                         tWR             = <15000>;
30                         tRAS-min        = <42000>;
31                         tRRD            = <10000>;
32                         tWTR            = <7500>;
33                         tXP             = <7500>;
34                         tRTP            = <7500>;
35                         tCKESR          = <15000>;
36                         tDQSCK-max      = <5500>;
37                         tFAW            = <50000>;
38                         tZQCS           = <90000>;
39                         tZQCL           = <360000>;
40                         tZQinit         = <1000000>;
41                         tRAS-max-ns     = <70000>;
42                         tDQSCK-max-derated = <6000>;
43                 };
44
45                 timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 {
46                         compatible      = "jedec,lpddr2-timings";
47                         min-freq        = <10000000>;
48                         max-freq        = <266666666>;
49                         tRPab           = <21000>;
50                         tRCD            = <18000>;
51                         tWR             = <15000>;
52                         tRAS-min        = <42000>;
53                         tRRD            = <10000>;
54                         tWTR            = <7500>;
55                         tXP             = <7500>;
56                         tRTP            = <7500>;
57                         tCKESR          = <15000>;
58                         tDQSCK-max      = <5500>;
59                         tFAW            = <50000>;
60                         tZQCS           = <90000>;
61                         tZQCL           = <360000>;
62                         tZQinit         = <1000000>;
63                         tRAS-max-ns     = <70000>;
64                         tDQSCK-max-derated = <6000>;
65                 };
66         };
67 };