arch/arm/boot/dts/sama7g5.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  *  sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
   4  *
   5  *  Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries
   6  *
   7  *  Author: Eugen Hristev <eugen.hristev@microchip.com>
   8  *  Author: Claudiu Beznea <claudiu.beznea@microchip.com>
   9  *
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/interrupt-controller/arm-gic.h>
  14 #include <dt-bindings/clock/at91.h>
  15 #include <dt-bindings/dma/at91.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/mfd/at91-usart.h>
  18
  19 / {
  20         model = "Microchip SAMA7G5 family SoC";
  21         compatible = "microchip,sama7g5";
  22         #address-cells = <1>;
  23         #size-cells = <1>;
  24         interrupt-parent = <&gic>;
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 cpu0: cpu@0 {
  31                         device_type = "cpu";
  32                         compatible = "arm,cortex-a7";
  33                         reg = <0x0>;
  34                         clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
  35                         clock-names = "cpu";
  36                         operating-points-v2 = <&cpu_opp_table>;
  37                 };
  38         };
  39
  40         cpu_opp_table: opp-table {
  41                 compatible = "operating-points-v2";
  42
  43                 opp-90000000 {
  44                         opp-hz = /bits/ 64 <90000000>;
  45                         opp-microvolt = <1050000 1050000 1225000>;
  46                         clock-latency-ns = <320000>;
  47                 };
  48
  49                 opp-250000000 {
  50                         opp-hz = /bits/ 64 <250000000>;
  51                         opp-microvolt = <1050000 1050000 1225000>;
  52                         clock-latency-ns = <320000>;
  53                 };
  54
  55                 opp-600000000 {
  56                         opp-hz = /bits/ 64 <600000000>;
  57                         opp-microvolt = <1050000 1050000 1225000>;
  58                         clock-latency-ns = <320000>;
  59                         opp-suspend;
  60                 };
  61
  62                 opp-800000000 {
  63                         opp-hz = /bits/ 64 <800000000>;
  64                         opp-microvolt = <1150000 1125000 1225000>;
  65                         clock-latency-ns = <320000>;
  66                 };
  67
  68                 opp-1000000002 {
  69                         opp-hz = /bits/ 64 <1000000002>;
  70                         opp-microvolt = <1250000 1225000 1300000>;
  71                         clock-latency-ns = <320000>;
  72                 };
  73         };
  74
  75         clocks {
  76                 slow_xtal: slow_xtal {
  77                         compatible = "fixed-clock";
  78                         #clock-cells = <0>;
  79                 };
  80
  81                 main_xtal: main_xtal {
  82                         compatible = "fixed-clock";
  83                         #clock-cells = <0>;
  84                 };
  85
  86                 usb_clk: usb_clk {
  87                         compatible = "fixed-clock";
  88                         #clock-cells = <0>;
  89                         clock-frequency = <48000000>;
  90                 };
  91         };
  92
  93         vddout25: fixed-regulator-vddout25 {
  94                 compatible = "regulator-fixed";
  95
  96                 regulator-name = "VDDOUT25";
  97                 regulator-min-microvolt = <2500000>;
  98                 regulator-max-microvolt = <2500000>;
  99                 regulator-boot-on;
 100                 status = "disabled";
 101         };
 102
 103         ns_sram: sram@100000 {
 104                 compatible = "mmio-sram";
 105                 #address-cells = <1>;
 106                 #size-cells = <1>;
 107                 reg = <0x100000 0x20000>;
 108                 ranges;
 109         };
 110
 111         soc {
 112                 compatible = "simple-bus";
 113                 #address-cells = <1>;
 114                 #size-cells = <1>;
 115                 ranges;
 116
 117                 nfc_sram: sram@600000 {
 118                         compatible = "mmio-sram";
 119                         no-memory-wc;
 120                         reg = <0x00600000 0x2400>;
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123                         ranges = <0 0x00600000 0x2400>;
 124                 };
 125
 126                 nfc_io: nfc-io@10000000 {
 127                         compatible = "atmel,sama5d3-nfc-io", "syscon";
 128                         reg = <0x10000000 0x8000000>;
 129                 };
 130
 131                 ebi: ebi@40000000 {
 132                         compatible = "atmel,sama5d3-ebi";
 133                         #address-cells = <2>;
 134                         #size-cells = <1>;
 135                         atmel,smc = <&hsmc>;
 136                         reg = <0x40000000 0x20000000>;
 137                         ranges = <0x0 0x0 0x40000000 0x8000000
 138                                   0x1 0x0 0x48000000 0x8000000
 139                                   0x2 0x0 0x50000000 0x8000000
 140                                   0x3 0x0 0x58000000 0x8000000>;
 141                         clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>;
 142                         status = "disabled";
 143
 144                         nand_controller: nand-controller {
 145                                 compatible = "atmel,sama5d3-nand-controller";
 146                                 atmel,nfc-sram = <&nfc_sram>;
 147                                 atmel,nfc-io = <&nfc_io>;
 148                                 ecc-engine = <&pmecc>;
 149                                 #address-cells = <2>;
 150                                 #size-cells = <1>;
 151                                 ranges;
 152                                 status = "disabled";
 153                         };
 154                 };
 155
 156                 securam: securam@e0000000 {
 157                         compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
 158                         reg = <0xe0000000 0x4000>;
 159                         clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         ranges = <0 0xe0000000 0x4000>;
 163                         no-memory-wc;
 164                 };
 165
 166                 secumod: secumod@e0004000 {
 167                         compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
 168                         reg = <0xe0004000 0x4000>;
 169                         gpio-controller;
 170                         #gpio-cells = <2>;
 171                 };
 172
 173                 sfrbu: sfr@e0008000 {
 174                         compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
 175                         reg = <0xe0008000 0x20>;
 176                 };
 177
 178                 pioA: pinctrl@e0014000 {
 179                         compatible = "microchip,sama7g5-pinctrl";
 180                         reg = <0xe0014000 0x800>;
 181                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 182                                 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 183                                 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 184                                 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 185                                 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 186                         interrupt-controller;
 187                         #interrupt-cells = <2>;
 188                         gpio-controller;
 189                         #gpio-cells = <2>;
 190                         clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
 191                 };
 192
 193                 pmc: pmc@e0018000 {
 194                         compatible = "microchip,sama7g5-pmc", "syscon";
 195                         reg = <0xe0018000 0x200>;
 196                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 197                         #clock-cells = <2>;
 198                         clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
 199                         clock-names = "td_slck", "md_slck", "main_xtal";
 200                 };
 201
 202                 reset_controller: reset-controller@e001d000 {
 203                         compatible = "microchip,sama7g5-rstc";
 204                         reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
 205                         #reset-cells = <1>;
 206                         clocks = <&clk32k 0>;
 207                 };
 208
 209                 shdwc: shdwc@e001d010 {
 210                         compatible = "microchip,sama7g5-shdwc", "syscon";
 211                         reg = <0xe001d010 0x10>;
 212                         clocks = <&clk32k 0>;
 213                         #address-cells = <1>;
 214                         #size-cells = <0>;
 215                         atmel,wakeup-rtc-timer;
 216                         atmel,wakeup-rtt-timer;
 217                         status = "disabled";
 218                 };
 219
 220                 rtt: rtc@e001d020 {
 221                         compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
 222                         reg = <0xe001d020 0x30>;
 223                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 224                         clocks = <&clk32k 0>;
 225                 };
 226
 227                 clk32k: clock-controller@e001d050 {
 228                         compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
 229                         reg = <0xe001d050 0x4>;
 230                         clocks = <&slow_xtal>;
 231                         #clock-cells = <1>;
 232                 };
 233
 234                 gpbr: gpbr@e001d060 {
 235                         compatible = "microchip,sama7g5-gpbr", "syscon";
 236                         reg = <0xe001d060 0x48>;
 237                 };
 238
 239                 rtc: rtc@e001d0a8 {
 240                         compatible = "microchip,sama7g5-rtc", "microchip,sam9x60-rtc";
 241                         reg = <0xe001d0a8 0x30>;
 242                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 243                         clocks = <&clk32k 1>;
 244                 };
 245
 246                 ps_wdt: watchdog@e001d180 {
 247                         compatible = "microchip,sama7g5-wdt";
 248                         reg = <0xe001d180 0x24>;
 249                         interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 250                         clocks = <&clk32k 0>;
 251                 };
 252
 253                 chipid@e0020000 {
 254                         compatible = "microchip,sama7g5-chipid";
 255                         reg = <0xe0020000 0x8>;
 256                 };
 257
 258                 tcb1: timer@e0800000 {
 259                         compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 260                         #address-cells = <1>;
 261                         #size-cells = <0>;
 262                         reg = <0xe0800000 0x100>;
 263                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 264                         clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 93>, <&clk32k 1>;
 265                         clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 266                 };
 267
 268                 hsmc: hsmc@e0808000 {
 269                         compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
 270                         reg = <0xe0808000 0x1000>;
 271                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 272                         clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
 273                         #address-cells = <1>;
 274                         #size-cells = <1>;
 275                         ranges;
 276
 277                         pmecc: ecc-engine@e0808070 {
 278                                 compatible = "atmel,sama5d2-pmecc";
 279                                 reg = <0xe0808070 0x490>,
 280                                       <0xe0808500 0x200>;
 281                         };
 282                 };
 283
 284                 qspi0: spi@e080c000 {
 285                         compatible = "microchip,sama7g5-ospi";
 286                         reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;
 287                         reg-names = "qspi_base", "qspi_mmap";
 288                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 289                         dmas = <&dma0 AT91_XDMAC_DT_PERID(41)>,
 290                                <&dma0 AT91_XDMAC_DT_PERID(40)>;
 291                         dma-names = "tx", "rx";
 292                         clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>;
 293                         clock-names = "pclk", "gclk";
 294                         #address-cells = <1>;
 295                         #size-cells = <0>;
 296                         status = "disabled";
 297                 };
 298
 299                 qspi1: spi@e0810000 {
 300                         compatible = "microchip,sama7g5-qspi";
 301                         reg = <0xe0810000 0x400>, <0x30000000 0x10000000>;
 302                         reg-names = "qspi_base", "qspi_mmap";
 303                         interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 304                         dmas = <&dma0 AT91_XDMAC_DT_PERID(43)>,
 305                                <&dma0 AT91_XDMAC_DT_PERID(42)>;
 306                         dma-names = "tx", "rx";
 307                         clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
 308                         clock-names = "pclk", "gclk";
 309                         #address-cells = <1>;
 310                         #size-cells = <0>;
 311                         status = "disabled";
 312                 };
 313
 314                 can0: can@e0828000 {
 315                         compatible = "bosch,m_can";
 316                         reg = <0xe0828000 0x100>, <0x100000 0x7800>;
 317                         reg-names = "m_can", "message_ram";
 318                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH
 319                                       GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 320                         interrupt-names = "int0", "int1";
 321                         clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>;
 322                         clock-names = "hclk", "cclk";
 323                         assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
 324                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 325                         assigned-clock-rates = <40000000>;
 326                         bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
 327                         status = "disabled";
 328                 };
 329
 330                 can1: can@e082c000 {
 331                         compatible = "bosch,m_can";
 332                         reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
 333                         reg-names = "m_can", "message_ram";
 334                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
 336                         interrupt-names = "int0", "int1";
 337                         clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>;
 338                         clock-names = "hclk", "cclk";
 339                         assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
 340                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 341                         assigned-clock-rates = <40000000>;
 342                         bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
 343                         status = "disabled";
 344                 };
 345
 346                 can2: can@e0830000 {
 347                         compatible = "bosch,m_can";
 348                         reg = <0xe0830000 0x100>, <0x100000 0x10000>;
 349                         reg-names = "m_can", "message_ram";
 350                         interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH
 351                                       GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 352                         interrupt-names = "int0", "int1";
 353                         clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>;
 354                         clock-names = "hclk", "cclk";
 355                         assigned-clocks = <&pmc PMC_TYPE_GCK 63>;
 356                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 357                         assigned-clock-rates = <40000000>;
 358                         bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
 359                         status = "disabled";
 360                 };
 361
 362                 can3: can@e0834000 {
 363                         compatible = "bosch,m_can";
 364                         reg = <0xe0834000 0x100>, <0x110000 0x4400>;
 365                         reg-names = "m_can", "message_ram";
 366                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH
 367                                       GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 368                         interrupt-names = "int0", "int1";
 369                         clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>;
 370                         clock-names = "hclk", "cclk";
 371                         assigned-clocks = <&pmc PMC_TYPE_GCK 64>;
 372                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 373                         assigned-clock-rates = <40000000>;
 374                         bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 375                         status = "disabled";
 376                 };
 377
 378                 can4: can@e0838000 {
 379                         compatible = "bosch,m_can";
 380                         reg = <0xe0838000 0x100>, <0x110000 0x8800>;
 381                         reg-names = "m_can", "message_ram";
 382                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 384                         interrupt-names = "int0", "int1";
 385                         clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>;
 386                         clock-names = "hclk", "cclk";
 387                         assigned-clocks = <&pmc PMC_TYPE_GCK 65>;
 388                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 389                         assigned-clock-rates = <40000000>;
 390                         bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
 391                         status = "disabled";
 392                 };
 393
 394                 can5: can@e083c000 {
 395                         compatible = "bosch,m_can";
 396                         reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
 397                         reg-names = "m_can", "message_ram";
 398                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH
 399                                       GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
 400                         interrupt-names = "int0", "int1";
 401                         clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>;
 402                         clock-names = "hclk", "cclk";
 403                         assigned-clocks = <&pmc PMC_TYPE_GCK 66>;
 404                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 405                         assigned-clock-rates = <40000000>;
 406                         bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
 407                         status = "disabled";
 408                 };
 409
 410                 adc: adc@e1000000 {
 411                         compatible = "microchip,sama7g5-adc";
 412                         reg = <0xe1000000 0x200>;
 413                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 414                         clocks = <&pmc PMC_TYPE_GCK 26>;
 415                         assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
 416                         assigned-clock-rates = <100000000>;
 417                         clock-names = "adc_clk";
 418                         dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
 419                         dma-names = "rx";
 420                         atmel,min-sample-rate-hz = <200000>;
 421                         atmel,max-sample-rate-hz = <20000000>;
 422                         atmel,startup-time-ms = <4>;
 423                         status = "disabled";
 424                 };
 425
 426                 sdmmc0: mmc@e1204000 {
 427                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 428                         reg = <0xe1204000 0x4000>;
 429                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 430                         clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
 431                         clock-names = "hclock", "multclk";
 432                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 433                         assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
 434                         assigned-clock-rates = <200000000>;
 435                         microchip,sdcal-inverted;
 436                         status = "disabled";
 437                 };
 438
 439                 sdmmc1: mmc@e1208000 {
 440                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 441                         reg = <0xe1208000 0x4000>;
 442                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 443                         clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
 444                         clock-names = "hclock", "multclk";
 445                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 446                         assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
 447                         assigned-clock-rates = <200000000>;
 448                         microchip,sdcal-inverted;
 449                         status = "disabled";
 450                 };
 451
 452                 sdmmc2: mmc@e120c000 {
 453                         compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 454                         reg = <0xe120c000 0x4000>;
 455                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 456                         clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
 457                         clock-names = "hclock", "multclk";
 458                         assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
 459                         assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
 460                         assigned-clock-rates = <200000000>;
 461                         microchip,sdcal-inverted;
 462                         status = "disabled";
 463                 };
 464
 465                 pwm: pwm@e1604000 {
 466                         compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
 467                         reg = <0xe1604000 0x4000>;
 468                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 469                         #pwm-cells = <3>;
 470                         clocks = <&pmc PMC_TYPE_PERIPHERAL 77>;
 471                         status = "disabled";
 472                 };
 473
 474                 pdmc0: sound@e1608000 {
 475                         compatible = "microchip,sama7g5-pdmc";
 476                         reg = <0xe1608000 0x1000>;
 477                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 478                         #sound-dai-cells = <0>;
 479                         dmas = <&dma0 AT91_XDMAC_DT_PERID(37)>;
 480                         dma-names = "rx";
 481                         clocks = <&pmc PMC_TYPE_PERIPHERAL 68>, <&pmc PMC_TYPE_GCK 68>;
 482                         clock-names = "pclk", "gclk";
 483                         status = "disabled";
 484                 };
 485
 486                 pdmc1: sound@e160c000 {
 487                         compatible = "microchip,sama7g5-pdmc";
 488                         reg = <0xe160c000 0x1000>;
 489                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 490                         #sound-dai-cells = <0>;
 491                         dmas = <&dma0 AT91_XDMAC_DT_PERID(38)>;
 492                         dma-names = "rx";
 493                         clocks = <&pmc PMC_TYPE_PERIPHERAL 69>, <&pmc PMC_TYPE_GCK 69>;
 494                         clock-names = "pclk", "gclk";
 495                         status = "disabled";
 496                 };
 497
 498                 spdifrx: spdifrx@e1614000 {
 499                         #sound-dai-cells = <0>;
 500                         compatible = "microchip,sama7g5-spdifrx";
 501                         reg = <0xe1614000 0x4000>;
 502                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 503                         dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>;
 504                         dma-names = "rx";
 505                         clocks = <&pmc PMC_TYPE_PERIPHERAL 84>, <&pmc PMC_TYPE_GCK 84>;
 506                         clock-names = "pclk", "gclk";
 507                         status = "disabled";
 508                 };
 509
 510                 spdiftx: spdiftx@e1618000 {
 511                         #sound-dai-cells = <0>;
 512                         compatible = "microchip,sama7g5-spdiftx";
 513                         reg = <0xe1618000 0x4000>;
 514                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 515                         dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>;
 516                         dma-names = "tx";
 517                         clocks = <&pmc PMC_TYPE_PERIPHERAL 85>, <&pmc PMC_TYPE_GCK 85>;
 518                         clock-names = "pclk", "gclk";
 519                 };
 520
 521                 i2s0: i2s@e161c000 {
 522                         compatible = "microchip,sama7g5-i2smcc";
 523                         #sound-dai-cells = <0>;
 524                         reg = <0xe161c000 0x4000>;
 525                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 526                         dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>;
 527                         dma-names = "tx", "rx";
 528                         clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
 529                         clock-names = "pclk", "gclk";
 530                         status = "disabled";
 531                 };
 532
 533                 i2s1: i2s@e1620000 {
 534                         compatible = "microchip,sama7g5-i2smcc";
 535                         #sound-dai-cells = <0>;
 536                         reg = <0xe1620000 0x4000>;
 537                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
 538                         dmas = <&dma0 AT91_XDMAC_DT_PERID(36)>, <&dma0 AT91_XDMAC_DT_PERID(35)>;
 539                         dma-names = "tx", "rx";
 540                         clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
 541                         clock-names = "pclk", "gclk";
 542                         status = "disabled";
 543                 };
 544
 545                 eic: interrupt-controller@e1628000 {
 546                         compatible = "microchip,sama7g5-eic";
 547                         reg = <0xe1628000 0xec>;
 548                         interrupt-parent = <&gic>;
 549                         interrupt-controller;
 550                         #interrupt-cells = <2>;
 551                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
 552                                      <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 553                         clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
 554                         clock-names = "pclk";
 555                         status = "disabled";
 556                 };
 557
 558                 pit64b0: timer@e1800000 {
 559                         compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
 560                         reg = <0xe1800000 0x4000>;
 561                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 562                         clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
 563                         clock-names = "pclk", "gclk";
 564                 };
 565
 566                 pit64b1: timer@e1804000 {
 567                         compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
 568                         reg = <0xe1804000 0x4000>;
 569                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 570                         clocks = <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>;
 571                         clock-names = "pclk", "gclk";
 572                 };
 573
 574                 aes: crypto@e1810000 {
 575                         compatible = "atmel,at91sam9g46-aes";
 576                         reg = <0xe1810000 0x100>;
 577                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 578                         clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
 579                         clock-names = "aes_clk";
 580                         dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
 581                                <&dma0 AT91_XDMAC_DT_PERID(2)>;
 582                         dma-names = "tx", "rx";
 583                 };
 584
 585                 sha: crypto@e1814000 {
 586                         compatible = "atmel,at91sam9g46-sha";
 587                         reg = <0xe1814000 0x100>;
 588                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 589                         clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
 590                         clock-names = "sha_clk";
 591                         dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
 592                         dma-names = "tx";
 593                 };
 594
 595                 flx0: flexcom@e1818000 {
 596                         compatible = "atmel,sama5d2-flexcom";
 597                         reg = <0xe1818000 0x200>;
 598                         clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 599                         #address-cells = <1>;
 600                         #size-cells = <1>;
 601                         ranges = <0x0 0xe1818000 0x800>;
 602                         status = "disabled";
 603
 604                         uart0: serial@200 {
 605                                 compatible = "atmel,at91sam9260-usart";
 606                                 reg = <0x200 0x200>;
 607                                 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 608                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 609                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
 610                                 clock-names = "usart";
 611                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
 612                                         <&dma1 AT91_XDMAC_DT_PERID(5)>;
 613                                 dma-names = "tx", "rx";
 614                                 atmel,use-dma-rx;
 615                                 atmel,use-dma-tx;
 616                                 status = "disabled";
 617                         };
 618                 };
 619
 620                 flx1: flexcom@e181c000 {
 621                         compatible = "atmel,sama5d2-flexcom";
 622                         reg = <0xe181c000 0x200>;
 623                         clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
 624                         #address-cells = <1>;
 625                         #size-cells = <1>;
 626                         ranges = <0x0 0xe181c000 0x800>;
 627                         status = "disabled";
 628
 629                         i2c1: i2c@600 {
 630                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 631                                 reg = <0x600 0x200>;
 632                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 633                                 #address-cells = <1>;
 634                                 #size-cells = <0>;
 635                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
 636                                 atmel,fifo-size = <32>;
 637                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
 638                                         <&dma0 AT91_XDMAC_DT_PERID(7)>;
 639                                 dma-names = "tx", "rx";
 640                                 status = "disabled";
 641                         };
 642                 };
 643
 644                 flx3: flexcom@e1824000 {
 645                         compatible = "atmel,sama5d2-flexcom";
 646                         reg = <0xe1824000 0x200>;
 647                         clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 648                         #address-cells = <1>;
 649                         #size-cells = <1>;
 650                         ranges = <0x0 0xe1824000 0x800>;
 651                         status = "disabled";
 652
 653                         uart3: serial@200 {
 654                                 compatible = "atmel,at91sam9260-usart";
 655                                 reg = <0x200 0x200>;
 656                                 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 657                                 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 658                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 659                                 clock-names = "usart";
 660                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>,
 661                                         <&dma1 AT91_XDMAC_DT_PERID(11)>;
 662                                 dma-names = "tx", "rx";
 663                                 atmel,use-dma-rx;
 664                                 atmel,use-dma-tx;
 665                                 status = "disabled";
 666                         };
 667                 };
 668
 669                 trng: rng@e2010000 {
 670                         compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
 671                         reg = <0xe2010000 0x100>;
 672                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 673                         clocks = <&pmc PMC_TYPE_PERIPHERAL 97>;
 674                         status = "disabled";
 675                 };
 676
 677                 tdes: crypto@e2014000 {
 678                         compatible = "atmel,at91sam9g46-tdes";
 679                         reg = <0xe2014000 0x100>;
 680                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 681                         clocks = <&pmc PMC_TYPE_PERIPHERAL 96>;
 682                         clock-names = "tdes_clk";
 683                         dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,
 684                                <&dma0 AT91_XDMAC_DT_PERID(53)>;
 685                         dma-names = "tx", "rx";
 686                 };
 687
 688                 flx4: flexcom@e2018000 {
 689                         compatible = "atmel,sama5d2-flexcom";
 690                         reg = <0xe2018000 0x200>;
 691                         clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 692                         #address-cells = <1>;
 693                         #size-cells = <1>;
 694                         ranges = <0x0 0xe2018000 0x800>;
 695                         status = "disabled";
 696
 697                         uart4: serial@200 {
 698                                 compatible = "atmel,at91sam9260-usart";
 699                                 reg = <0x200 0x200>;
 700                                 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 701                                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 702                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
 703                                 clock-names = "usart";
 704                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
 705                                         <&dma1 AT91_XDMAC_DT_PERID(13)>;
 706                                 dma-names = "tx", "rx";
 707                                 atmel,use-dma-rx;
 708                                 atmel,use-dma-tx;
 709                                 atmel,fifo-size = <16>;
 710                                 status = "disabled";
 711                         };
 712                 };
 713
 714                 flx7: flexcom@e2024000 {
 715                         compatible = "atmel,sama5d2-flexcom";
 716                         reg = <0xe2024000 0x200>;
 717                         clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 718                         #address-cells = <1>;
 719                         #size-cells = <1>;
 720                         ranges = <0x0 0xe2024000 0x800>;
 721                         status = "disabled";
 722
 723                         uart7: serial@200 {
 724                                 compatible = "atmel,at91sam9260-usart";
 725                                 reg = <0x200 0x200>;
 726                                 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 727                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 728                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
 729                                 clock-names = "usart";
 730                                 dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
 731                                         <&dma1 AT91_XDMAC_DT_PERID(19)>;
 732                                 dma-names = "tx", "rx";
 733                                 atmel,use-dma-rx;
 734                                 atmel,use-dma-tx;
 735                                 atmel,fifo-size = <16>;
 736                                 status = "disabled";
 737                         };
 738                 };
 739
 740                 gmac0: ethernet@e2800000 {
 741                         compatible = "microchip,sama7g5-gem";
 742                         reg = <0xe2800000 0x1000>;
 743                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
 744                                       GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
 745                                       GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
 746                                       GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
 747                                       GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
 748                                       GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 749                         clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
 750                         clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
 751                         assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
 752                         assigned-clock-rates = <125000000>;
 753                         status = "disabled";
 754                 };
 755
 756                 gmac1: ethernet@e2804000 {
 757                         compatible = "microchip,sama7g5-emac";
 758                         reg = <0xe2804000 0x1000>;
 759                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
 760                                       GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 761                         clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
 762                         clock-names = "pclk", "hclk";
 763                         status = "disabled";
 764                 };
 765
 766                 dma0: dma-controller@e2808000 {
 767                         compatible = "microchip,sama7g5-dma";
 768                         reg = <0xe2808000 0x1000>;
 769                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 770                         #dma-cells = <1>;
 771                         clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
 772                         clock-names = "dma_clk";
 773                         status = "disabled";
 774                 };
 775
 776                 dma1: dma-controller@e280c000 {
 777                         compatible = "microchip,sama7g5-dma";
 778                         reg = <0xe280c000 0x1000>;
 779                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 780                         #dma-cells = <1>;
 781                         clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
 782                         clock-names = "dma_clk";
 783                         status = "disabled";
 784                 };
 785
 786                 /* Place dma2 here despite it's address */
 787                 dma2: dma-controller@e1200000 {
 788                         compatible = "microchip,sama7g5-dma";
 789                         reg = <0xe1200000 0x1000>;
 790                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 791                         #dma-cells = <1>;
 792                         clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
 793                         clock-names = "dma_clk";
 794                         dma-requests = <0>;
 795                         status = "disabled";
 796                 };
 797
 798                 tcb0: timer@e2814000 {
 799                         compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
 800                         #address-cells = <1>;
 801                         #size-cells = <0>;
 802                         reg = <0xe2814000 0x100>;
 803                         interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
 804                         clocks = <&pmc PMC_TYPE_PERIPHERAL 88>, <&pmc PMC_TYPE_PERIPHERAL 89>, <&pmc PMC_TYPE_PERIPHERAL 90>, <&clk32k 1>;
 805                         clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 806                 };
 807
 808                 flx8: flexcom@e2818000 {
 809                         compatible = "atmel,sama5d2-flexcom";
 810                         reg = <0xe2818000 0x200>;
 811                         clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
 812                         #address-cells = <1>;
 813                         #size-cells = <1>;
 814                         ranges = <0x0 0xe2818000 0x800>;
 815                         status = "disabled";
 816
 817                         i2c8: i2c@600 {
 818                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 819                                 reg = <0x600 0x200>;
 820                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 821                                 #address-cells = <1>;
 822                                 #size-cells = <0>;
 823                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
 824                                 atmel,fifo-size = <32>;
 825                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
 826                                         <&dma0 AT91_XDMAC_DT_PERID(21)>;
 827                                 dma-names = "tx", "rx";
 828                                 status = "disabled";
 829                         };
 830                 };
 831
 832                 flx9: flexcom@e281c000 {
 833                         compatible = "atmel,sama5d2-flexcom";
 834                         reg = <0xe281c000 0x200>;
 835                         clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 836                         #address-cells = <1>;
 837                         #size-cells = <1>;
 838                         ranges = <0x0 0xe281c000 0x800>;
 839                         status = "disabled";
 840
 841                         i2c9: i2c@600 {
 842                                 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
 843                                 reg = <0x600 0x200>;
 844                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 845                                 #address-cells = <1>;
 846                                 #size-cells = <0>;
 847                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
 848                                 atmel,fifo-size = <32>;
 849                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
 850                                         <&dma0 AT91_XDMAC_DT_PERID(23)>;
 851                                 dma-names = "tx", "rx";
 852                                 status = "disabled";
 853                         };
 854                 };
 855
 856                 flx11: flexcom@e2824000 {
 857                         compatible = "atmel,sama5d2-flexcom";
 858                         reg = <0xe2824000 0x200>;
 859                         clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
 860                         #address-cells = <1>;
 861                         #size-cells = <1>;
 862                         ranges = <0x0 0xe2824000 0x800>;
 863                         status = "disabled";
 864
 865                         spi11: spi@400 {
 866                                 compatible = "atmel,at91rm9200-spi";
 867                                 reg = <0x400 0x200>;
 868                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 869                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
 870                                 clock-names = "spi_clk";
 871                                 #address-cells = <1>;
 872                                 #size-cells = <0>;
 873                                 atmel,fifo-size = <32>;
 874                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>,
 875                                             <&dma0 AT91_XDMAC_DT_PERID(27)>;
 876                                 dma-names = "tx", "rx";
 877                                 status = "disabled";
 878                         };
 879                 };
 880
 881                 uddrc: uddrc@e3800000 {
 882                         compatible = "microchip,sama7g5-uddrc";
 883                         reg = <0xe3800000 0x4000>;
 884                 };
 885
 886                 ddr3phy: ddr3phy@e3804000 {
 887                         compatible = "microchip,sama7g5-ddr3phy";
 888                         reg = <0xe3804000 0x1000>;
 889                 };
 890
 891                 gic: interrupt-controller@e8c11000 {
 892                         compatible = "arm,cortex-a7-gic";
 893                         #interrupt-cells = <3>;
 894                         #address-cells = <0>;
 895                         interrupt-controller;
 896                         reg = <0xe8c11000 0x1000>,
 897                                 <0xe8c12000 0x2000>;
 898                 };
 899         };
 900 };