2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
48 compatible = "arm,cortex-a5";
54 compatible = "arm,cortex-a5-pmu";
55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
59 reg = <0x20000000 0x8000000>;
63 slow_xtal: slow_xtal {
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
69 main_xtal: main_xtal {
70 compatible = "fixed-clock";
72 clock-frequency = <0>;
75 adc_op_clk: adc_op_clk{
76 compatible = "fixed-clock";
78 clock-frequency = <1000000>;
83 compatible = "mmio-sram";
84 reg = <0x00300000 0x20000>;
88 compatible = "simple-bus";
94 compatible = "simple-bus";
100 compatible = "atmel,hsmci";
101 reg = <0xf0000000 0x600>;
102 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
103 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
108 #address-cells = <1>;
110 clocks = <&mci0_clk>;
111 clock-names = "mci_clk";
115 #address-cells = <1>;
117 compatible = "atmel,at91rm9200-spi";
118 reg = <0xf0004000 0x100>;
119 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
120 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
121 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
122 dma-names = "tx", "rx";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_spi0>;
125 clocks = <&spi0_clk>;
126 clock-names = "spi_clk";
131 compatible = "atmel,at91sam9g45-ssc";
132 reg = <0xf0008000 0x4000>;
133 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
134 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
135 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
136 dma-names = "tx", "rx";
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
139 clocks = <&ssc0_clk>;
140 clock-names = "pclk";
144 tcb0: timer@f0010000 {
145 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
146 #address-cells = <1>;
148 reg = <0xf0010000 0x100>;
149 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
150 clocks = <&tcb0_clk>, <&clk32k>;
151 clock-names = "t0_clk", "slow_clk";
155 compatible = "atmel,at91sam9x5-i2c";
156 reg = <0xf0014000 0x4000>;
157 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
158 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
159 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
160 dma-names = "tx", "rx";
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c0>;
163 #address-cells = <1>;
165 clocks = <&twi0_clk>;
170 compatible = "atmel,at91sam9x5-i2c";
171 reg = <0xf0018000 0x4000>;
172 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
173 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
174 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
175 dma-names = "tx", "rx";
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_i2c1>;
178 #address-cells = <1>;
180 clocks = <&twi1_clk>;
184 usart0: serial@f001c000 {
185 compatible = "atmel,at91sam9260-usart";
186 reg = <0xf001c000 0x100>;
187 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
188 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
189 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
190 dma-names = "tx", "rx";
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usart0>;
193 clocks = <&usart0_clk>;
194 clock-names = "usart";
198 usart1: serial@f0020000 {
199 compatible = "atmel,at91sam9260-usart";
200 reg = <0xf0020000 0x100>;
201 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
202 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
203 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
204 dma-names = "tx", "rx";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_usart1>;
207 clocks = <&usart1_clk>;
208 clock-names = "usart";
212 uart0: serial@f0024000 {
213 compatible = "atmel,at91sam9260-usart";
214 reg = <0xf0024000 0x100>;
215 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_uart0>;
218 clocks = <&uart0_clk>;
219 clock-names = "usart";
224 compatible = "atmel,sama5d3-pwm";
225 reg = <0xf002c000 0x300>;
226 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
233 compatible = "atmel,at91sam9g45-isi";
234 reg = <0xf0034000 0x4000>;
235 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_isi_data_0_7>;
239 clock-names = "isi_clk";
242 #address-cells = <1>;
248 compatible = "atmel,sama5d3-sfr", "syscon";
249 reg = <0xf0038000 0x60>;
253 compatible = "atmel,hsmci";
254 reg = <0xf8000000 0x600>;
255 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
256 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
261 #address-cells = <1>;
263 clocks = <&mci1_clk>;
264 clock-names = "mci_clk";
268 #address-cells = <1>;
270 compatible = "atmel,at91rm9200-spi";
271 reg = <0xf8008000 0x100>;
272 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
273 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
274 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
275 dma-names = "tx", "rx";
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_spi1>;
278 clocks = <&spi1_clk>;
279 clock-names = "spi_clk";
284 compatible = "atmel,at91sam9g45-ssc";
285 reg = <0xf800c000 0x4000>;
286 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
287 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
288 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
289 dma-names = "tx", "rx";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
292 clocks = <&ssc1_clk>;
293 clock-names = "pclk";
298 #address-cells = <1>;
300 compatible = "atmel,at91sam9x5-adc";
301 reg = <0xf8018000 0x100>;
302 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
303 pinctrl-names = "default";
321 clock-names = "adc_clk", "adc_op_clk";
322 atmel,adc-channels-used = <0xfff>;
323 atmel,adc-startup-time = <40>;
324 atmel,adc-use-external-triggers;
325 atmel,adc-vref = <3000>;
326 atmel,adc-res = <10 12>;
327 atmel,adc-sample-hold-time = <11>;
328 atmel,adc-res-names = "lowres", "highres";
332 trigger-name = "external-rising";
333 trigger-value = <0x1>;
337 trigger-name = "external-falling";
338 trigger-value = <0x2>;
342 trigger-name = "external-any";
343 trigger-value = <0x3>;
347 trigger-name = "continuous";
348 trigger-value = <0x6>;
353 compatible = "atmel,at91sam9x5-i2c";
354 reg = <0xf801c000 0x4000>;
355 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
356 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
357 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
358 dma-names = "tx", "rx";
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_i2c2>;
361 #address-cells = <1>;
363 clocks = <&twi2_clk>;
367 usart2: serial@f8020000 {
368 compatible = "atmel,at91sam9260-usart";
369 reg = <0xf8020000 0x100>;
370 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
371 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
372 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
373 dma-names = "tx", "rx";
374 pinctrl-names = "default";
375 pinctrl-0 = <&pinctrl_usart2>;
376 clocks = <&usart2_clk>;
377 clock-names = "usart";
381 usart3: serial@f8024000 {
382 compatible = "atmel,at91sam9260-usart";
383 reg = <0xf8024000 0x100>;
384 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
385 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
386 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
387 dma-names = "tx", "rx";
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_usart3>;
390 clocks = <&usart3_clk>;
391 clock-names = "usart";
396 compatible = "atmel,at91sam9g46-sha";
397 reg = <0xf8034000 0x100>;
398 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
399 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
402 clock-names = "sha_clk";
406 compatible = "atmel,at91sam9g46-aes";
407 reg = <0xf8038000 0x100>;
408 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
409 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
410 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
411 dma-names = "tx", "rx";
413 clock-names = "aes_clk";
417 compatible = "atmel,at91sam9g46-tdes";
418 reg = <0xf803c000 0x100>;
419 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
420 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
421 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
422 dma-names = "tx", "rx";
423 clocks = <&tdes_clk>;
424 clock-names = "tdes_clk";
428 compatible = "atmel,at91sam9g45-trng";
429 reg = <0xf8040000 0x100>;
430 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
431 clocks = <&trng_clk>;
434 hsmc: hsmc@ffffc000 {
435 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
436 reg = <0xffffc000 0x1000>;
437 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
438 clocks = <&hsmc_clk>;
439 #address-cells = <1>;
443 pmecc: ecc-engine@ffffc070 {
444 compatible = "atmel,at91sam9g45-pmecc";
445 reg = <0xffffc070 0x490>,
450 dma0: dma-controller@ffffe600 {
451 compatible = "atmel,at91sam9g45-dma";
452 reg = <0xffffe600 0x200>;
453 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
455 clocks = <&dma0_clk>;
456 clock-names = "dma_clk";
459 dma1: dma-controller@ffffe800 {
460 compatible = "atmel,at91sam9g45-dma";
461 reg = <0xffffe800 0x200>;
462 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
464 clocks = <&dma1_clk>;
465 clock-names = "dma_clk";
468 ramc0: ramc@ffffea00 {
469 compatible = "atmel,sama5d3-ddramc";
470 reg = <0xffffea00 0x200>;
471 clocks = <&ddrck>, <&mpddr_clk>;
472 clock-names = "ddrck", "mpddr";
475 dbgu: serial@ffffee00 {
476 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
477 reg = <0xffffee00 0x200>;
478 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
479 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
480 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
481 dma-names = "tx", "rx";
482 pinctrl-names = "default";
483 pinctrl-0 = <&pinctrl_dbgu>;
484 clocks = <&dbgu_clk>;
485 clock-names = "usart";
489 aic: interrupt-controller@fffff000 {
490 #interrupt-cells = <3>;
491 compatible = "atmel,sama5d3-aic";
492 interrupt-controller;
493 reg = <0xfffff000 0x200>;
494 atmel,external-irqs = <47>;
497 pinctrl: pinctrl@fffff200 {
498 #address-cells = <1>;
500 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
501 ranges = <0xfffff200 0xfffff200 0xa00>;
504 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
505 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
506 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
507 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
508 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
511 /* shared pinctrl settings */
513 pinctrl_adc0_adtrg: adc0_adtrg {
515 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
517 pinctrl_adc0_ad0: adc0_ad0 {
519 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
521 pinctrl_adc0_ad1: adc0_ad1 {
523 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
525 pinctrl_adc0_ad2: adc0_ad2 {
527 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
529 pinctrl_adc0_ad3: adc0_ad3 {
531 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
533 pinctrl_adc0_ad4: adc0_ad4 {
535 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
537 pinctrl_adc0_ad5: adc0_ad5 {
539 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
541 pinctrl_adc0_ad6: adc0_ad6 {
543 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
545 pinctrl_adc0_ad7: adc0_ad7 {
547 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
549 pinctrl_adc0_ad8: adc0_ad8 {
551 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
553 pinctrl_adc0_ad9: adc0_ad9 {
555 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
557 pinctrl_adc0_ad10: adc0_ad10 {
559 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
561 pinctrl_adc0_ad11: adc0_ad11 {
563 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
568 pinctrl_dbgu: dbgu-0 {
570 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
571 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
576 pinctrl_ebi_addr: ebi-addr-0 {
578 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
579 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
580 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
581 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
582 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
583 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
584 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
585 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
586 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
587 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
588 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
589 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
590 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
591 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
592 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
593 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
594 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
595 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
596 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
597 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
598 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
599 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
600 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
603 pinctrl_ebi_nand_addr: ebi-addr-1 {
605 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
606 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
609 pinctrl_ebi_cs0: ebi-cs0-0 {
611 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
614 pinctrl_ebi_cs1: ebi-cs1-0 {
616 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
619 pinctrl_ebi_cs2: ebi-cs2-0 {
621 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
624 pinctrl_ebi_nwait: ebi-nwait-0 {
626 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
629 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
631 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
636 pinctrl_i2c0: i2c0-0 {
638 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
639 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
644 pinctrl_i2c1: i2c1-0 {
646 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
647 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
652 pinctrl_i2c2: i2c2-0 {
654 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
655 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
660 pinctrl_isi_data_0_7: isi-0-data-0-7 {
662 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
663 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
664 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
665 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
666 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
667 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
668 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
669 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
670 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
671 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
672 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
675 pinctrl_isi_data_8_9: isi-0-data-8-9 {
677 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
678 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
681 pinctrl_isi_data_10_11: isi-0-data-10-11 {
683 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
684 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
689 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
691 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
692 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
693 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
695 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
697 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
698 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
699 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
701 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
703 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
704 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
705 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
706 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
711 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
713 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
714 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
715 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
717 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
719 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
720 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
721 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
726 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
728 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
729 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
734 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
736 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
738 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
740 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
742 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
744 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
746 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
748 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
751 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
753 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
755 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
757 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
759 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
761 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
763 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
765 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
767 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
769 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
771 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
773 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
776 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
778 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
780 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
782 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
784 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
786 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
788 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
790 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
793 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
795 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
797 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
799 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
801 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
803 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
805 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
807 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
812 pinctrl_spi0: spi0-0 {
814 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
815 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
816 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
821 pinctrl_spi1: spi1-0 {
823 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
824 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
825 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
830 pinctrl_ssc0_tx: ssc0_tx {
832 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
833 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
834 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
837 pinctrl_ssc0_rx: ssc0_rx {
839 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
840 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
841 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
846 pinctrl_ssc1_tx: ssc1_tx {
848 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
849 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
850 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
853 pinctrl_ssc1_rx: ssc1_rx {
855 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
856 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
857 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
862 pinctrl_uart0: uart0-0 {
864 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
865 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
870 pinctrl_uart1: uart1-0 {
872 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
873 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
878 pinctrl_usart0: usart0-0 {
880 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
881 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
884 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
886 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
887 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
892 pinctrl_usart1: usart1-0 {
894 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
895 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
898 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
900 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
901 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
906 pinctrl_usart2: usart2-0 {
908 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
909 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
912 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
914 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
915 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
920 pinctrl_usart3: usart3-0 {
922 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
923 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
926 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
928 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
929 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
934 pioA: gpio@fffff200 {
935 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
936 reg = <0xfffff200 0x100>;
937 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
940 interrupt-controller;
941 #interrupt-cells = <2>;
942 clocks = <&pioA_clk>;
945 pioB: gpio@fffff400 {
946 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
947 reg = <0xfffff400 0x100>;
948 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
951 interrupt-controller;
952 #interrupt-cells = <2>;
953 clocks = <&pioB_clk>;
956 pioC: gpio@fffff600 {
957 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
958 reg = <0xfffff600 0x100>;
959 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
962 interrupt-controller;
963 #interrupt-cells = <2>;
964 clocks = <&pioC_clk>;
967 pioD: gpio@fffff800 {
968 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
969 reg = <0xfffff800 0x100>;
970 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
973 interrupt-controller;
974 #interrupt-cells = <2>;
975 clocks = <&pioD_clk>;
978 pioE: gpio@fffffa00 {
979 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
980 reg = <0xfffffa00 0x100>;
981 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
984 interrupt-controller;
985 #interrupt-cells = <2>;
986 clocks = <&pioE_clk>;
991 compatible = "atmel,sama5d3-pmc", "syscon";
992 reg = <0xfffffc00 0x120>;
993 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
994 interrupt-controller;
995 #address-cells = <1>;
997 #interrupt-cells = <1>;
999 main_rc_osc: main_rc_osc {
1000 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
1002 interrupt-parent = <&pmc>;
1003 interrupts = <AT91_PMC_MOSCRCS>;
1004 clock-frequency = <12000000>;
1005 clock-accuracy = <50000000>;
1008 main_osc: main_osc {
1009 compatible = "atmel,at91rm9200-clk-main-osc";
1011 interrupt-parent = <&pmc>;
1012 interrupts = <AT91_PMC_MOSCS>;
1013 clocks = <&main_xtal>;
1017 compatible = "atmel,at91sam9x5-clk-main";
1019 interrupt-parent = <&pmc>;
1020 interrupts = <AT91_PMC_MOSCSELS>;
1021 clocks = <&main_rc_osc &main_osc>;
1025 compatible = "atmel,sama5d3-clk-pll";
1027 interrupt-parent = <&pmc>;
1028 interrupts = <AT91_PMC_LOCKA>;
1031 atmel,clk-input-range = <8000000 50000000>;
1032 #atmel,pll-clk-output-range-cells = <4>;
1033 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
1036 plladiv: plladivck {
1037 compatible = "atmel,at91sam9x5-clk-plldiv";
1043 compatible = "atmel,at91sam9x5-clk-utmi";
1045 interrupt-parent = <&pmc>;
1046 interrupts = <AT91_PMC_LOCKU>;
1051 compatible = "atmel,at91sam9x5-clk-master";
1053 interrupt-parent = <&pmc>;
1054 interrupts = <AT91_PMC_MCKRDY>;
1055 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1056 atmel,clk-output-range = <0 166000000>;
1057 atmel,clk-divisors = <1 2 4 3>;
1061 compatible = "atmel,at91sam9x5-clk-usb";
1063 clocks = <&plladiv>, <&utmi>;
1067 compatible = "atmel,at91sam9x5-clk-programmable";
1068 #address-cells = <1>;
1070 interrupt-parent = <&pmc>;
1071 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1076 interrupts = <AT91_PMC_PCKRDY(0)>;
1082 interrupts = <AT91_PMC_PCKRDY(1)>;
1088 interrupts = <AT91_PMC_PCKRDY(2)>;
1093 compatible = "atmel,at91sam9x5-clk-smd";
1095 clocks = <&plladiv>, <&utmi>;
1099 compatible = "atmel,at91rm9200-clk-system";
1100 #address-cells = <1>;
1147 compatible = "atmel,at91sam9x5-clk-peripheral";
1148 #address-cells = <1>;
1152 dbgu_clk: dbgu_clk {
1157 hsmc_clk: hsmc_clk {
1162 pioA_clk: pioA_clk {
1167 pioB_clk: pioB_clk {
1172 pioC_clk: pioC_clk {
1177 pioD_clk: pioD_clk {
1182 pioE_clk: pioE_clk {
1187 usart0_clk: usart0_clk {
1190 atmel,clk-output-range = <0 83000000>;
1193 usart1_clk: usart1_clk {
1196 atmel,clk-output-range = <0 83000000>;
1199 usart2_clk: usart2_clk {
1202 atmel,clk-output-range = <0 83000000>;
1205 usart3_clk: usart3_clk {
1208 atmel,clk-output-range = <0 83000000>;
1211 uart0_clk: uart0_clk {
1214 atmel,clk-output-range = <0 83000000>;
1217 twi0_clk: twi0_clk {
1220 atmel,clk-output-range = <0 41500000>;
1223 twi1_clk: twi1_clk {
1226 atmel,clk-output-range = <0 41500000>;
1229 twi2_clk: twi2_clk {
1232 atmel,clk-output-range = <0 41500000>;
1235 mci0_clk: mci0_clk {
1240 mci1_clk: mci1_clk {
1245 spi0_clk: spi0_clk {
1248 atmel,clk-output-range = <0 166000000>;
1251 spi1_clk: spi1_clk {
1254 atmel,clk-output-range = <0 166000000>;
1257 tcb0_clk: tcb0_clk {
1260 atmel,clk-output-range = <0 166000000>;
1271 atmel,clk-output-range = <0 83000000>;
1274 dma0_clk: dma0_clk {
1279 dma1_clk: dma1_clk {
1284 uhphs_clk: uhphs_clk {
1289 udphs_clk: udphs_clk {
1299 ssc0_clk: ssc0_clk {
1302 atmel,clk-output-range = <0 83000000>;
1305 ssc1_clk: ssc1_clk {
1308 atmel,clk-output-range = <0 83000000>;
1321 tdes_clk: tdes_clk {
1326 trng_clk: trng_clk {
1331 fuse_clk: fuse_clk {
1336 mpddr_clk: mpddr_clk {
1343 reset_controller: rstc@fffffe00 {
1344 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1345 reg = <0xfffffe00 0x10>;
1349 shutdown_controller: shutdown-controller@fffffe10 {
1350 compatible = "atmel,at91sam9x5-shdwc";
1351 reg = <0xfffffe10 0x10>;
1355 pit: timer@fffffe30 {
1356 compatible = "atmel,at91sam9260-pit";
1357 reg = <0xfffffe30 0xf>;
1358 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1362 watchdog: watchdog@fffffe40 {
1363 compatible = "atmel,at91sam9260-wdt";
1364 reg = <0xfffffe40 0x10>;
1365 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1367 atmel,watchdog-type = "hardware";
1368 atmel,reset-type = "all";
1370 status = "disabled";
1374 compatible = "atmel,at91sam9x5-sckc";
1375 reg = <0xfffffe50 0x4>;
1377 slow_rc_osc: slow_rc_osc {
1378 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1380 clock-frequency = <32768>;
1381 clock-accuracy = <50000000>;
1382 atmel,startup-time-usec = <75>;
1385 slow_osc: slow_osc {
1386 compatible = "atmel,at91sam9x5-clk-slow-osc";
1388 clocks = <&slow_xtal>;
1389 atmel,startup-time-usec = <1200000>;
1393 compatible = "atmel,at91sam9x5-clk-slow";
1395 clocks = <&slow_rc_osc &slow_osc>;
1400 compatible = "atmel,at91rm9200-rtc";
1401 reg = <0xfffffeb0 0x30>;
1402 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1407 nfc_sram: sram@200000 {
1408 compatible = "mmio-sram";
1410 reg = <0x200000 0x2400>;
1413 usb0: gadget@500000 {
1414 #address-cells = <1>;
1416 compatible = "atmel,sama5d3-udc";
1417 reg = <0x00500000 0x100000
1419 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1420 clocks = <&udphs_clk>, <&utmi>;
1421 clock-names = "pclk", "hclk";
1422 status = "disabled";
1426 atmel,fifo-size = <64>;
1427 atmel,nb-banks = <1>;
1432 atmel,fifo-size = <1024>;
1433 atmel,nb-banks = <3>;
1440 atmel,fifo-size = <1024>;
1441 atmel,nb-banks = <3>;
1448 atmel,fifo-size = <1024>;
1449 atmel,nb-banks = <2>;
1455 atmel,fifo-size = <1024>;
1456 atmel,nb-banks = <2>;
1462 atmel,fifo-size = <1024>;
1463 atmel,nb-banks = <2>;
1469 atmel,fifo-size = <1024>;
1470 atmel,nb-banks = <2>;
1476 atmel,fifo-size = <1024>;
1477 atmel,nb-banks = <2>;
1483 atmel,fifo-size = <1024>;
1484 atmel,nb-banks = <2>;
1489 atmel,fifo-size = <1024>;
1490 atmel,nb-banks = <2>;
1495 atmel,fifo-size = <1024>;
1496 atmel,nb-banks = <2>;
1501 atmel,fifo-size = <1024>;
1502 atmel,nb-banks = <2>;
1507 atmel,fifo-size = <1024>;
1508 atmel,nb-banks = <2>;
1513 atmel,fifo-size = <1024>;
1514 atmel,nb-banks = <2>;
1519 atmel,fifo-size = <1024>;
1520 atmel,nb-banks = <2>;
1525 atmel,fifo-size = <1024>;
1526 atmel,nb-banks = <2>;
1531 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1532 reg = <0x00600000 0x100000>;
1533 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1534 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1535 clock-names = "ohci_clk", "hclk", "uhpck";
1536 status = "disabled";
1540 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1541 reg = <0x00700000 0x100000>;
1542 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1543 clocks = <&utmi>, <&uhphs_clk>;
1544 clock-names = "usb_clk", "ehci_clk";
1545 status = "disabled";
1549 compatible = "atmel,sama5d3-ebi";
1550 #address-cells = <2>;
1552 atmel,smc = <&hsmc>;
1553 reg = <0x10000000 0x10000000
1554 0x40000000 0x30000000>;
1555 ranges = <0x0 0x0 0x10000000 0x10000000
1556 0x1 0x0 0x40000000 0x10000000
1557 0x2 0x0 0x50000000 0x10000000
1558 0x3 0x0 0x60000000 0x10000000>;
1560 status = "disabled";
1562 nand_controller: nand-controller {
1563 compatible = "atmel,sama5d3-nand-controller";
1564 atmel,nfc-sram = <&nfc_sram>;
1565 atmel,nfc-io = <&nfc_io>;
1566 ecc-engine = <&pmecc>;
1567 #address-cells = <2>;
1570 status = "disabled";
1574 nfc_io: nfc-io@70000000 {
1575 compatible = "atmel,sama5d3-nfc-io", "syscon";
1576 reg = <0x70000000 0x8000000>;