GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / sama5d3.dtsi
1 /*
2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
4  *
5  *  Copyright (C) 2013 Atmel,
6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7  *
8  * Licensed under GPLv2 or later.
9  */
10
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
17
18 / {
19         model = "Atmel SAMA5D3 family SoC";
20         compatible = "atmel,sama5d3", "atmel,sama5";
21         interrupt-parent = <&aic>;
22
23         aliases {
24                 serial0 = &dbgu;
25                 serial1 = &usart0;
26                 serial2 = &usart1;
27                 serial3 = &usart2;
28                 serial4 = &usart3;
29                 serial5 = &uart0;
30                 gpio0 = &pioA;
31                 gpio1 = &pioB;
32                 gpio2 = &pioC;
33                 gpio3 = &pioD;
34                 gpio4 = &pioE;
35                 tcb0 = &tcb0;
36                 i2c0 = &i2c0;
37                 i2c1 = &i2c1;
38                 i2c2 = &i2c2;
39                 ssc0 = &ssc0;
40                 ssc1 = &ssc1;
41                 pwm0 = &pwm0;
42         };
43         cpus {
44                 #address-cells = <1>;
45                 #size-cells = <0>;
46                 cpu@0 {
47                         device_type = "cpu";
48                         compatible = "arm,cortex-a5";
49                         reg = <0x0>;
50                 };
51         };
52
53         pmu {
54                 compatible = "arm,cortex-a5-pmu";
55                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
56         };
57
58         memory {
59                 reg = <0x20000000 0x8000000>;
60         };
61
62         clocks {
63                 slow_xtal: slow_xtal {
64                         compatible = "fixed-clock";
65                         #clock-cells = <0>;
66                         clock-frequency = <0>;
67                 };
68
69                 main_xtal: main_xtal {
70                         compatible = "fixed-clock";
71                         #clock-cells = <0>;
72                         clock-frequency = <0>;
73                 };
74
75                 adc_op_clk: adc_op_clk{
76                         compatible = "fixed-clock";
77                         #clock-cells = <0>;
78                         clock-frequency = <1000000>;
79                 };
80         };
81
82         sram: sram@300000 {
83                 compatible = "mmio-sram";
84                 reg = <0x00300000 0x20000>;
85         };
86
87         ahb {
88                 compatible = "simple-bus";
89                 #address-cells = <1>;
90                 #size-cells = <1>;
91                 ranges;
92
93                 apb {
94                         compatible = "simple-bus";
95                         #address-cells = <1>;
96                         #size-cells = <1>;
97                         ranges;
98
99                         mmc0: mmc@f0000000 {
100                                 compatible = "atmel,hsmci";
101                                 reg = <0xf0000000 0x600>;
102                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
103                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
104                                 dma-names = "rxtx";
105                                 pinctrl-names = "default";
106                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
107                                 status = "disabled";
108                                 #address-cells = <1>;
109                                 #size-cells = <0>;
110                                 clocks = <&mci0_clk>;
111                                 clock-names = "mci_clk";
112                         };
113
114                         spi0: spi@f0004000 {
115                                 #address-cells = <1>;
116                                 #size-cells = <0>;
117                                 compatible = "atmel,at91rm9200-spi";
118                                 reg = <0xf0004000 0x100>;
119                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
120                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
121                                        <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
122                                 dma-names = "tx", "rx";
123                                 pinctrl-names = "default";
124                                 pinctrl-0 = <&pinctrl_spi0>;
125                                 clocks = <&spi0_clk>;
126                                 clock-names = "spi_clk";
127                                 status = "disabled";
128                         };
129
130                         ssc0: ssc@f0008000 {
131                                 compatible = "atmel,at91sam9g45-ssc";
132                                 reg = <0xf0008000 0x4000>;
133                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
134                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
135                                        <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
136                                 dma-names = "tx", "rx";
137                                 pinctrl-names = "default";
138                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
139                                 clocks = <&ssc0_clk>;
140                                 clock-names = "pclk";
141                                 status = "disabled";
142                         };
143
144                         tcb0: timer@f0010000 {
145                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
146                                 #address-cells = <1>;
147                                 #size-cells = <0>;
148                                 reg = <0xf0010000 0x100>;
149                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
150                                 clocks = <&tcb0_clk>, <&clk32k>;
151                                 clock-names = "t0_clk", "slow_clk";
152                         };
153
154                         i2c0: i2c@f0014000 {
155                                 compatible = "atmel,at91sam9x5-i2c";
156                                 reg = <0xf0014000 0x4000>;
157                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
158                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
159                                        <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
160                                 dma-names = "tx", "rx";
161                                 pinctrl-names = "default";
162                                 pinctrl-0 = <&pinctrl_i2c0>;
163                                 #address-cells = <1>;
164                                 #size-cells = <0>;
165                                 clocks = <&twi0_clk>;
166                                 status = "disabled";
167                         };
168
169                         i2c1: i2c@f0018000 {
170                                 compatible = "atmel,at91sam9x5-i2c";
171                                 reg = <0xf0018000 0x4000>;
172                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
173                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
174                                        <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
175                                 dma-names = "tx", "rx";
176                                 pinctrl-names = "default";
177                                 pinctrl-0 = <&pinctrl_i2c1>;
178                                 #address-cells = <1>;
179                                 #size-cells = <0>;
180                                 clocks = <&twi1_clk>;
181                                 status = "disabled";
182                         };
183
184                         usart0: serial@f001c000 {
185                                 compatible = "atmel,at91sam9260-usart";
186                                 reg = <0xf001c000 0x100>;
187                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
188                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
189                                        <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
190                                 dma-names = "tx", "rx";
191                                 pinctrl-names = "default";
192                                 pinctrl-0 = <&pinctrl_usart0>;
193                                 clocks = <&usart0_clk>;
194                                 clock-names = "usart";
195                                 status = "disabled";
196                         };
197
198                         usart1: serial@f0020000 {
199                                 compatible = "atmel,at91sam9260-usart";
200                                 reg = <0xf0020000 0x100>;
201                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
202                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
203                                        <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
204                                 dma-names = "tx", "rx";
205                                 pinctrl-names = "default";
206                                 pinctrl-0 = <&pinctrl_usart1>;
207                                 clocks = <&usart1_clk>;
208                                 clock-names = "usart";
209                                 status = "disabled";
210                         };
211
212                         uart0: serial@f0024000 {
213                                 compatible = "atmel,at91sam9260-usart";
214                                 reg = <0xf0024000 0x100>;
215                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
216                                 pinctrl-names = "default";
217                                 pinctrl-0 = <&pinctrl_uart0>;
218                                 clocks = <&uart0_clk>;
219                                 clock-names = "usart";
220                                 status = "disabled";
221                         };
222
223                         pwm0: pwm@f002c000 {
224                                 compatible = "atmel,sama5d3-pwm";
225                                 reg = <0xf002c000 0x300>;
226                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
227                                 #pwm-cells = <3>;
228                                 clocks = <&pwm_clk>;
229                                 status = "disabled";
230                         };
231
232                         isi: isi@f0034000 {
233                                 compatible = "atmel,at91sam9g45-isi";
234                                 reg = <0xf0034000 0x4000>;
235                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
236                                 pinctrl-names = "default";
237                                 pinctrl-0 = <&pinctrl_isi_data_0_7>;
238                                 clocks = <&isi_clk>;
239                                 clock-names = "isi_clk";
240                                 status = "disabled";
241                                 port {
242                                         #address-cells = <1>;
243                                         #size-cells = <0>;
244                                 };
245                         };
246
247                         sfr: sfr@f0038000 {
248                                 compatible = "atmel,sama5d3-sfr", "syscon";
249                                 reg = <0xf0038000 0x60>;
250                         };
251
252                         mmc1: mmc@f8000000 {
253                                 compatible = "atmel,hsmci";
254                                 reg = <0xf8000000 0x600>;
255                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
256                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
257                                 dma-names = "rxtx";
258                                 pinctrl-names = "default";
259                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
260                                 status = "disabled";
261                                 #address-cells = <1>;
262                                 #size-cells = <0>;
263                                 clocks = <&mci1_clk>;
264                                 clock-names = "mci_clk";
265                         };
266
267                         spi1: spi@f8008000 {
268                                 #address-cells = <1>;
269                                 #size-cells = <0>;
270                                 compatible = "atmel,at91rm9200-spi";
271                                 reg = <0xf8008000 0x100>;
272                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
273                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
274                                        <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
275                                 dma-names = "tx", "rx";
276                                 pinctrl-names = "default";
277                                 pinctrl-0 = <&pinctrl_spi1>;
278                                 clocks = <&spi1_clk>;
279                                 clock-names = "spi_clk";
280                                 status = "disabled";
281                         };
282
283                         ssc1: ssc@f800c000 {
284                                 compatible = "atmel,at91sam9g45-ssc";
285                                 reg = <0xf800c000 0x4000>;
286                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
287                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
288                                        <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
289                                 dma-names = "tx", "rx";
290                                 pinctrl-names = "default";
291                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
292                                 clocks = <&ssc1_clk>;
293                                 clock-names = "pclk";
294                                 status = "disabled";
295                         };
296
297                         adc0: adc@f8018000 {
298                                 #address-cells = <1>;
299                                 #size-cells = <0>;
300                                 compatible = "atmel,at91sam9x5-adc";
301                                 reg = <0xf8018000 0x100>;
302                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
303                                 pinctrl-names = "default";
304                                 pinctrl-0 = <
305                                         &pinctrl_adc0_adtrg
306                                         &pinctrl_adc0_ad0
307                                         &pinctrl_adc0_ad1
308                                         &pinctrl_adc0_ad2
309                                         &pinctrl_adc0_ad3
310                                         &pinctrl_adc0_ad4
311                                         &pinctrl_adc0_ad5
312                                         &pinctrl_adc0_ad6
313                                         &pinctrl_adc0_ad7
314                                         &pinctrl_adc0_ad8
315                                         &pinctrl_adc0_ad9
316                                         &pinctrl_adc0_ad10
317                                         &pinctrl_adc0_ad11
318                                         >;
319                                 clocks = <&adc_clk>,
320                                          <&adc_op_clk>;
321                                 clock-names = "adc_clk", "adc_op_clk";
322                                 atmel,adc-channels-used = <0xfff>;
323                                 atmel,adc-startup-time = <40>;
324                                 atmel,adc-use-external-triggers;
325                                 atmel,adc-vref = <3000>;
326                                 atmel,adc-res = <10 12>;
327                                 atmel,adc-sample-hold-time = <11>;
328                                 atmel,adc-res-names = "lowres", "highres";
329                                 status = "disabled";
330
331                                 trigger0 {
332                                         trigger-name = "external-rising";
333                                         trigger-value = <0x1>;
334                                         trigger-external;
335                                 };
336                                 trigger1 {
337                                         trigger-name = "external-falling";
338                                         trigger-value = <0x2>;
339                                         trigger-external;
340                                 };
341                                 trigger2 {
342                                         trigger-name = "external-any";
343                                         trigger-value = <0x3>;
344                                         trigger-external;
345                                 };
346                                 trigger3 {
347                                         trigger-name = "continuous";
348                                         trigger-value = <0x6>;
349                                 };
350                         };
351
352                         i2c2: i2c@f801c000 {
353                                 compatible = "atmel,at91sam9x5-i2c";
354                                 reg = <0xf801c000 0x4000>;
355                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
356                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
357                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
358                                 dma-names = "tx", "rx";
359                                 pinctrl-names = "default";
360                                 pinctrl-0 = <&pinctrl_i2c2>;
361                                 #address-cells = <1>;
362                                 #size-cells = <0>;
363                                 clocks = <&twi2_clk>;
364                                 status = "disabled";
365                         };
366
367                         usart2: serial@f8020000 {
368                                 compatible = "atmel,at91sam9260-usart";
369                                 reg = <0xf8020000 0x100>;
370                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
371                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
372                                        <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
373                                 dma-names = "tx", "rx";
374                                 pinctrl-names = "default";
375                                 pinctrl-0 = <&pinctrl_usart2>;
376                                 clocks = <&usart2_clk>;
377                                 clock-names = "usart";
378                                 status = "disabled";
379                         };
380
381                         usart3: serial@f8024000 {
382                                 compatible = "atmel,at91sam9260-usart";
383                                 reg = <0xf8024000 0x100>;
384                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
385                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
386                                        <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
387                                 dma-names = "tx", "rx";
388                                 pinctrl-names = "default";
389                                 pinctrl-0 = <&pinctrl_usart3>;
390                                 clocks = <&usart3_clk>;
391                                 clock-names = "usart";
392                                 status = "disabled";
393                         };
394
395                         sha@f8034000 {
396                                 compatible = "atmel,at91sam9g46-sha";
397                                 reg = <0xf8034000 0x100>;
398                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
399                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
400                                 dma-names = "tx";
401                                 clocks = <&sha_clk>;
402                                 clock-names = "sha_clk";
403                         };
404
405                         aes@f8038000 {
406                                 compatible = "atmel,at91sam9g46-aes";
407                                 reg = <0xf8038000 0x100>;
408                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
409                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
410                                        <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
411                                 dma-names = "tx", "rx";
412                                 clocks = <&aes_clk>;
413                                 clock-names = "aes_clk";
414                         };
415
416                         tdes@f803c000 {
417                                 compatible = "atmel,at91sam9g46-tdes";
418                                 reg = <0xf803c000 0x100>;
419                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
420                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
421                                        <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
422                                 dma-names = "tx", "rx";
423                                 clocks = <&tdes_clk>;
424                                 clock-names = "tdes_clk";
425                         };
426
427                         trng@f8040000 {
428                                 compatible = "atmel,at91sam9g45-trng";
429                                 reg = <0xf8040000 0x100>;
430                                 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
431                                 clocks = <&trng_clk>;
432                         };
433
434                         hsmc: hsmc@ffffc000 {
435                                 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
436                                 reg = <0xffffc000 0x1000>;
437                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
438                                 clocks = <&hsmc_clk>;
439                                 #address-cells = <1>;
440                                 #size-cells = <1>;
441                                 ranges;
442
443                                 pmecc: ecc-engine@ffffc070 {
444                                         compatible = "atmel,at91sam9g45-pmecc";
445                                         reg = <0xffffc070 0x490>,
446                                               <0xffffc500 0x100>;
447                                 };
448                         };
449
450                         dma0: dma-controller@ffffe600 {
451                                 compatible = "atmel,at91sam9g45-dma";
452                                 reg = <0xffffe600 0x200>;
453                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
454                                 #dma-cells = <2>;
455                                 clocks = <&dma0_clk>;
456                                 clock-names = "dma_clk";
457                         };
458
459                         dma1: dma-controller@ffffe800 {
460                                 compatible = "atmel,at91sam9g45-dma";
461                                 reg = <0xffffe800 0x200>;
462                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
463                                 #dma-cells = <2>;
464                                 clocks = <&dma1_clk>;
465                                 clock-names = "dma_clk";
466                         };
467
468                         ramc0: ramc@ffffea00 {
469                                 compatible = "atmel,sama5d3-ddramc";
470                                 reg = <0xffffea00 0x200>;
471                                 clocks = <&ddrck>, <&mpddr_clk>;
472                                 clock-names = "ddrck", "mpddr";
473                         };
474
475                         dbgu: serial@ffffee00 {
476                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
477                                 reg = <0xffffee00 0x200>;
478                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
479                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
480                                        <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
481                                 dma-names = "tx", "rx";
482                                 pinctrl-names = "default";
483                                 pinctrl-0 = <&pinctrl_dbgu>;
484                                 clocks = <&dbgu_clk>;
485                                 clock-names = "usart";
486                                 status = "disabled";
487                         };
488
489                         aic: interrupt-controller@fffff000 {
490                                 #interrupt-cells = <3>;
491                                 compatible = "atmel,sama5d3-aic";
492                                 interrupt-controller;
493                                 reg = <0xfffff000 0x200>;
494                                 atmel,external-irqs = <47>;
495                         };
496
497                         pinctrl: pinctrl@fffff200 {
498                                 #address-cells = <1>;
499                                 #size-cells = <1>;
500                                 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
501                                 ranges = <0xfffff200 0xfffff200 0xa00>;
502                                 atmel,mux-mask = <
503                                         /*   A          B          C  */
504                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
505                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
506                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
507                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
508                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
509                                         >;
510
511                                 /* shared pinctrl settings */
512                                 adc0 {
513                                         pinctrl_adc0_adtrg: adc0_adtrg {
514                                                 atmel,pins =
515                                                         <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
516                                         };
517                                         pinctrl_adc0_ad0: adc0_ad0 {
518                                                 atmel,pins =
519                                                         <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
520                                         };
521                                         pinctrl_adc0_ad1: adc0_ad1 {
522                                                 atmel,pins =
523                                                         <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
524                                         };
525                                         pinctrl_adc0_ad2: adc0_ad2 {
526                                                 atmel,pins =
527                                                         <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
528                                         };
529                                         pinctrl_adc0_ad3: adc0_ad3 {
530                                                 atmel,pins =
531                                                         <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
532                                         };
533                                         pinctrl_adc0_ad4: adc0_ad4 {
534                                                 atmel,pins =
535                                                         <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
536                                         };
537                                         pinctrl_adc0_ad5: adc0_ad5 {
538                                                 atmel,pins =
539                                                         <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
540                                         };
541                                         pinctrl_adc0_ad6: adc0_ad6 {
542                                                 atmel,pins =
543                                                         <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
544                                         };
545                                         pinctrl_adc0_ad7: adc0_ad7 {
546                                                 atmel,pins =
547                                                         <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
548                                         };
549                                         pinctrl_adc0_ad8: adc0_ad8 {
550                                                 atmel,pins =
551                                                         <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
552                                         };
553                                         pinctrl_adc0_ad9: adc0_ad9 {
554                                                 atmel,pins =
555                                                         <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
556                                         };
557                                         pinctrl_adc0_ad10: adc0_ad10 {
558                                                 atmel,pins =
559                                                         <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
560                                         };
561                                         pinctrl_adc0_ad11: adc0_ad11 {
562                                                 atmel,pins =
563                                                         <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
564                                         };
565                                 };
566
567                                 dbgu {
568                                         pinctrl_dbgu: dbgu-0 {
569                                                 atmel,pins =
570                                                         <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
571                                                          AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
572                                         };
573                                 };
574
575                                 ebi {
576                                         pinctrl_ebi_addr: ebi-addr-0 {
577                                                 atmel,pins =
578                                                         <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
579                                                          AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
580                                                          AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
581                                                          AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
582                                                          AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
583                                                          AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
584                                                          AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
585                                                          AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
586                                                          AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
587                                                          AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
588                                                          AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
589                                                          AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
590                                                          AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
591                                                          AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
592                                                          AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
593                                                          AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
594                                                          AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
595                                                          AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
596                                                          AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
597                                                          AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
598                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
599                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
600                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
601                                         };
602
603                                         pinctrl_ebi_nand_addr: ebi-addr-1 {
604                                                 atmel,pins =
605                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
606                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
607                                         };
608
609                                         pinctrl_ebi_cs0: ebi-cs0-0 {
610                                                 atmel,pins =
611                                                         <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
612                                         };
613
614                                         pinctrl_ebi_cs1: ebi-cs1-0 {
615                                                 atmel,pins =
616                                                         <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
617                                         };
618
619                                         pinctrl_ebi_cs2: ebi-cs2-0 {
620                                                 atmel,pins =
621                                                         <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
622                                         };
623
624                                         pinctrl_ebi_nwait: ebi-nwait-0 {
625                                                 atmel,pins =
626                                                         <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
627                                         };
628
629                                         pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
630                                                 atmel,pins =
631                                                         <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
632                                         };
633                                 };
634
635                                 i2c0 {
636                                         pinctrl_i2c0: i2c0-0 {
637                                                 atmel,pins =
638                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
639                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
640                                         };
641                                 };
642
643                                 i2c1 {
644                                         pinctrl_i2c1: i2c1-0 {
645                                                 atmel,pins =
646                                                         <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
647                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
648                                         };
649                                 };
650
651                                 i2c2 {
652                                         pinctrl_i2c2: i2c2-0 {
653                                                 atmel,pins =
654                                                         <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
655                                                          AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
656                                         };
657                                 };
658
659                                 isi {
660                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
661                                                 atmel,pins =
662                                                         <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
663                                                          AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
664                                                          AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
665                                                          AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
666                                                          AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
667                                                          AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
668                                                          AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
669                                                          AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
670                                                          AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
671                                                          AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
672                                                          AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
673                                         };
674
675                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
676                                                 atmel,pins =
677                                                         <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
678                                                          AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
679                                         };
680
681                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
682                                                 atmel,pins =
683                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
684                                                          AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
685                                         };
686                                 };
687
688                                 mmc0 {
689                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
690                                                 atmel,pins =
691                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A MCI0_CK */
692                                                          AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
693                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD1 periph A MCI0_DA0 with pullup */
694                                         };
695                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
696                                                 atmel,pins =
697                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
698                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
699                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD4 periph A MCI0_DA3 with pullup */
700                                         };
701                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
702                                                 atmel,pins =
703                                                         <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
704                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
705                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
706                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
707                                         };
708                                 };
709
710                                 mmc1 {
711                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
712                                                 atmel,pins =
713                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
714                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
715                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
716                                         };
717                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
718                                                 atmel,pins =
719                                                         <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
720                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
721                                                          AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
722                                         };
723                                 };
724
725                                 nand0 {
726                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
727                                                 atmel,pins =
728                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PE21 periph A with pullup */
729                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PE22 periph A with pullup */
730                                         };
731                                 };
732
733                                 pwm0 {
734                                         pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
735                                                 atmel,pins =
736                                                         <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
737                                         };
738                                         pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
739                                                 atmel,pins =
740                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTX0 */
741                                         };
742                                         pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
743                                                 atmel,pins =
744                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
745                                         };
746                                         pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
747                                                 atmel,pins =
748                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTX1 */
749                                         };
750
751                                         pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
752                                                 atmel,pins =
753                                                         <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
754                                         };
755                                         pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
756                                                 atmel,pins =
757                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GRX0 */
758                                         };
759                                         pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
760                                                 atmel,pins =
761                                                         <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
762                                         };
763                                         pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
764                                                 atmel,pins =
765                                                         <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
766                                         };
767                                         pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
768                                                 atmel,pins =
769                                                         <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GRX1 */
770                                         };
771                                         pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
772                                                 atmel,pins =
773                                                         <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
774                                         };
775
776                                         pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
777                                                 atmel,pins =
778                                                         <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTXCK */
779                                         };
780                                         pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
781                                                 atmel,pins =
782                                                         <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA4 and TIOA0 */
783                                         };
784                                         pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
785                                                 atmel,pins =
786                                                         <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* conflicts with GTXEN */
787                                         };
788                                         pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
789                                                 atmel,pins =
790                                                         <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA5 and TIOB0 */
791                                         };
792
793                                         pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
794                                                 atmel,pins =
795                                                         <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
796                                         };
797                                         pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
798                                                 atmel,pins =
799                                                         <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA6 and TCLK0 */
800                                         };
801                                         pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
802                                                 atmel,pins =
803                                                         <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
804                                         };
805                                         pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
806                                                 atmel,pins =
807                                                         <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* conflicts with MCI0_DA7 */
808                                         };
809                                 };
810
811                                 spi0 {
812                                         pinctrl_spi0: spi0-0 {
813                                                 atmel,pins =
814                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A SPI0_MISO pin */
815                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A SPI0_MOSI pin */
816                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
817                                         };
818                                 };
819
820                                 spi1 {
821                                         pinctrl_spi1: spi1-0 {
822                                                 atmel,pins =
823                                                         <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A SPI1_MISO pin */
824                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A SPI1_MOSI pin */
825                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
826                                         };
827                                 };
828
829                                 ssc0 {
830                                         pinctrl_ssc0_tx: ssc0_tx {
831                                                 atmel,pins =
832                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A TK0 */
833                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC17 periph A TF0 */
834                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
835                                         };
836
837                                         pinctrl_ssc0_rx: ssc0_rx {
838                                                 atmel,pins =
839                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A RK0 */
840                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC20 periph A RF0 */
841                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
842                                         };
843                                 };
844
845                                 ssc1 {
846                                         pinctrl_ssc1_tx: ssc1_tx {
847                                                 atmel,pins =
848                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB2 periph B TK1, conflicts with GTX2 */
849                                                          AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B TF1, conflicts with GTX3 */
850                                                          AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB6 periph B TD1, conflicts with TD1 */
851                                         };
852
853                                         pinctrl_ssc1_rx: ssc1_rx {
854                                                 atmel,pins =
855                                                         <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB7 periph B RK1, conflicts with EREFCK */
856                                                          AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB10 periph B RF1, conflicts with GTXER */
857                                                          AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
858                                         };
859                                 };
860
861                                 uart0 {
862                                         pinctrl_uart0: uart0-0 {
863                                                 atmel,pins =
864                                                         <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* conflicts with PWMFI2, ISI_D8 */
865                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
866                                         };
867                                 };
868
869                                 uart1 {
870                                         pinctrl_uart1: uart1-0 {
871                                                 atmel,pins =
872                                                         <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* conflicts with TWD0, ISI_VSYNC */
873                                                          AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
874                                         };
875                                 };
876
877                                 usart0 {
878                                         pinctrl_usart0: usart0-0 {
879                                                 atmel,pins =
880                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
881                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
882                                         };
883
884                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
885                                                 atmel,pins =
886                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
887                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
888                                         };
889                                 };
890
891                                 usart1 {
892                                         pinctrl_usart1: usart1-0 {
893                                                 atmel,pins =
894                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
895                                                          AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
896                                         };
897
898                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
899                                                 atmel,pins =
900                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB26 periph A, conflicts with GRX7 */
901                                                          AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
902                                         };
903                                 };
904
905                                 usart2 {
906                                         pinctrl_usart2: usart2-0 {
907                                                 atmel,pins =
908                                                         <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* conflicts with A25 */
909                                                          AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
910                                         };
911
912                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
913                                                 atmel,pins =
914                                                         <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE23 periph B, conflicts with A23 */
915                                                          AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
916                                         };
917                                 };
918
919                                 usart3 {
920                                         pinctrl_usart3: usart3-0 {
921                                                 atmel,pins =
922                                                         <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* conflicts with A18 */
923                                                          AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
924                                         };
925
926                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
927                                                 atmel,pins =
928                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE16 periph B, conflicts with A16 */
929                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
930                                         };
931                                 };
932
933
934                                 pioA: gpio@fffff200 {
935                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
936                                         reg = <0xfffff200 0x100>;
937                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
938                                         #gpio-cells = <2>;
939                                         gpio-controller;
940                                         interrupt-controller;
941                                         #interrupt-cells = <2>;
942                                         clocks = <&pioA_clk>;
943                                 };
944
945                                 pioB: gpio@fffff400 {
946                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
947                                         reg = <0xfffff400 0x100>;
948                                         interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
949                                         #gpio-cells = <2>;
950                                         gpio-controller;
951                                         interrupt-controller;
952                                         #interrupt-cells = <2>;
953                                         clocks = <&pioB_clk>;
954                                 };
955
956                                 pioC: gpio@fffff600 {
957                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
958                                         reg = <0xfffff600 0x100>;
959                                         interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
960                                         #gpio-cells = <2>;
961                                         gpio-controller;
962                                         interrupt-controller;
963                                         #interrupt-cells = <2>;
964                                         clocks = <&pioC_clk>;
965                                 };
966
967                                 pioD: gpio@fffff800 {
968                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
969                                         reg = <0xfffff800 0x100>;
970                                         interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
971                                         #gpio-cells = <2>;
972                                         gpio-controller;
973                                         interrupt-controller;
974                                         #interrupt-cells = <2>;
975                                         clocks = <&pioD_clk>;
976                                 };
977
978                                 pioE: gpio@fffffa00 {
979                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
980                                         reg = <0xfffffa00 0x100>;
981                                         interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
982                                         #gpio-cells = <2>;
983                                         gpio-controller;
984                                         interrupt-controller;
985                                         #interrupt-cells = <2>;
986                                         clocks = <&pioE_clk>;
987                                 };
988                         };
989
990                         pmc: pmc@fffffc00 {
991                                 compatible = "atmel,sama5d3-pmc", "syscon";
992                                 reg = <0xfffffc00 0x120>;
993                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
994                                 interrupt-controller;
995                                 #address-cells = <1>;
996                                 #size-cells = <0>;
997                                 #interrupt-cells = <1>;
998
999                                 main_rc_osc: main_rc_osc {
1000                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
1001                                         #clock-cells = <0>;
1002                                         interrupt-parent = <&pmc>;
1003                                         interrupts = <AT91_PMC_MOSCRCS>;
1004                                         clock-frequency = <12000000>;
1005                                         clock-accuracy = <50000000>;
1006                                 };
1007
1008                                 main_osc: main_osc {
1009                                         compatible = "atmel,at91rm9200-clk-main-osc";
1010                                         #clock-cells = <0>;
1011                                         interrupt-parent = <&pmc>;
1012                                         interrupts = <AT91_PMC_MOSCS>;
1013                                         clocks = <&main_xtal>;
1014                                 };
1015
1016                                 main: mainck {
1017                                         compatible = "atmel,at91sam9x5-clk-main";
1018                                         #clock-cells = <0>;
1019                                         interrupt-parent = <&pmc>;
1020                                         interrupts = <AT91_PMC_MOSCSELS>;
1021                                         clocks = <&main_rc_osc &main_osc>;
1022                                 };
1023
1024                                 plla: pllack {
1025                                         compatible = "atmel,sama5d3-clk-pll";
1026                                         #clock-cells = <0>;
1027                                         interrupt-parent = <&pmc>;
1028                                         interrupts = <AT91_PMC_LOCKA>;
1029                                         clocks = <&main>;
1030                                         reg = <0>;
1031                                         atmel,clk-input-range = <8000000 50000000>;
1032                                         #atmel,pll-clk-output-range-cells = <4>;
1033                                         atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
1034                                 };
1035
1036                                 plladiv: plladivck {
1037                                         compatible = "atmel,at91sam9x5-clk-plldiv";
1038                                         #clock-cells = <0>;
1039                                         clocks = <&plla>;
1040                                 };
1041
1042                                 utmi: utmick {
1043                                         compatible = "atmel,at91sam9x5-clk-utmi";
1044                                         #clock-cells = <0>;
1045                                         interrupt-parent = <&pmc>;
1046                                         interrupts = <AT91_PMC_LOCKU>;
1047                                         clocks = <&main>;
1048                                 };
1049
1050                                 mck: masterck {
1051                                         compatible = "atmel,at91sam9x5-clk-master";
1052                                         #clock-cells = <0>;
1053                                         interrupt-parent = <&pmc>;
1054                                         interrupts = <AT91_PMC_MCKRDY>;
1055                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1056                                         atmel,clk-output-range = <0 166000000>;
1057                                         atmel,clk-divisors = <1 2 4 3>;
1058                                 };
1059
1060                                 usb: usbck {
1061                                         compatible = "atmel,at91sam9x5-clk-usb";
1062                                         #clock-cells = <0>;
1063                                         clocks = <&plladiv>, <&utmi>;
1064                                 };
1065
1066                                 prog: progck {
1067                                         compatible = "atmel,at91sam9x5-clk-programmable";
1068                                         #address-cells = <1>;
1069                                         #size-cells = <0>;
1070                                         interrupt-parent = <&pmc>;
1071                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1072
1073                                         prog0: prog0 {
1074                                                 #clock-cells = <0>;
1075                                                 reg = <0>;
1076                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
1077                                         };
1078
1079                                         prog1: prog1 {
1080                                                 #clock-cells = <0>;
1081                                                 reg = <1>;
1082                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
1083                                         };
1084
1085                                         prog2: prog2 {
1086                                                 #clock-cells = <0>;
1087                                                 reg = <2>;
1088                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
1089                                         };
1090                                 };
1091
1092                                 smd: smdclk {
1093                                         compatible = "atmel,at91sam9x5-clk-smd";
1094                                         #clock-cells = <0>;
1095                                         clocks = <&plladiv>, <&utmi>;
1096                                 };
1097
1098                                 systemck {
1099                                         compatible = "atmel,at91rm9200-clk-system";
1100                                         #address-cells = <1>;
1101                                         #size-cells = <0>;
1102
1103                                         ddrck: ddrck {
1104                                                 #clock-cells = <0>;
1105                                                 reg = <2>;
1106                                                 clocks = <&mck>;
1107                                         };
1108
1109                                         smdck: smdck {
1110                                                 #clock-cells = <0>;
1111                                                 reg = <4>;
1112                                                 clocks = <&smd>;
1113                                         };
1114
1115                                         uhpck: uhpck {
1116                                                 #clock-cells = <0>;
1117                                                 reg = <6>;
1118                                                 clocks = <&usb>;
1119                                         };
1120
1121                                         udpck: udpck {
1122                                                 #clock-cells = <0>;
1123                                                 reg = <7>;
1124                                                 clocks = <&usb>;
1125                                         };
1126
1127                                         pck0: pck0 {
1128                                                 #clock-cells = <0>;
1129                                                 reg = <8>;
1130                                                 clocks = <&prog0>;
1131                                         };
1132
1133                                         pck1: pck1 {
1134                                                 #clock-cells = <0>;
1135                                                 reg = <9>;
1136                                                 clocks = <&prog1>;
1137                                         };
1138
1139                                         pck2: pck2 {
1140                                                 #clock-cells = <0>;
1141                                                 reg = <10>;
1142                                                 clocks = <&prog2>;
1143                                         };
1144                                 };
1145
1146                                 periphck {
1147                                         compatible = "atmel,at91sam9x5-clk-peripheral";
1148                                         #address-cells = <1>;
1149                                         #size-cells = <0>;
1150                                         clocks = <&mck>;
1151
1152                                         dbgu_clk: dbgu_clk {
1153                                                 #clock-cells = <0>;
1154                                                 reg = <2>;
1155                                         };
1156
1157                                         hsmc_clk: hsmc_clk {
1158                                                 #clock-cells = <0>;
1159                                                 reg = <5>;
1160                                         };
1161
1162                                         pioA_clk: pioA_clk {
1163                                                 #clock-cells = <0>;
1164                                                 reg = <6>;
1165                                         };
1166
1167                                         pioB_clk: pioB_clk {
1168                                                 #clock-cells = <0>;
1169                                                 reg = <7>;
1170                                         };
1171
1172                                         pioC_clk: pioC_clk {
1173                                                 #clock-cells = <0>;
1174                                                 reg = <8>;
1175                                         };
1176
1177                                         pioD_clk: pioD_clk {
1178                                                 #clock-cells = <0>;
1179                                                 reg = <9>;
1180                                         };
1181
1182                                         pioE_clk: pioE_clk {
1183                                                 #clock-cells = <0>;
1184                                                 reg = <10>;
1185                                         };
1186
1187                                         usart0_clk: usart0_clk {
1188                                                 #clock-cells = <0>;
1189                                                 reg = <12>;
1190                                                 atmel,clk-output-range = <0 83000000>;
1191                                         };
1192
1193                                         usart1_clk: usart1_clk {
1194                                                 #clock-cells = <0>;
1195                                                 reg = <13>;
1196                                                 atmel,clk-output-range = <0 83000000>;
1197                                         };
1198
1199                                         usart2_clk: usart2_clk {
1200                                                 #clock-cells = <0>;
1201                                                 reg = <14>;
1202                                                 atmel,clk-output-range = <0 83000000>;
1203                                         };
1204
1205                                         usart3_clk: usart3_clk {
1206                                                 #clock-cells = <0>;
1207                                                 reg = <15>;
1208                                                 atmel,clk-output-range = <0 83000000>;
1209                                         };
1210
1211                                         uart0_clk: uart0_clk {
1212                                                 #clock-cells = <0>;
1213                                                 reg = <16>;
1214                                                 atmel,clk-output-range = <0 83000000>;
1215                                         };
1216
1217                                         twi0_clk: twi0_clk {
1218                                                 reg = <18>;
1219                                                 #clock-cells = <0>;
1220                                                 atmel,clk-output-range = <0 41500000>;
1221                                         };
1222
1223                                         twi1_clk: twi1_clk {
1224                                                 #clock-cells = <0>;
1225                                                 reg = <19>;
1226                                                 atmel,clk-output-range = <0 41500000>;
1227                                         };
1228
1229                                         twi2_clk: twi2_clk {
1230                                                 #clock-cells = <0>;
1231                                                 reg = <20>;
1232                                                 atmel,clk-output-range = <0 41500000>;
1233                                         };
1234
1235                                         mci0_clk: mci0_clk {
1236                                                 #clock-cells = <0>;
1237                                                 reg = <21>;
1238                                         };
1239
1240                                         mci1_clk: mci1_clk {
1241                                                 #clock-cells = <0>;
1242                                                 reg = <22>;
1243                                         };
1244
1245                                         spi0_clk: spi0_clk {
1246                                                 #clock-cells = <0>;
1247                                                 reg = <24>;
1248                                                 atmel,clk-output-range = <0 166000000>;
1249                                         };
1250
1251                                         spi1_clk: spi1_clk {
1252                                                 #clock-cells = <0>;
1253                                                 reg = <25>;
1254                                                 atmel,clk-output-range = <0 166000000>;
1255                                         };
1256
1257                                         tcb0_clk: tcb0_clk {
1258                                                 #clock-cells = <0>;
1259                                                 reg = <26>;
1260                                                 atmel,clk-output-range = <0 166000000>;
1261                                         };
1262
1263                                         pwm_clk: pwm_clk {
1264                                                 #clock-cells = <0>;
1265                                                 reg = <28>;
1266                                         };
1267
1268                                         adc_clk: adc_clk {
1269                                                 #clock-cells = <0>;
1270                                                 reg = <29>;
1271                                                 atmel,clk-output-range = <0 83000000>;
1272                                         };
1273
1274                                         dma0_clk: dma0_clk {
1275                                                 #clock-cells = <0>;
1276                                                 reg = <30>;
1277                                         };
1278
1279                                         dma1_clk: dma1_clk {
1280                                                 #clock-cells = <0>;
1281                                                 reg = <31>;
1282                                         };
1283
1284                                         uhphs_clk: uhphs_clk {
1285                                                 #clock-cells = <0>;
1286                                                 reg = <32>;
1287                                         };
1288
1289                                         udphs_clk: udphs_clk {
1290                                                 #clock-cells = <0>;
1291                                                 reg = <33>;
1292                                         };
1293
1294                                         isi_clk: isi_clk {
1295                                                 #clock-cells = <0>;
1296                                                 reg = <37>;
1297                                         };
1298
1299                                         ssc0_clk: ssc0_clk {
1300                                                 #clock-cells = <0>;
1301                                                 reg = <38>;
1302                                                 atmel,clk-output-range = <0 83000000>;
1303                                         };
1304
1305                                         ssc1_clk: ssc1_clk {
1306                                                 #clock-cells = <0>;
1307                                                 reg = <39>;
1308                                                 atmel,clk-output-range = <0 83000000>;
1309                                         };
1310
1311                                         sha_clk: sha_clk {
1312                                                 #clock-cells = <0>;
1313                                                 reg = <42>;
1314                                         };
1315
1316                                         aes_clk: aes_clk {
1317                                                 #clock-cells = <0>;
1318                                                 reg = <43>;
1319                                         };
1320
1321                                         tdes_clk: tdes_clk {
1322                                                 #clock-cells = <0>;
1323                                                 reg = <44>;
1324                                         };
1325
1326                                         trng_clk: trng_clk {
1327                                                 #clock-cells = <0>;
1328                                                 reg = <45>;
1329                                         };
1330
1331                                         fuse_clk: fuse_clk {
1332                                                 #clock-cells = <0>;
1333                                                 reg = <48>;
1334                                         };
1335
1336                                         mpddr_clk: mpddr_clk {
1337                                                 #clock-cells = <0>;
1338                                                 reg = <49>;
1339                                         };
1340                                 };
1341                         };
1342
1343                         reset_controller: rstc@fffffe00 {
1344                                 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1345                                 reg = <0xfffffe00 0x10>;
1346                                 clocks = <&clk32k>;
1347                         };
1348
1349                         shutdown_controller: shutdown-controller@fffffe10 {
1350                                 compatible = "atmel,at91sam9x5-shdwc";
1351                                 reg = <0xfffffe10 0x10>;
1352                                 clocks = <&clk32k>;
1353                         };
1354
1355                         pit: timer@fffffe30 {
1356                                 compatible = "atmel,at91sam9260-pit";
1357                                 reg = <0xfffffe30 0xf>;
1358                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1359                                 clocks = <&mck>;
1360                         };
1361
1362                         watchdog: watchdog@fffffe40 {
1363                                 compatible = "atmel,at91sam9260-wdt";
1364                                 reg = <0xfffffe40 0x10>;
1365                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1366                                 clocks = <&clk32k>;
1367                                 atmel,watchdog-type = "hardware";
1368                                 atmel,reset-type = "all";
1369                                 atmel,dbg-halt;
1370                                 status = "disabled";
1371                         };
1372
1373                         sckc@fffffe50 {
1374                                 compatible = "atmel,at91sam9x5-sckc";
1375                                 reg = <0xfffffe50 0x4>;
1376
1377                                 slow_rc_osc: slow_rc_osc {
1378                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1379                                         #clock-cells = <0>;
1380                                         clock-frequency = <32768>;
1381                                         clock-accuracy = <50000000>;
1382                                         atmel,startup-time-usec = <75>;
1383                                 };
1384
1385                                 slow_osc: slow_osc {
1386                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1387                                         #clock-cells = <0>;
1388                                         clocks = <&slow_xtal>;
1389                                         atmel,startup-time-usec = <1200000>;
1390                                 };
1391
1392                                 clk32k: slowck {
1393                                         compatible = "atmel,at91sam9x5-clk-slow";
1394                                         #clock-cells = <0>;
1395                                         clocks = <&slow_rc_osc &slow_osc>;
1396                                 };
1397                         };
1398
1399                         rtc@fffffeb0 {
1400                                 compatible = "atmel,at91rm9200-rtc";
1401                                 reg = <0xfffffeb0 0x30>;
1402                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1403                                 clocks = <&clk32k>;
1404                         };
1405                 };
1406
1407                 nfc_sram: sram@200000 {
1408                         compatible = "mmio-sram";
1409                         no-memory-wc;
1410                         reg = <0x200000 0x2400>;
1411                 };
1412
1413                 usb0: gadget@500000 {
1414                         #address-cells = <1>;
1415                         #size-cells = <0>;
1416                         compatible = "atmel,sama5d3-udc";
1417                         reg = <0x00500000 0x100000
1418                                0xf8030000 0x4000>;
1419                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1420                         clocks = <&udphs_clk>, <&utmi>;
1421                         clock-names = "pclk", "hclk";
1422                         status = "disabled";
1423
1424                         ep@0 {
1425                                 reg = <0>;
1426                                 atmel,fifo-size = <64>;
1427                                 atmel,nb-banks = <1>;
1428                         };
1429
1430                         ep@1 {
1431                                 reg = <1>;
1432                                 atmel,fifo-size = <1024>;
1433                                 atmel,nb-banks = <3>;
1434                                 atmel,can-dma;
1435                                 atmel,can-isoc;
1436                         };
1437
1438                         ep@2 {
1439                                 reg = <2>;
1440                                 atmel,fifo-size = <1024>;
1441                                 atmel,nb-banks = <3>;
1442                                 atmel,can-dma;
1443                                 atmel,can-isoc;
1444                         };
1445
1446                         ep@3 {
1447                                 reg = <3>;
1448                                 atmel,fifo-size = <1024>;
1449                                 atmel,nb-banks = <2>;
1450                                 atmel,can-dma;
1451                         };
1452
1453                         ep@4 {
1454                                 reg = <4>;
1455                                 atmel,fifo-size = <1024>;
1456                                 atmel,nb-banks = <2>;
1457                                 atmel,can-dma;
1458                         };
1459
1460                         ep@5 {
1461                                 reg = <5>;
1462                                 atmel,fifo-size = <1024>;
1463                                 atmel,nb-banks = <2>;
1464                                 atmel,can-dma;
1465                         };
1466
1467                         ep@6 {
1468                                 reg = <6>;
1469                                 atmel,fifo-size = <1024>;
1470                                 atmel,nb-banks = <2>;
1471                                 atmel,can-dma;
1472                         };
1473
1474                         ep@7 {
1475                                 reg = <7>;
1476                                 atmel,fifo-size = <1024>;
1477                                 atmel,nb-banks = <2>;
1478                                 atmel,can-dma;
1479                         };
1480
1481                         ep@8 {
1482                                 reg = <8>;
1483                                 atmel,fifo-size = <1024>;
1484                                 atmel,nb-banks = <2>;
1485                         };
1486
1487                         ep@9 {
1488                                 reg = <9>;
1489                                 atmel,fifo-size = <1024>;
1490                                 atmel,nb-banks = <2>;
1491                         };
1492
1493                         ep@10 {
1494                                 reg = <10>;
1495                                 atmel,fifo-size = <1024>;
1496                                 atmel,nb-banks = <2>;
1497                         };
1498
1499                         ep@11 {
1500                                 reg = <11>;
1501                                 atmel,fifo-size = <1024>;
1502                                 atmel,nb-banks = <2>;
1503                         };
1504
1505                         ep@12 {
1506                                 reg = <12>;
1507                                 atmel,fifo-size = <1024>;
1508                                 atmel,nb-banks = <2>;
1509                         };
1510
1511                         ep@13 {
1512                                 reg = <13>;
1513                                 atmel,fifo-size = <1024>;
1514                                 atmel,nb-banks = <2>;
1515                         };
1516
1517                         ep@14 {
1518                                 reg = <14>;
1519                                 atmel,fifo-size = <1024>;
1520                                 atmel,nb-banks = <2>;
1521                         };
1522
1523                         ep@15 {
1524                                 reg = <15>;
1525                                 atmel,fifo-size = <1024>;
1526                                 atmel,nb-banks = <2>;
1527                         };
1528                 };
1529
1530                 usb1: ohci@600000 {
1531                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1532                         reg = <0x00600000 0x100000>;
1533                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1534                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1535                         clock-names = "ohci_clk", "hclk", "uhpck";
1536                         status = "disabled";
1537                 };
1538
1539                 usb2: ehci@700000 {
1540                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1541                         reg = <0x00700000 0x100000>;
1542                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1543                         clocks = <&utmi>, <&uhphs_clk>;
1544                         clock-names = "usb_clk", "ehci_clk";
1545                         status = "disabled";
1546                 };
1547
1548                 ebi: ebi@10000000 {
1549                         compatible = "atmel,sama5d3-ebi";
1550                         #address-cells = <2>;
1551                         #size-cells = <1>;
1552                         atmel,smc = <&hsmc>;
1553                         reg = <0x10000000 0x10000000
1554                                0x40000000 0x30000000>;
1555                         ranges = <0x0 0x0 0x10000000 0x10000000
1556                                   0x1 0x0 0x40000000 0x10000000
1557                                   0x2 0x0 0x50000000 0x10000000
1558                                   0x3 0x0 0x60000000 0x10000000>;
1559                         clocks = <&mck>;
1560                         status = "disabled";
1561
1562                         nand_controller: nand-controller {
1563                                 compatible = "atmel,sama5d3-nand-controller";
1564                                 atmel,nfc-sram = <&nfc_sram>;
1565                                 atmel,nfc-io = <&nfc_io>;
1566                                 ecc-engine = <&pmecc>;
1567                                 #address-cells = <2>;
1568                                 #size-cells = <1>;
1569                                 ranges;
1570                                 status = "disabled";
1571                         };
1572                 };
1573
1574                 nfc_io: nfc-io@70000000 {
1575                         compatible = "atmel,sama5d3-nfc-io", "syscon";
1576                         reg = <0x70000000 0x8000000>;
1577                 };
1578         };
1579 };