1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
48 compatible = "arm,cortex-a8";
54 compatible = "simple-bus";
60 compatible = "simple-bus";
65 compatible = "fixed-clock";
67 clock-frequency = <0>;
68 clock-output-names = "xxti";
72 xusbxti: oscillator@1 {
73 compatible = "fixed-clock";
75 clock-frequency = <0>;
76 clock-output-names = "xusbxti";
81 onenand: onenand@b0000000 {
82 compatible = "samsung,s5pv210-onenand";
83 reg = <0xb0600000 0x2000>,
86 interrupt-parent = <&vic1>;
88 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
89 clock-names = "bus", "onenand";
96 compatible = "samsung,s5pv210-chipid";
97 reg = <0xe0000000 0x1000>;
100 clocks: clock-controller@e0100000 {
101 compatible = "samsung,s5pv210-clock";
102 reg = <0xe0100000 0x10000>;
103 clock-names = "xxti", "xusbxti";
104 clocks = <&xxti>, <&xusbxti>;
108 pmu_syscon: syscon@e0108000 {
109 compatible = "samsung-s5pv210-pmu", "syscon";
110 reg = <0xe0108000 0x8000>;
113 pinctrl0: pinctrl@e0200000 {
114 compatible = "samsung,s5pv210-pinctrl";
115 reg = <0xe0200000 0x1000>;
116 interrupt-parent = <&vic0>;
119 wakeup-interrupt-controller {
120 compatible = "samsung,exynos4210-wakeup-eint";
122 interrupt-parent = <&vic0>;
126 pdma0: dma@e0900000 {
127 compatible = "arm,pl330", "arm,primecell";
128 reg = <0xe0900000 0x1000>;
129 interrupt-parent = <&vic0>;
131 clocks = <&clocks CLK_PDMA0>;
132 clock-names = "apb_pclk";
135 #dma-requests = <32>;
138 pdma1: dma@e0a00000 {
139 compatible = "arm,pl330", "arm,primecell";
140 reg = <0xe0a00000 0x1000>;
141 interrupt-parent = <&vic0>;
143 clocks = <&clocks CLK_PDMA1>;
144 clock-names = "apb_pclk";
147 #dma-requests = <32>;
151 compatible = "samsung,s5pv210-spi";
152 reg = <0xe1300000 0x1000>;
153 interrupt-parent = <&vic1>;
155 dmas = <&pdma0 7>, <&pdma0 6>;
156 dma-names = "tx", "rx";
157 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
158 clock-names = "spi", "spi_busclk0";
159 pinctrl-names = "default";
160 pinctrl-0 = <&spi0_bus>;
161 #address-cells = <1>;
167 compatible = "samsung,s5pv210-spi";
168 reg = <0xe1400000 0x1000>;
169 interrupt-parent = <&vic1>;
171 dmas = <&pdma1 7>, <&pdma1 6>;
172 dma-names = "tx", "rx";
173 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
174 clock-names = "spi", "spi_busclk0";
175 pinctrl-names = "default";
176 pinctrl-0 = <&spi1_bus>;
177 #address-cells = <1>;
182 keypad: keypad@e1600000 {
183 compatible = "samsung,s5pv210-keypad";
184 reg = <0xe1600000 0x1000>;
185 interrupt-parent = <&vic2>;
187 clocks = <&clocks CLK_KEYIF>;
188 clock-names = "keypad";
193 compatible = "samsung,s3c2440-i2c";
194 reg = <0xe1800000 0x1000>;
195 interrupt-parent = <&vic1>;
197 clocks = <&clocks CLK_I2C0>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&i2c0_bus>;
201 #address-cells = <1>;
207 compatible = "samsung,s3c2440-i2c";
208 reg = <0xe1a00000 0x1000>;
209 interrupt-parent = <&vic1>;
211 clocks = <&clocks CLK_I2C2>;
213 pinctrl-0 = <&i2c2_bus>;
214 pinctrl-names = "default";
215 #address-cells = <1>;
220 clk_audss: clock-controller@eee10000 {
221 compatible = "samsung,s5pv210-audss-clock";
222 reg = <0xeee10000 0x1000>;
223 clock-names = "hclk", "xxti",
226 clocks = <&clocks DOUT_HCLKP>, <&xxti>,
228 <&clocks SCLK_AUDIO0>;
233 compatible = "samsung,s5pv210-i2s";
234 reg = <0xeee30000 0x1000>;
235 interrupt-parent = <&vic2>;
237 dma-names = "rx", "tx", "tx-sec";
238 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
242 clocks = <&clk_audss CLK_I2S>,
243 <&clk_audss CLK_I2S>,
244 <&clk_audss CLK_DOUT_AUD_BUS>;
245 samsung,idma-addr = <0xc0010000>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&i2s0_bus>;
248 #sound-dai-cells = <0>;
253 compatible = "samsung,s3c6410-i2s";
254 reg = <0xe2100000 0x1000>;
255 interrupt-parent = <&vic2>;
257 dma-names = "rx", "tx";
258 dmas = <&pdma1 12>, <&pdma1 13>;
259 clock-names = "iis", "i2s_opclk0";
260 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&i2s1_bus>;
263 #sound-dai-cells = <0>;
268 compatible = "samsung,s3c6410-i2s";
269 reg = <0xe2a00000 0x1000>;
270 interrupt-parent = <&vic2>;
272 dma-names = "rx", "tx";
273 dmas = <&pdma1 14>, <&pdma1 15>;
274 clock-names = "iis", "i2s_opclk0";
275 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
276 pinctrl-names = "default";
277 pinctrl-0 = <&i2s2_bus>;
278 #sound-dai-cells = <0>;
283 compatible = "samsung,s5pc100-pwm";
284 reg = <0xe2500000 0x1000>;
285 interrupt-parent = <&vic0>;
286 interrupts = <21>, <22>, <23>, <24>, <25>;
287 clock-names = "timers";
288 clocks = <&clocks CLK_PWM>;
292 watchdog: watchdog@e2700000 {
293 compatible = "samsung,s3c6410-wdt";
294 reg = <0xe2700000 0x1000>;
295 interrupt-parent = <&vic0>;
297 clock-names = "watchdog";
298 clocks = <&clocks CLK_WDT>;
302 compatible = "samsung,s3c6410-rtc";
303 reg = <0xe2800000 0x100>;
304 interrupt-parent = <&vic0>;
305 interrupts = <28>, <29>;
306 clocks = <&clocks CLK_RTC>;
311 uart0: serial@e2900000 {
312 compatible = "samsung,s5pv210-uart";
313 reg = <0xe2900000 0x400>;
314 interrupt-parent = <&vic1>;
316 clock-names = "uart", "clk_uart_baud0",
318 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
319 <&clocks SCLK_UART0>;
323 uart1: serial@e2900400 {
324 compatible = "samsung,s5pv210-uart";
325 reg = <0xe2900400 0x400>;
326 interrupt-parent = <&vic1>;
328 clock-names = "uart", "clk_uart_baud0",
330 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
331 <&clocks SCLK_UART1>;
335 uart2: serial@e2900800 {
336 compatible = "samsung,s5pv210-uart";
337 reg = <0xe2900800 0x400>;
338 interrupt-parent = <&vic1>;
340 clock-names = "uart", "clk_uart_baud0",
342 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
343 <&clocks SCLK_UART2>;
347 uart3: serial@e2900c00 {
348 compatible = "samsung,s5pv210-uart";
349 reg = <0xe2900c00 0x400>;
350 interrupt-parent = <&vic1>;
352 clock-names = "uart", "clk_uart_baud0",
354 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
355 <&clocks SCLK_UART3>;
359 sdhci0: sdhci@eb000000 {
360 compatible = "samsung,s3c6410-sdhci";
361 reg = <0xeb000000 0x100000>;
362 interrupt-parent = <&vic1>;
364 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
365 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
370 sdhci1: sdhci@eb100000 {
371 compatible = "samsung,s3c6410-sdhci";
372 reg = <0xeb100000 0x100000>;
373 interrupt-parent = <&vic1>;
375 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
376 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
381 sdhci2: sdhci@eb200000 {
382 compatible = "samsung,s3c6410-sdhci";
383 reg = <0xeb200000 0x100000>;
384 interrupt-parent = <&vic1>;
386 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
387 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
392 sdhci3: sdhci@eb300000 {
393 compatible = "samsung,s3c6410-sdhci";
394 reg = <0xeb300000 0x100000>;
395 interrupt-parent = <&vic3>;
397 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
398 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
403 hsotg: hsotg@ec000000 {
404 compatible = "samsung,s3c6400-hsotg";
405 reg = <0xec000000 0x20000>;
406 interrupt-parent = <&vic1>;
408 clocks = <&clocks CLK_USB_OTG>;
410 phy-names = "usb2-phy";
415 usbphy: usbphy@ec100000 {
416 compatible = "samsung,s5pv210-usb2-phy";
417 reg = <0xec100000 0x100>;
418 samsung,pmureg-phandle = <&pmu_syscon>;
419 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
420 clock-names = "phy", "ref";
425 ehci: ehci@ec200000 {
426 compatible = "samsung,exynos4210-ehci";
427 reg = <0xec200000 0x100>;
429 interrupt-parent = <&vic1>;
430 clocks = <&clocks CLK_USB_HOST>;
431 clock-names = "usbhost";
432 #address-cells = <1>;
442 ohci: ohci@ec300000 {
443 compatible = "samsung,exynos4210-ohci";
444 reg = <0xec300000 0x100>;
446 interrupt-parent = <&vic1>;
447 clocks = <&clocks CLK_USB_HOST>;
448 clock-names = "usbhost";
449 #address-cells = <1>;
459 mfc: codec@f1700000 {
460 compatible = "samsung,mfc-v5";
461 reg = <0xf1700000 0x10000>;
462 interrupt-parent = <&vic2>;
464 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
465 clock-names = "sclk_mfc", "mfc";
468 vic0: interrupt-controller@f2000000 {
469 compatible = "arm,pl192-vic";
470 interrupt-controller;
471 reg = <0xf2000000 0x1000>;
472 #interrupt-cells = <1>;
475 vic1: interrupt-controller@f2100000 {
476 compatible = "arm,pl192-vic";
477 interrupt-controller;
478 reg = <0xf2100000 0x1000>;
479 #interrupt-cells = <1>;
482 vic2: interrupt-controller@f2200000 {
483 compatible = "arm,pl192-vic";
484 interrupt-controller;
485 reg = <0xf2200000 0x1000>;
486 #interrupt-cells = <1>;
489 vic3: interrupt-controller@f2300000 {
490 compatible = "arm,pl192-vic";
491 interrupt-controller;
492 reg = <0xf2300000 0x1000>;
493 #interrupt-cells = <1>;
496 fimd: fimd@f8000000 {
497 compatible = "samsung,exynos4210-fimd";
498 interrupt-parent = <&vic2>;
499 reg = <0xf8000000 0x20000>;
500 interrupt-names = "fifo", "vsync", "lcd_sys";
501 interrupts = <0>, <1>, <2>;
502 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
503 clock-names = "sclk_fimd", "fimd";
508 compatible = "samsung,s5pv210-g2d";
509 reg = <0xfa000000 0x1000>;
510 interrupt-parent = <&vic2>;
512 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
513 clock-names = "sclk_fimg2d", "fimg2d";
516 mdma1: mdma@fa200000 {
517 compatible = "arm,pl330", "arm,primecell";
518 reg = <0xfa200000 0x1000>;
519 interrupt-parent = <&vic0>;
521 clocks = <&clocks CLK_MDMA>;
522 clock-names = "apb_pclk";
529 compatible = "samsung,s3c2440-i2c";
530 reg = <0xfab00000 0x1000>;
531 interrupt-parent = <&vic2>;
533 clocks = <&clocks CLK_I2C1>;
535 pinctrl-names = "default";
536 pinctrl-0 = <&i2c1_bus>;
537 #address-cells = <1>;
543 compatible = "samsung,fimc", "simple-bus";
544 pinctrl-names = "default";
546 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
547 clock-names = "sclk_cam0", "sclk_cam1";
548 #address-cells = <1>;
552 clock_cam: clock-controller {
556 csis0: csis@fa600000 {
557 compatible = "samsung,s5pv210-csis";
558 reg = <0xfa600000 0x4000>;
559 interrupt-parent = <&vic2>;
561 clocks = <&clocks CLK_CSIS>,
563 clock-names = "clk_csis",
567 #address-cells = <1>;
571 fimc0: fimc@fb200000 {
572 compatible = "samsung,s5pv210-fimc";
573 reg = <0xfb200000 0x1000>;
575 interrupt-parent = <&vic2>;
576 clocks = <&clocks CLK_FIMC0>,
577 <&clocks SCLK_FIMC0>;
578 clock-names = "fimc",
580 samsung,pix-limits = <4224 8192 1920 4224>;
581 samsung,mainscaler-ext;
585 fimc1: fimc@fb300000 {
586 compatible = "samsung,s5pv210-fimc";
587 reg = <0xfb300000 0x1000>;
588 interrupt-parent = <&vic2>;
590 clocks = <&clocks CLK_FIMC1>,
591 <&clocks SCLK_FIMC1>;
592 clock-names = "fimc",
594 samsung,pix-limits = <4224 8192 1920 4224>;
595 samsung,mainscaler-ext;
599 fimc2: fimc@fb400000 {
600 compatible = "samsung,s5pv210-fimc";
601 reg = <0xfb400000 0x1000>;
602 interrupt-parent = <&vic2>;
604 clocks = <&clocks CLK_FIMC2>,
605 <&clocks SCLK_FIMC2>;
606 clock-names = "fimc",
608 samsung,pix-limits = <4224 8192 1920 4224>;
609 samsung,mainscaler-ext;
616 #include "s5pv210-pinctrl.dtsi"