GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / s3c64xx.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Samsung's S3C64xx SoC series common device tree source
4  *
5  * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
6  *
7  * Samsung's S3C64xx SoC series device nodes are listed in this file.
8  * Particular SoCs from S3C64xx series can include this file and provide
9  * values for SoCs specfic bindings.
10  *
11  * Note: This file does not include device nodes for all the controllers in
12  * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
13  * nodes can be added to this file.
14  */
15
16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
17
18 / {
19         #address-cells = <1>;
20         #size-cells = <1>;
21
22         aliases {
23                 i2c0 = &i2c0;
24                 pinctrl0 = &pinctrl0;
25                 serial0 = &uart0;
26                 serial1 = &uart1;
27                 serial2 = &uart2;
28                 serial3 = &uart3;
29         };
30
31         cpus {
32                 #address-cells = <1>;
33                 #size-cells = <0>;
34
35                 cpu@0 {
36                         device_type = "cpu";
37                         compatible = "arm,arm1176jzf-s", "arm,arm1176";
38                         reg = <0x0>;
39                 };
40         };
41
42         soc: soc {
43                 compatible = "simple-bus";
44                 #address-cells = <1>;
45                 #size-cells = <1>;
46                 ranges;
47
48                 vic0: interrupt-controller@71200000 {
49                         compatible = "arm,pl192-vic";
50                         interrupt-controller;
51                         reg = <0x71200000 0x1000>;
52                         #interrupt-cells = <1>;
53                 };
54
55                 vic1: interrupt-controller@71300000 {
56                         compatible = "arm,pl192-vic";
57                         interrupt-controller;
58                         reg = <0x71300000 0x1000>;
59                         #interrupt-cells = <1>;
60                 };
61
62                 sdhci0: sdhci@7c200000 {
63                         compatible = "samsung,s3c6410-sdhci";
64                         reg = <0x7c200000 0x100>;
65                         interrupt-parent = <&vic1>;
66                         interrupts = <24>;
67                         clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
68                         clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
69                                         <&clocks SCLK_MMC0>;
70                         status = "disabled";
71                 };
72
73                 sdhci1: sdhci@7c300000 {
74                         compatible = "samsung,s3c6410-sdhci";
75                         reg = <0x7c300000 0x100>;
76                         interrupt-parent = <&vic1>;
77                         interrupts = <25>;
78                         clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
79                         clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
80                                         <&clocks SCLK_MMC1>;
81                         status = "disabled";
82                 };
83
84                 sdhci2: sdhci@7c400000 {
85                         compatible = "samsung,s3c6410-sdhci";
86                         reg = <0x7c400000 0x100>;
87                         interrupt-parent = <&vic1>;
88                         interrupts = <17>;
89                         clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
90                         clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
91                                         <&clocks SCLK_MMC2>;
92                         status = "disabled";
93                 };
94
95                 watchdog: watchdog@7e004000 {
96                         compatible = "samsung,s3c6410-wdt";
97                         reg = <0x7e004000 0x1000>;
98                         interrupt-parent = <&vic0>;
99                         interrupts = <26>;
100                         clock-names = "watchdog";
101                         clocks = <&clocks PCLK_WDT>;
102                 };
103
104                 i2c0: i2c@7f004000 {
105                         compatible = "samsung,s3c2440-i2c";
106                         reg = <0x7f004000 0x1000>;
107                         interrupt-parent = <&vic1>;
108                         interrupts = <18>;
109                         clock-names = "i2c";
110                         clocks = <&clocks PCLK_IIC0>;
111                         status = "disabled";
112                         #address-cells = <1>;
113                         #size-cells = <0>;
114                 };
115
116                 uart0: serial@7f005000 {
117                         compatible = "samsung,s3c6400-uart";
118                         reg = <0x7f005000 0x100>;
119                         interrupt-parent = <&vic1>;
120                         interrupts = <5>;
121                         clock-names = "uart", "clk_uart_baud2",
122                                         "clk_uart_baud3";
123                         clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
124                                         <&clocks SCLK_UART>;
125                         status = "disabled";
126                 };
127
128                 uart1: serial@7f005400 {
129                         compatible = "samsung,s3c6400-uart";
130                         reg = <0x7f005400 0x100>;
131                         interrupt-parent = <&vic1>;
132                         interrupts = <6>;
133                         clock-names = "uart", "clk_uart_baud2",
134                                         "clk_uart_baud3";
135                         clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
136                                         <&clocks SCLK_UART>;
137                         status = "disabled";
138                 };
139
140                 uart2: serial@7f005800 {
141                         compatible = "samsung,s3c6400-uart";
142                         reg = <0x7f005800 0x100>;
143                         interrupt-parent = <&vic1>;
144                         interrupts = <7>;
145                         clock-names = "uart", "clk_uart_baud2",
146                                         "clk_uart_baud3";
147                         clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
148                                         <&clocks SCLK_UART>;
149                         status = "disabled";
150                 };
151
152                 uart3: serial@7f005c00 {
153                         compatible = "samsung,s3c6400-uart";
154                         reg = <0x7f005c00 0x100>;
155                         interrupt-parent = <&vic1>;
156                         interrupts = <8>;
157                         clock-names = "uart", "clk_uart_baud2",
158                                         "clk_uart_baud3";
159                         clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
160                                         <&clocks SCLK_UART>;
161                         status = "disabled";
162                 };
163
164                 pwm: pwm@7f006000 {
165                         compatible = "samsung,s3c6400-pwm";
166                         reg = <0x7f006000 0x1000>;
167                         interrupt-parent = <&vic0>;
168                         interrupts = <23>, <24>, <25>, <27>, <28>;
169                         clock-names = "timers";
170                         clocks = <&clocks PCLK_PWM>;
171                         samsung,pwm-outputs = <0>, <1>;
172                         #pwm-cells = <3>;
173                 };
174
175                 pinctrl0: pinctrl@7f008000 {
176                         compatible = "samsung,s3c64xx-pinctrl";
177                         reg = <0x7f008000 0x1000>;
178                         interrupt-parent = <&vic1>;
179                         interrupts = <21>;
180
181                         pctrl_int_map: pinctrl-interrupt-map {
182                                 interrupt-map = <0 &vic0 0>,
183                                                 <1 &vic0 1>,
184                                                 <2 &vic1 0>,
185                                                 <3 &vic1 1>;
186                                 #address-cells = <0>;
187                                 #size-cells = <0>;
188                                 #interrupt-cells = <1>;
189                         };
190
191                         wakeup-interrupt-controller {
192                                 compatible = "samsung,s3c64xx-wakeup-eint";
193                                 interrupts = <0>, <1>, <2>, <3>;
194                                 interrupt-parent = <&pctrl_int_map>;
195                         };
196                 };
197         };
198 };
199
200 #include "s3c64xx-pinctrl.dtsi"