2 * Device Tree Source for the Alt board
4 * Copyright (C) 2014 Renesas Electronics Corporation
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
12 #include "r8a7794.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "renesas,alt", "renesas,r8a7794";
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
25 stdout-path = "serial0:115200n8";
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
33 d3_3v: regulator-d3-3v {
34 compatible = "regulator-fixed";
35 regulator-name = "D3.3V";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
42 vcc_sdhi0: regulator-vcc-sdhi0 {
43 compatible = "regulator-fixed";
45 regulator-name = "SDHI0 Vcc";
46 regulator-min-microvolt = <3300000>;
47 regulator-max-microvolt = <3300000>;
49 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
53 vccq_sdhi0: regulator-vccq-sdhi0 {
54 compatible = "regulator-gpio";
56 regulator-name = "SDHI0 VccQ";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <3300000>;
60 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
66 vcc_sdhi1: regulator-vcc-sdhi1 {
67 compatible = "regulator-fixed";
69 regulator-name = "SDHI1 Vcc";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
73 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
77 vccq_sdhi1: regulator-vccq-sdhi1 {
78 compatible = "regulator-gpio";
80 regulator-name = "SDHI1 VccQ";
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
84 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
96 compatible = "adi,adv7123";
104 adv7123_in: endpoint {
105 remote-endpoint = <&du_out_rgb1>;
110 adv7123_out: endpoint {
111 remote-endpoint = <&vga_in>;
118 compatible = "vga-connector";
122 remote-endpoint = <&adv7123_out>;
128 compatible = "fixed-clock";
130 clock-frequency = <74250000>;
134 compatible = "fixed-clock";
136 clock-frequency = <148500000>;
141 pinctrl-0 = <&du_pins>;
142 pinctrl-names = "default";
145 clocks = <&mstp7_clks R8A7794_CLK_DU0>,
146 <&mstp7_clks R8A7794_CLK_DU0>,
147 <&x13_clk>, <&x2_clk>;
148 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
153 remote-endpoint = <&adv7123_in>;
160 clock-frequency = <20000000>;
164 pinctrl-0 = <&scif_clk_pins>;
165 pinctrl-names = "default";
168 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
173 groups = "scif2_data";
177 scif_clk_pins: scif_clk {
179 function = "scif_clk";
183 groups = "eth_link", "eth_mdio", "eth_rmii";
188 groups = "intc_irq8";
198 groups = "vin0_data8", "vin0_clk";
202 mmcif0_pins: mmcif0 {
203 groups = "mmc_data8", "mmc_ctrl";
208 groups = "sdhi0_data4", "sdhi0_ctrl";
213 groups = "sdhi1_data4", "sdhi1_ctrl";
224 groups = "qspi_ctrl", "qspi_data4";
230 pinctrl-0 = <ðer_pins &phy1_pins>;
231 pinctrl-names = "default";
233 phy-handle = <&phy1>;
234 renesas,ether-link-active-low;
237 phy1: ethernet-phy@1 {
239 interrupt-parent = <&irqc0>;
240 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
241 micrel,led-mode = <1>;
246 pinctrl-0 = <&mmcif0_pins>;
247 pinctrl-names = "default";
249 vmmc-supply = <&d3_3v>;
250 vqmmc-supply = <&d3_3v>;
257 pinctrl-0 = <&sdhi0_pins>;
258 pinctrl-names = "default";
260 vmmc-supply = <&vcc_sdhi0>;
261 vqmmc-supply = <&vccq_sdhi0>;
262 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
263 wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
268 pinctrl-0 = <&sdhi1_pins>;
269 pinctrl-names = "default";
271 vmmc-supply = <&vcc_sdhi1>;
272 vqmmc-supply = <&vccq_sdhi1>;
273 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
274 wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
279 pinctrl-0 = <&i2c1_pins>;
280 pinctrl-names = "default";
283 clock-frequency = <400000>;
286 compatible = "adi,adv7180";
293 remote-endpoint = <&vin0ep>;
301 pinctrl-0 = <&vin0_pins>;
302 pinctrl-names = "default";
305 #address-cells = <1>;
309 remote-endpoint = <&adv7180>;
316 pinctrl-0 = <&scif2_pins>;
317 pinctrl-names = "default";
323 clock-frequency = <14745600>;
328 pinctrl-0 = <&qspi_pins>;
329 pinctrl-names = "default";
334 compatible = "spansion,s25fl512s", "jedec,spi-nor";
336 spi-max-frequency = <30000000>;
337 spi-tx-bus-width = <4>;
338 spi-rx-bus-width = <4>;
344 compatible = "fixed-partitions";
345 #address-cells = <1>;
350 reg = <0x00000000 0x00040000>;
355 reg = <0x00040000 0x00040000>;
360 reg = <0x00080000 0x03f80000>;