GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / r8a7779-marzen.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the Marzen board
4  *
5  * Copyright (C) 2013 Renesas Solutions Corp.
6  * Copyright (C) 2013 Simon Horman
7  */
8
9 /dts-v1/;
10 #include "r8a7779.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13
14 / {
15         model = "marzen";
16         compatible = "renesas,marzen", "renesas,r8a7779";
17
18         aliases {
19                 serial0 = &scif2;
20                 serial1 = &scif4;
21         };
22
23         chosen {
24                 bootargs = "ignore_loglevel root=/dev/nfs ip=on";
25                 stdout-path = "serial0:115200n8";
26         };
27
28         memory@60000000 {
29                 device_type = "memory";
30                 reg = <0x60000000 0x40000000>;
31         };
32
33         fixedregulator3v3: regulator-3v3 {
34                 compatible = "regulator-fixed";
35                 regulator-name = "fixed-3.3V";
36                 regulator-min-microvolt = <3300000>;
37                 regulator-max-microvolt = <3300000>;
38                 regulator-boot-on;
39                 regulator-always-on;
40         };
41
42         vccq_sdhi0: regulator-vccq-sdhi0 {
43                 compatible = "regulator-gpio";
44
45                 regulator-name = "SDHI0 VccQ";
46                 regulator-min-microvolt = <1800000>;
47                 regulator-max-microvolt = <3300000>;
48
49                 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
50                 gpios-states = <1>;
51                 states = <3300000 1
52                           1800000 0>;
53         };
54
55         ethernet@18000000 {
56                 compatible = "smsc,lan9220", "smsc,lan9115";
57                 reg = <0x18000000 0x100>;
58                 pinctrl-0 = <&ethernet_pins>;
59                 pinctrl-names = "default";
60
61                 phy-mode = "mii";
62                 interrupt-parent = <&irqpin0>;
63                 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
64                 smsc,irq-push-pull;
65                 reg-io-width = <4>;
66                 vddvario-supply = <&fixedregulator3v3>;
67                 vdd33a-supply = <&fixedregulator3v3>;
68         };
69
70         leds {
71                 compatible = "gpio-leds";
72                 led2 {
73                         gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
74                 };
75                 led3 {
76                         gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
77                 };
78                 led4 {
79                         gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
80                 };
81         };
82
83         vga-encoder {
84                 compatible = "adi,adv7123";
85
86                 ports {
87                         #address-cells = <1>;
88                         #size-cells = <0>;
89
90                         port@0 {
91                                 reg = <0>;
92                                 vga_enc_in: endpoint {
93                                         remote-endpoint = <&du_out_rgb0>;
94                                 };
95                         };
96                         port@1 {
97                                 reg = <1>;
98                                 vga_enc_out: endpoint {
99                                         remote-endpoint = <&vga_in>;
100                                 };
101                         };
102                 };
103         };
104
105         vga {
106                 compatible = "vga-connector";
107
108                 port {
109                         vga_in: endpoint {
110                                 remote-endpoint = <&vga_enc_out>;
111                         };
112                 };
113         };
114
115         lvds-encoder {
116                 compatible = "thine,thc63lvdm83d";
117
118                 ports {
119                         #address-cells = <1>;
120                         #size-cells = <0>;
121
122                         port@0 {
123                                 reg = <0>;
124                                 lvds_enc_in: endpoint {
125                                         remote-endpoint = <&du_out_rgb1>;
126                                 };
127                         };
128                         port@1 {
129                                 reg = <1>;
130                                 lvds_connector: endpoint {
131                                 };
132                         };
133                 };
134         };
135
136         x3_clk: x3-clock {
137                 compatible = "fixed-clock";
138                 #clock-cells = <0>;
139                 clock-frequency = <65000000>;
140         };
141 };
142
143 &du {
144         pinctrl-0 = <&du_pins>;
145         pinctrl-names = "default";
146         status = "okay";
147
148         clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;
149         clock-names = "du.0", "dclkin.0";
150
151         ports {
152                 port@0 {
153                         endpoint {
154                                 remote-endpoint = <&vga_enc_in>;
155                         };
156                 };
157                 port@1 {
158                         endpoint {
159                                 remote-endpoint = <&lvds_enc_in>;
160                         };
161                 };
162         };
163 };
164
165 &irqpin0 {
166         status = "okay";
167 };
168
169 &extal_clk {
170         clock-frequency = <31250000>;
171 };
172
173 &tmu0 {
174         status = "okay";
175 };
176
177 &pfc {
178         pinctrl-0 = <&scif_clk_pins>;
179         pinctrl-names = "default";
180
181         du_pins: du {
182                 du0 {
183                         groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0", "du0_clk_in";
184                         function = "du0";
185                 };
186                 du1 {
187                         groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
188                         function = "du1";
189                 };
190         };
191
192         scif_clk_pins: scif_clk {
193                 groups = "scif_clk_b";
194                 function = "scif_clk";
195         };
196
197         ethernet_pins: ethernet {
198                 intc {
199                         groups = "intc_irq1_b";
200                         function = "intc";
201                 };
202                 lbsc {
203                         groups = "lbsc_ex_cs0";
204                         function = "lbsc";
205                 };
206         };
207
208         scif2_pins: scif2 {
209                 groups = "scif2_data_c";
210                 function = "scif2";
211         };
212
213         scif4_pins: scif4 {
214                 groups = "scif4_data";
215                 function = "scif4";
216         };
217
218         sdhi0_pins: sd0 {
219                 groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
220                 function = "sdhi0";
221         };
222
223         hspi0_pins: hspi0 {
224                 groups = "hspi0";
225                 function = "hspi0";
226         };
227 };
228
229 &sata {
230         status = "okay";
231 };
232
233 &scif2 {
234         pinctrl-0 = <&scif2_pins>;
235         pinctrl-names = "default";
236
237         status = "okay";
238 };
239
240 &scif4 {
241         pinctrl-0 = <&scif4_pins>;
242         pinctrl-names = "default";
243
244         status = "okay";
245 };
246
247 &scif_clk {
248         clock-frequency = <14745600>;
249 };
250
251 &sdhi0 {
252         pinctrl-0 = <&sdhi0_pins>;
253         pinctrl-names = "default";
254
255         vmmc-supply = <&fixedregulator3v3>;
256         vqmmc-supply = <&vccq_sdhi0>;
257         bus-width = <4>;
258         status = "okay";
259 };
260
261 &hspi0 {
262         pinctrl-0 = <&hspi0_pins>;
263         pinctrl-names = "default";
264         status = "okay";
265 };