GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / r8a7743-iwg20m.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
4  *
5  * Copyright (C) 2017 Renesas Electronics Corp.
6  */
7
8 #include "r8a7743.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10
11 / {
12         compatible = "iwave,g20m", "renesas,r8a7743";
13
14         memory@40000000 {
15                 device_type = "memory";
16                 reg = <0 0x40000000 0 0x20000000>;
17         };
18
19         memory@200000000 {
20                 device_type = "memory";
21                 reg = <2 0x00000000 0 0x20000000>;
22         };
23
24         reg_3p3v: 3p3v {
25                 compatible = "regulator-fixed";
26                 regulator-name = "3P3V";
27                 regulator-min-microvolt = <3300000>;
28                 regulator-max-microvolt = <3300000>;
29                 regulator-always-on;
30                 regulator-boot-on;
31         };
32 };
33
34 &cmt0 {
35         status = "okay";
36 };
37
38 &extal_clk {
39         clock-frequency = <20000000>;
40 };
41
42 &pfc {
43         mmcif0_pins: mmc {
44                 groups = "mmc_data8_b", "mmc_ctrl";
45                 function = "mmc";
46         };
47
48         qspi_pins: qspi {
49                 groups = "qspi_ctrl", "qspi_data2";
50                 function = "qspi";
51         };
52
53         sdhi0_pins: sd0 {
54                 groups = "sdhi0_data4", "sdhi0_ctrl";
55                 function = "sdhi0";
56                 power-source = <3300>;
57         };
58 };
59
60 &mmcif0 {
61         pinctrl-0 = <&mmcif0_pins>;
62         pinctrl-names = "default";
63
64         vmmc-supply = <&reg_3p3v>;
65         bus-width = <8>;
66         non-removable;
67         status = "okay";
68 };
69
70 &qspi {
71         pinctrl-0 = <&qspi_pins>;
72         pinctrl-names = "default";
73
74         status = "okay";
75
76         /* WARNING - This device contains the bootloader. Handle with care. */
77         flash: flash@0 {
78                 #address-cells = <1>;
79                 #size-cells = <1>;
80                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
81                 reg = <0>;
82                 spi-max-frequency = <50000000>;
83                 spi-tx-bus-width = <1>;
84                 spi-rx-bus-width = <1>;
85                 m25p,fast-read;
86                 spi-cpol;
87                 spi-cpha;
88         };
89 };
90
91 &rwdt {
92         timeout-sec = <60>;
93         status = "okay";
94 };
95
96 &sdhi0 {
97         pinctrl-0 = <&sdhi0_pins>;
98         pinctrl-names = "default";
99
100         vmmc-supply = <&reg_3p3v>;
101         vqmmc-supply = <&reg_3p3v>;
102         cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
103         status = "okay";
104 };