1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1H Qseven board development
4 * platform with camera daughter board
6 * Copyright (C) 2020 Renesas Electronics Corp.
10 #include "r8a7742-iwg21d-q7.dts"
13 model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
14 compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
24 mclk_cam1: mclk-cam1 {
25 compatible = "fixed-clock";
27 clock-frequency = <26000000>;
30 mclk_cam2: mclk-cam2 {
31 compatible = "fixed-clock";
33 clock-frequency = <26000000>;
36 mclk_cam3: mclk-cam3 {
37 compatible = "fixed-clock";
39 clock-frequency = <26000000>;
42 mclk_cam4: mclk-cam4 {
43 compatible = "fixed-clock";
45 clock-frequency = <26000000>;
49 compatible = "regulator-fixed";
50 regulator-name = "1P8V";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <1800000>;
57 compatible = "regulator-fixed";
58 regulator-name = "2P8V";
59 regulator-min-microvolt = <2800000>;
60 regulator-max-microvolt = <2800000>;
66 /* Pins shared with VIN0, keep status disabled */
71 pinctrl-0 = <&can0_pins>;
72 pinctrl-names = "default";
77 pinctrl-0 = <ðer_pins>;
78 pinctrl-names = "default";
81 renesas,ether-link-active-low;
84 phy1: ethernet-phy@1 {
85 compatible = "ethernet-phy-id0022.1560",
86 "ethernet-phy-ieee802.3-c22";
88 micrel,led-mode = <1>;
93 /* Disable hogging GP0_18 to output LOW */
94 /delete-node/ qspi-en-hog;
96 /* Hog GP0_18 to output HIGH to enable VIN2 */
99 gpios = <18 GPIO_ACTIVE_HIGH>;
101 line-name = "VIN2_EN";
106 pinctrl-0 = <&hscif0_pins>;
107 pinctrl-names = "default";
113 pinctrl-0 = <&i2c1_pins>;
114 pinctrl-names = "default";
116 /* status set to "okay" when needed by camera configuration below */
117 clock-frequency = <400000>;
121 pinctrl-0 = <&i2c3_pins>;
122 pinctrl-names = "default";
124 /* status set to "okay" when needed by camera configuration below */
125 clock-frequency = <400000>;
130 groups = "can0_data_d";
135 groups = "eth_mdio", "eth_rmii";
139 hscif0_pins: hscif0 {
140 groups = "hscif0_data", "hscif0_ctrl";
155 groups = "scif0_data";
160 groups = "scif1_data";
164 scifb1_pins: scifb1 {
165 groups = "scifb1_data";
169 vin0_8bit_pins: vin0 {
170 groups = "vin0_data8", "vin0_clk", "vin0_sync";
174 vin1_8bit_pins: vin1 {
175 groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
180 groups = "vin2_g8", "vin2_clk";
185 groups = "vin3_data8", "vin3_clk", "vin3_sync";
191 /* Pins shared with VIN2, keep status disabled */
196 pinctrl-0 = <&scif0_pins>;
197 pinctrl-names = "default";
202 pinctrl-0 = <&scif1_pins>;
203 pinctrl-names = "default";
208 pinctrl-0 = <&scifb1_pins>;
209 pinctrl-names = "default";
212 rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
213 cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
217 * Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
219 * (un)comment the #include statements to change configuration
222 /* 8bit CMOS Camera 1 (J13) */
223 #define CAM_PARENT_I2C i2c0
224 #define MCLK_CAM mclk_cam1
225 #define CAM_EP cam0ep
226 #define VIN_EP vin0ep
228 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
229 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
234 * Set SW2 switch on the SOM to 'ON'
235 * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
238 pinctrl-0 = <&vin0_8bit_pins>;
239 pinctrl-names = "default";
243 remote-endpoint = <&cam0ep>;
249 #endif /* CAM_ENABLED */
251 #undef CAM_PARENT_I2C
256 /* 8bit CMOS Camera 2 (J14) */
257 #define CAM_PARENT_I2C i2c1
258 #define MCLK_CAM mclk_cam2
259 #define CAM_EP cam1ep
260 #define VIN_EP vin1ep
262 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
263 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
267 /* Set SW1 switch on the SOM to 'ON' */
269 pinctrl-0 = <&vin1_8bit_pins>;
270 pinctrl-names = "default";
274 remote-endpoint = <&cam1ep>;
281 #endif /* CAM_ENABLED */
283 #undef CAM_PARENT_I2C
288 /* 8bit CMOS Camera 3 (J12) */
289 #define CAM_PARENT_I2C i2c2
290 #define MCLK_CAM mclk_cam3
291 #define CAM_EP cam2ep
292 #define VIN_EP vin2ep
294 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
295 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
300 pinctrl-0 = <&vin2_pins>;
301 pinctrl-names = "default";
305 remote-endpoint = <&cam2ep>;
312 #endif /* CAM_ENABLED */
314 #undef CAM_PARENT_I2C
319 /* 8bit CMOS Camera 4 (J11) */
320 #define CAM_PARENT_I2C i2c3
321 #define MCLK_CAM mclk_cam4
322 #define CAM_EP cam3ep
323 #define VIN_EP vin3ep
325 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
326 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
331 pinctrl-0 = <&vin3_pins>;
332 pinctrl-names = "default";
336 remote-endpoint = <&cam3ep>;
342 #endif /* CAM_ENABLED */
344 #undef CAM_PARENT_I2C