arch/arm/boot/dts/orion5x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 // Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   3
   4 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   5
   6 / {
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         model = "Marvell Orion5x SoC";
  10         compatible = "marvell,orion5x";
  11         interrupt-parent = <&intc>;
  12
  13         aliases {
  14                 gpio0 = &gpio0;
  15         };
  16
  17         soc {
  18                 #address-cells = <2>;
  19                 #size-cells = <1>;
  20                 controller = <&mbusc>;
  21
  22                 devbus_bootcs: devbus-bootcs {
  23                         compatible = "marvell,orion-devbus";
  24                         reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>;
  25                         ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>;
  26                         #address-cells = <1>;
  27                         #size-cells = <1>;
  28                         clocks = <&core_clk 0>;
  29                         status = "disabled";
  30                 };
  31
  32                 devbus_cs0: devbus-cs0 {
  33                         compatible = "marvell,orion-devbus";
  34                         reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>;
  35                         ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>;
  36                         #address-cells = <1>;
  37                         #size-cells = <1>;
  38                         clocks = <&core_clk 0>;
  39                         status = "disabled";
  40                 };
  41
  42                 devbus_cs1: devbus-cs1 {
  43                         compatible = "marvell,orion-devbus";
  44                         reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>;
  45                         ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>;
  46                         #address-cells = <1>;
  47                         #size-cells = <1>;
  48                         clocks = <&core_clk 0>;
  49                         status = "disabled";
  50                 };
  51
  52                 devbus_cs2: devbus-cs2 {
  53                         compatible = "marvell,orion-devbus";
  54                         reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>;
  55                         ranges = <0 MBUS_ID(0x01, 0x1b) 0 0xffffffff>;
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         clocks = <&core_clk 0>;
  59                         status = "disabled";
  60                 };
  61
  62                 internal-regs {
  63                         compatible = "simple-bus";
  64                         #address-cells = <1>;
  65                         #size-cells = <1>;
  66                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
  67
  68                         gpio0: gpio@10100 {
  69                                 compatible = "marvell,orion-gpio";
  70                                 #gpio-cells = <2>;
  71                                 gpio-controller;
  72                                 reg = <0x10100 0x40>;
  73                                 ngpios = <32>;
  74                                 interrupt-controller;
  75                                 #interrupt-cells = <2>;
  76                                 interrupts = <6>, <7>, <8>, <9>;
  77                         };
  78
  79                         spi: spi@10600 {
  80                                 compatible = "marvell,orion-spi";
  81                                 #address-cells = <1>;
  82                                 #size-cells = <0>;
  83                                 cell-index = <0>;
  84                                 reg = <0x10600 0x28>;
  85                                 status = "disabled";
  86                         };
  87
  88                         i2c: i2c@11000 {
  89                                 compatible = "marvell,mv64xxx-i2c";
  90                                 reg = <0x11000 0x20>;
  91                                 #address-cells = <1>;
  92                                 #size-cells = <0>;
  93                                 interrupts = <5>;
  94                                 clocks = <&core_clk 0>;
  95                                 status = "disabled";
  96                         };
  97
  98                         uart0: serial@12000 {
  99                                 compatible = "ns16550a";
 100                                 reg = <0x12000 0x100>;
 101                                 reg-shift = <2>;
 102                                 interrupts = <3>;
 103                                 clocks = <&core_clk 0>;
 104                                 status = "disabled";
 105                         };
 106
 107                         uart1: serial@12100 {
 108                                 compatible = "ns16550a";
 109                                 reg = <0x12100 0x100>;
 110                                 reg-shift = <2>;
 111                                 interrupts = <4>;
 112                                 clocks = <&core_clk 0>;
 113                                 status = "disabled";
 114                         };
 115
 116                         bridge_intc: bridge-interrupt-ctrl@20110 {
 117                                 compatible = "marvell,orion-bridge-intc";
 118                                 interrupt-controller;
 119                                 #interrupt-cells = <1>;
 120                                 reg = <0x20110 0x8>;
 121                                 interrupts = <0>;
 122                                 marvell,#interrupts = <4>;
 123                         };
 124
 125                         intc: interrupt-controller@20200 {
 126                                 compatible = "marvell,orion-intc";
 127                                 interrupt-controller;
 128                                 #interrupt-cells = <1>;
 129                                 reg = <0x20200 0x08>;
 130                         };
 131
 132                         timer: timer@20300 {
 133                                 compatible = "marvell,orion-timer";
 134                                 reg = <0x20300 0x20>;
 135                                 interrupt-parent = <&bridge_intc>;
 136                                 interrupts = <1>, <2>;
 137                                 clocks = <&core_clk 0>;
 138                         };
 139
 140                         wdt: wdt@20300 {
 141                                 compatible = "marvell,orion-wdt";
 142                                 reg = <0x20300 0x28>, <0x20108 0x4>;
 143                                 interrupt-parent = <&bridge_intc>;
 144                                 interrupts = <3>;
 145                                 clocks = <&core_clk 0>;
 146                                 status = "okay";
 147                         };
 148
 149                         ehci0: ehci@50000 {
 150                                 compatible = "marvell,orion-ehci";
 151                                 reg = <0x50000 0x1000>;
 152                                 interrupts = <17>;
 153                                 status = "disabled";
 154                         };
 155
 156                         xor: dma-controller@60900 {
 157                                 compatible = "marvell,orion-xor";
 158                                 reg = <0x60900 0x100
 159                                        0x60b00 0x100>;
 160                                 status = "okay";
 161
 162                                 xor00 {
 163                                       interrupts = <30>;
 164                                       dmacap,memcpy;
 165                                       dmacap,xor;
 166                                 };
 167                                 xor01 {
 168                                       interrupts = <31>;
 169                                       dmacap,memcpy;
 170                                       dmacap,xor;
 171                                       dmacap,memset;
 172                                 };
 173                         };
 174
 175                         eth: ethernet-controller@72000 {
 176                                 compatible = "marvell,orion-eth";
 177                                 #address-cells = <1>;
 178                                 #size-cells = <0>;
 179                                 reg = <0x72000 0x4000>;
 180                                 marvell,tx-checksum-limit = <1600>;
 181                                 status = "disabled";
 182
 183                                 ethport: ethernet-port@0 {
 184                                         compatible = "marvell,orion-eth-port";
 185                                         reg = <0>;
 186                                         interrupts = <21>;
 187                                         /* overwrite MAC address in bootloader */
 188                                         local-mac-address = [00 00 00 00 00 00];
 189                                         /* set phy-handle property in board file */
 190                                 };
 191                         };
 192
 193                         mdio: mdio-bus@72004 {
 194                                 compatible = "marvell,orion-mdio";
 195                                 #address-cells = <1>;
 196                                 #size-cells = <0>;
 197                                 reg = <0x72004 0x84>;
 198                                 interrupts = <22>;
 199                                 status = "disabled";
 200
 201                                 /* add phy nodes in board file */
 202                         };
 203
 204                         sata: sata@80000 {
 205                                 compatible = "marvell,orion-sata";
 206                                 reg = <0x80000 0x5000>;
 207                                 interrupts = <29>;
 208                                 status = "disabled";
 209                         };
 210
 211                         cesa: crypto@90000 {
 212                                 compatible = "marvell,orion-crypto";
 213                                 reg = <0x90000 0x10000>;
 214                                 reg-names = "regs";
 215                                 interrupts = <28>;
 216                                 marvell,crypto-srams = <&crypto_sram>;
 217                                 marvell,crypto-sram-size = <0x800>;
 218                                 status = "okay";
 219                         };
 220
 221                         ehci1: ehci@a0000 {
 222                                 compatible = "marvell,orion-ehci";
 223                                 reg = <0xa0000 0x1000>;
 224                                 interrupts = <12>;
 225                                 status = "disabled";
 226                         };
 227                 };
 228
 229                 crypto_sram: sa-sram {
 230                         compatible = "mmio-sram";
 231                         reg = <MBUS_ID(0x09, 0x00) 0x0 0x800>;
 232                         #address-cells = <1>;
 233                         #size-cells = <1>;
 234                 };
 235         };
 236 };