2 * Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "orion5x-mv88f5181.dtsi"
16 model = "Netgear WNR854-t";
17 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
24 reg = <0x00000000 0x2000000>; /* 32 MB */
28 stdout-path = "serial0:115200n8";
32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
33 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
34 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
38 compatible = "gpio-keys";
39 pinctrl-0 = <&pmx_reset_button>;
40 pinctrl-names = "default";
43 label = "Reset Button";
44 linux,code = <KEY_RESTART>;
45 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
50 compatible = "gpio-leds";
51 pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
52 pinctrl-names = "default";
55 label = "wnr854t:green:power";
56 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
60 label = "wnr854t:blink:power";
61 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
65 label = "wnr854t:green:wan";
66 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
77 compatible = "cfi-flash";
82 compatible = "fixed-partitions";
93 reg = <0x100000 0x660000>;
98 reg = <0x760000 0x20000>;
103 reg = <0x780000 0x80000>;
114 compatible = "marvell,mv88e6085";
115 #address-cells = <1>;
121 #address-cells = <1>;
127 phy-handle = <&lan3phy>;
133 phy-handle = <&lan4phy>;
139 phy-handle = <&wanphy>;
145 ethernet = <ðport>;
151 phy-handle = <&lan1phy>;
157 phy-handle = <&lan2phy>;
162 #address-cells = <1>;
165 lan3phy: ethernet-phy@0 {
166 /* Marvell 88E1121R (port 1) */
167 compatible = "ethernet-phy-id0141.0cb0",
168 "ethernet-phy-ieee802.3-c22";
170 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
173 lan4phy: ethernet-phy@1 {
174 /* Marvell 88E1121R (port 2) */
175 compatible = "ethernet-phy-id0141.0cb0",
176 "ethernet-phy-ieee802.3-c22";
178 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
181 wanphy: ethernet-phy@2 {
182 /* Marvell 88E1121R (port 1) */
183 compatible = "ethernet-phy-id0141.0cb0",
184 "ethernet-phy-ieee802.3-c22";
186 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
189 lan1phy: ethernet-phy@5 {
190 /* Marvell 88E1112 */
191 compatible = "ethernet-phy-id0141.0cb0",
192 "ethernet-phy-ieee802.3-c22";
194 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
197 lan2phy: ethernet-phy@7 {
198 /* Marvell 88E1112 */
199 compatible = "ethernet-phy-id0141.0cb0",
200 "ethernet-phy-ieee802.3-c22";
202 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
212 /* Hardwired to DSA switch */
219 pinctrl-0 = <&pmx_pci_gpios>;
220 pinctrl-names = "default";
222 pmx_power_led: pmx-power-led {
223 marvell,pins = "mpp0";
224 marvell,function = "gpio";
227 pmx_reset_button: pmx-reset-button {
228 marvell,pins = "mpp1";
229 marvell,function = "gpio";
232 pmx_power_led_blink: pmx-power-led-blink {
233 marvell,pins = "mpp2";
234 marvell,function = "gpio";
237 pmx_wan_led: pmx-wan-led {
238 marvell,pins = "mpp3";
239 marvell,function = "gpio";
242 pmx_pci_gpios: pmx-pci-gpios {
243 marvell,pins = "mpp4";
244 marvell,function = "gpio";
249 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */