2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
13 #include "skeleton.dtsi"
16 compatible = "ti,omap4430", "ti,omap4";
17 interrupt-parent = <&wakeupgen>;
40 compatible = "arm,cortex-a9";
42 next-level-cache = <&L2>;
45 clocks = <&dpll_mpu_ck>;
48 clock-latency = <300000>; /* From omap-cpufreq driver */
51 compatible = "arm,cortex-a9";
53 next-level-cache = <&L2>;
58 gic: interrupt-controller@48241000 {
59 compatible = "arm,cortex-a9-gic";
61 #interrupt-cells = <3>;
62 reg = <0x48241000 0x1000>,
64 interrupt-parent = <&gic>;
67 L2: l2-cache-controller@48242000 {
68 compatible = "arm,pl310-cache";
69 reg = <0x48242000 0x1000>;
74 local-timer@48240600 {
75 compatible = "arm,cortex-a9-twd-timer";
76 clocks = <&mpu_periphclk>;
77 reg = <0x48240600 0x20>;
78 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
79 interrupt-parent = <&gic>;
82 wakeupgen: interrupt-controller@48281000 {
83 compatible = "ti,omap4-wugen-mpu";
85 #interrupt-cells = <3>;
86 reg = <0x48281000 0x1000>;
87 interrupt-parent = <&gic>;
91 * The soc node represents the soc top level view. It is used for IPs
92 * that are not memory mapped in the MPU view or for the MPU itself.
95 compatible = "ti,omap-infra";
97 compatible = "ti,omap4-mpu";
103 compatible = "ti,omap3-c64";
108 compatible = "ti,ivahd";
114 * XXX: Use a flat representation of the OMAP4 interconnect.
115 * The real OMAP interconnect network is quite complex.
116 * Since it will not bring real advantage to represent that in DT for
117 * the moment, just use a fake OCP bus entry to represent the whole bus
121 compatible = "ti,omap4-l3-noc", "simple-bus";
122 #address-cells = <1>;
125 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
126 reg = <0x44000000 0x1000>,
129 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
130 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
132 l4_cfg: l4@4a000000 {
133 compatible = "ti,omap4-l4-cfg", "simple-bus";
134 #address-cells = <1>;
136 ranges = <0 0x4a000000 0x1000000>;
139 compatible = "ti,omap4-cm1";
140 reg = <0x4000 0x2000>;
143 #address-cells = <1>;
147 cm1_clockdomains: clockdomains {
152 compatible = "ti,omap4-cm2";
153 reg = <0x8000 0x3000>;
156 #address-cells = <1>;
160 cm2_clockdomains: clockdomains {
164 omap4_scm_core: scm@2000 {
165 compatible = "ti,omap4-scm-core", "simple-bus";
166 reg = <0x2000 0x1000>;
167 #address-cells = <1>;
169 ranges = <0 0x2000 0x1000>;
171 scm_conf: scm_conf@0 {
172 compatible = "syscon";
174 #address-cells = <1>;
179 omap4_padconf_core: scm@100000 {
180 compatible = "ti,omap4-scm-padconf-core",
182 #address-cells = <1>;
184 ranges = <0 0x100000 0x1000>;
186 omap4_pmx_core: pinmux@40 {
187 compatible = "ti,omap4-padconf",
190 #address-cells = <1>;
192 #interrupt-cells = <1>;
193 interrupt-controller;
194 pinctrl-single,register-width = <16>;
195 pinctrl-single,function-mask = <0x7fff>;
198 omap4_padconf_global: omap4_padconf_global@5a0 {
199 compatible = "syscon",
202 #address-cells = <1>;
204 ranges = <0 0x5a0 0x170>;
206 pbias_regulator: pbias_regulator {
207 compatible = "ti,pbias-omap4", "ti,pbias-omap";
209 syscon = <&omap4_padconf_global>;
210 pbias_mmc_reg: pbias_mmc_omap4 {
211 regulator-name = "pbias_mmc_omap4";
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <3000000>;
220 compatible = "ti,omap4-l4-wkup", "simple-bus";
221 #address-cells = <1>;
223 ranges = <0 0x300000 0x40000>;
225 counter32k: counter@4000 {
226 compatible = "ti,omap-counter32k";
228 ti,hwmods = "counter_32k";
232 compatible = "ti,omap4-prm";
233 reg = <0x6000 0x3000>;
234 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
237 #address-cells = <1>;
241 prm_clockdomains: clockdomains {
246 compatible = "ti,omap4-scrm";
247 reg = <0xa000 0x2000>;
249 scrm_clocks: clocks {
250 #address-cells = <1>;
254 scrm_clockdomains: clockdomains {
258 omap4_pmx_wkup: pinmux@1e040 {
259 compatible = "ti,omap4-padconf",
261 reg = <0x1e040 0x0038>;
262 #address-cells = <1>;
264 #interrupt-cells = <1>;
265 interrupt-controller;
266 pinctrl-single,register-width = <16>;
267 pinctrl-single,function-mask = <0x7fff>;
272 ocmcram: ocmcram@40304000 {
273 compatible = "mmio-sram";
274 reg = <0x40304000 0xa000>; /* 40k */
277 sdma: dma-controller@4a056000 {
278 compatible = "ti,omap4430-sdma";
279 reg = <0x4a056000 0x1000>;
280 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
286 dma-requests = <127>;
289 gpio1: gpio@4a310000 {
290 compatible = "ti,omap4-gpio";
291 reg = <0x4a310000 0x200>;
292 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
297 interrupt-controller;
298 #interrupt-cells = <2>;
301 gpio2: gpio@48055000 {
302 compatible = "ti,omap4-gpio";
303 reg = <0x48055000 0x200>;
304 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
308 interrupt-controller;
309 #interrupt-cells = <2>;
312 gpio3: gpio@48057000 {
313 compatible = "ti,omap4-gpio";
314 reg = <0x48057000 0x200>;
315 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
319 interrupt-controller;
320 #interrupt-cells = <2>;
323 gpio4: gpio@48059000 {
324 compatible = "ti,omap4-gpio";
325 reg = <0x48059000 0x200>;
326 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
334 gpio5: gpio@4805b000 {
335 compatible = "ti,omap4-gpio";
336 reg = <0x4805b000 0x200>;
337 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
341 interrupt-controller;
342 #interrupt-cells = <2>;
345 gpio6: gpio@4805d000 {
346 compatible = "ti,omap4-gpio";
347 reg = <0x4805d000 0x200>;
348 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
352 interrupt-controller;
353 #interrupt-cells = <2>;
356 gpmc: gpmc@50000000 {
357 compatible = "ti,omap4430-gpmc";
358 reg = <0x50000000 0x1000>;
359 #address-cells = <2>;
361 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
363 gpmc,num-waitpins = <4>;
366 clocks = <&l3_div_ck>;
370 uart1: serial@4806a000 {
371 compatible = "ti,omap4-uart";
372 reg = <0x4806a000 0x100>;
373 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
375 clock-frequency = <48000000>;
378 uart2: serial@4806c000 {
379 compatible = "ti,omap4-uart";
380 reg = <0x4806c000 0x100>;
381 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
383 clock-frequency = <48000000>;
386 uart3: serial@48020000 {
387 compatible = "ti,omap4-uart";
388 reg = <0x48020000 0x100>;
389 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
391 clock-frequency = <48000000>;
394 uart4: serial@4806e000 {
395 compatible = "ti,omap4-uart";
396 reg = <0x4806e000 0x100>;
397 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
399 clock-frequency = <48000000>;
402 hwspinlock: spinlock@4a0f6000 {
403 compatible = "ti,omap4-hwspinlock";
404 reg = <0x4a0f6000 0x1000>;
405 ti,hwmods = "spinlock";
410 compatible = "ti,omap4-i2c";
411 reg = <0x48070000 0x100>;
412 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
413 #address-cells = <1>;
419 compatible = "ti,omap4-i2c";
420 reg = <0x48072000 0x100>;
421 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
422 #address-cells = <1>;
428 compatible = "ti,omap4-i2c";
429 reg = <0x48060000 0x100>;
430 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
431 #address-cells = <1>;
437 compatible = "ti,omap4-i2c";
438 reg = <0x48350000 0x100>;
439 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
440 #address-cells = <1>;
445 mcspi1: spi@48098000 {
446 compatible = "ti,omap4-mcspi";
447 reg = <0x48098000 0x200>;
448 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
449 #address-cells = <1>;
451 ti,hwmods = "mcspi1";
461 dma-names = "tx0", "rx0", "tx1", "rx1",
462 "tx2", "rx2", "tx3", "rx3";
465 mcspi2: spi@4809a000 {
466 compatible = "ti,omap4-mcspi";
467 reg = <0x4809a000 0x200>;
468 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
469 #address-cells = <1>;
471 ti,hwmods = "mcspi2";
477 dma-names = "tx0", "rx0", "tx1", "rx1";
480 mcspi3: spi@480b8000 {
481 compatible = "ti,omap4-mcspi";
482 reg = <0x480b8000 0x200>;
483 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
484 #address-cells = <1>;
486 ti,hwmods = "mcspi3";
488 dmas = <&sdma 15>, <&sdma 16>;
489 dma-names = "tx0", "rx0";
492 mcspi4: spi@480ba000 {
493 compatible = "ti,omap4-mcspi";
494 reg = <0x480ba000 0x200>;
495 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
496 #address-cells = <1>;
498 ti,hwmods = "mcspi4";
500 dmas = <&sdma 70>, <&sdma 71>;
501 dma-names = "tx0", "rx0";
505 compatible = "ti,omap4-hsmmc";
506 reg = <0x4809c000 0x400>;
507 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
510 ti,needs-special-reset;
511 dmas = <&sdma 61>, <&sdma 62>;
512 dma-names = "tx", "rx";
513 pbias-supply = <&pbias_mmc_reg>;
517 compatible = "ti,omap4-hsmmc";
518 reg = <0x480b4000 0x400>;
519 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
521 ti,needs-special-reset;
522 dmas = <&sdma 47>, <&sdma 48>;
523 dma-names = "tx", "rx";
527 compatible = "ti,omap4-hsmmc";
528 reg = <0x480ad000 0x400>;
529 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
531 ti,needs-special-reset;
532 dmas = <&sdma 77>, <&sdma 78>;
533 dma-names = "tx", "rx";
537 compatible = "ti,omap4-hsmmc";
538 reg = <0x480d1000 0x400>;
539 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
541 ti,needs-special-reset;
542 dmas = <&sdma 57>, <&sdma 58>;
543 dma-names = "tx", "rx";
547 compatible = "ti,omap4-hsmmc";
548 reg = <0x480d5000 0x400>;
549 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
551 ti,needs-special-reset;
552 dmas = <&sdma 59>, <&sdma 60>;
553 dma-names = "tx", "rx";
556 mmu_dsp: mmu@4a066000 {
557 compatible = "ti,omap4-iommu";
558 reg = <0x4a066000 0x100>;
559 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
560 ti,hwmods = "mmu_dsp";
564 mmu_ipu: mmu@55082000 {
565 compatible = "ti,omap4-iommu";
566 reg = <0x55082000 0x100>;
567 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
568 ti,hwmods = "mmu_ipu";
570 ti,iommu-bus-err-back;
574 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
575 reg = <0x4a314000 0x80>;
576 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
577 ti,hwmods = "wd_timer2";
580 mcpdm: mcpdm@40132000 {
581 compatible = "ti,omap4-mcpdm";
582 reg = <0x40132000 0x7f>, /* MPU private access */
583 <0x49032000 0x7f>; /* L3 Interconnect */
584 reg-names = "mpu", "dma";
585 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
589 dma-names = "up_link", "dn_link";
593 dmic: dmic@4012e000 {
594 compatible = "ti,omap4-dmic";
595 reg = <0x4012e000 0x7f>, /* MPU private access */
596 <0x4902e000 0x7f>; /* L3 Interconnect */
597 reg-names = "mpu", "dma";
598 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
601 dma-names = "up_link";
605 mcbsp1: mcbsp@40122000 {
606 compatible = "ti,omap4-mcbsp";
607 reg = <0x40122000 0xff>, /* MPU private access */
608 <0x49022000 0xff>; /* L3 Interconnect */
609 reg-names = "mpu", "dma";
610 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
611 interrupt-names = "common";
612 ti,buffer-size = <128>;
613 ti,hwmods = "mcbsp1";
616 dma-names = "tx", "rx";
620 mcbsp2: mcbsp@40124000 {
621 compatible = "ti,omap4-mcbsp";
622 reg = <0x40124000 0xff>, /* MPU private access */
623 <0x49024000 0xff>; /* L3 Interconnect */
624 reg-names = "mpu", "dma";
625 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
626 interrupt-names = "common";
627 ti,buffer-size = <128>;
628 ti,hwmods = "mcbsp2";
631 dma-names = "tx", "rx";
635 mcbsp3: mcbsp@40126000 {
636 compatible = "ti,omap4-mcbsp";
637 reg = <0x40126000 0xff>, /* MPU private access */
638 <0x49026000 0xff>; /* L3 Interconnect */
639 reg-names = "mpu", "dma";
640 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
641 interrupt-names = "common";
642 ti,buffer-size = <128>;
643 ti,hwmods = "mcbsp3";
646 dma-names = "tx", "rx";
650 mcbsp4: mcbsp@48096000 {
651 compatible = "ti,omap4-mcbsp";
652 reg = <0x48096000 0xff>; /* L4 Interconnect */
654 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
655 interrupt-names = "common";
656 ti,buffer-size = <128>;
657 ti,hwmods = "mcbsp4";
660 dma-names = "tx", "rx";
664 keypad: keypad@4a31c000 {
665 compatible = "ti,omap4-keypad";
666 reg = <0x4a31c000 0x80>;
667 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
673 compatible = "ti,omap4-dmm";
674 reg = <0x4e000000 0x800>;
675 interrupts = <0 113 0x4>;
679 emif1: emif@4c000000 {
680 compatible = "ti,emif-4d";
681 reg = <0x4c000000 0x100>;
682 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
686 hw-caps-read-idle-ctrl;
687 hw-caps-ll-interface;
691 emif2: emif@4d000000 {
692 compatible = "ti,emif-4d";
693 reg = <0x4d000000 0x100>;
694 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
698 hw-caps-read-idle-ctrl;
699 hw-caps-ll-interface;
704 compatible = "ti,omap-ocp2scp";
705 reg = <0x4a0ad000 0x1f>;
706 #address-cells = <1>;
709 ti,hwmods = "ocp2scp_usb_phy";
710 usb2_phy: usb2phy@4a0ad080 {
711 compatible = "ti,omap-usb2";
712 reg = <0x4a0ad080 0x58>;
713 ctrl-module = <&omap_control_usb2phy>;
714 clocks = <&usb_phy_cm_clk32k>;
715 clock-names = "wkupclk";
720 mailbox: mailbox@4a0f4000 {
721 compatible = "ti,omap4-mailbox";
722 reg = <0x4a0f4000 0x200>;
723 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
724 ti,hwmods = "mailbox";
726 ti,mbox-num-users = <3>;
727 ti,mbox-num-fifos = <8>;
729 ti,mbox-tx = <0 0 0>;
730 ti,mbox-rx = <1 0 0>;
733 ti,mbox-tx = <3 0 0>;
734 ti,mbox-rx = <2 0 0>;
738 timer1: timer@4a318000 {
739 compatible = "ti,omap3430-timer";
740 reg = <0x4a318000 0x80>;
741 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
742 ti,hwmods = "timer1";
746 timer2: timer@48032000 {
747 compatible = "ti,omap3430-timer";
748 reg = <0x48032000 0x80>;
749 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
750 ti,hwmods = "timer2";
753 timer3: timer@48034000 {
754 compatible = "ti,omap4430-timer";
755 reg = <0x48034000 0x80>;
756 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
757 ti,hwmods = "timer3";
760 timer4: timer@48036000 {
761 compatible = "ti,omap4430-timer";
762 reg = <0x48036000 0x80>;
763 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
764 ti,hwmods = "timer4";
767 timer5: timer@40138000 {
768 compatible = "ti,omap4430-timer";
769 reg = <0x40138000 0x80>,
771 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
772 ti,hwmods = "timer5";
776 timer6: timer@4013a000 {
777 compatible = "ti,omap4430-timer";
778 reg = <0x4013a000 0x80>,
780 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
781 ti,hwmods = "timer6";
785 timer7: timer@4013c000 {
786 compatible = "ti,omap4430-timer";
787 reg = <0x4013c000 0x80>,
789 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
790 ti,hwmods = "timer7";
794 timer8: timer@4013e000 {
795 compatible = "ti,omap4430-timer";
796 reg = <0x4013e000 0x80>,
798 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
799 ti,hwmods = "timer8";
804 timer9: timer@4803e000 {
805 compatible = "ti,omap4430-timer";
806 reg = <0x4803e000 0x80>;
807 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
808 ti,hwmods = "timer9";
812 timer10: timer@48086000 {
813 compatible = "ti,omap3430-timer";
814 reg = <0x48086000 0x80>;
815 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
816 ti,hwmods = "timer10";
820 timer11: timer@48088000 {
821 compatible = "ti,omap4430-timer";
822 reg = <0x48088000 0x80>;
823 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
824 ti,hwmods = "timer11";
828 usbhstll: usbhstll@4a062000 {
829 compatible = "ti,usbhs-tll";
830 reg = <0x4a062000 0x1000>;
831 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
832 ti,hwmods = "usb_tll_hs";
835 usbhshost: usbhshost@4a064000 {
836 compatible = "ti,usbhs-host";
837 reg = <0x4a064000 0x800>;
838 ti,hwmods = "usb_host_hs";
839 #address-cells = <1>;
842 clocks = <&init_60m_fclk>,
845 clock-names = "refclk_60m_int",
849 usbhsohci: ohci@4a064800 {
850 compatible = "ti,ohci-omap3";
851 reg = <0x4a064800 0x400>;
852 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
855 usbhsehci: ehci@4a064c00 {
856 compatible = "ti,ehci-omap";
857 reg = <0x4a064c00 0x400>;
858 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
862 omap_control_usb2phy: control-phy@4a002300 {
863 compatible = "ti,control-phy-usb2";
864 reg = <0x4a002300 0x4>;
868 omap_control_usbotg: control-phy@4a00233c {
869 compatible = "ti,control-phy-otghs";
870 reg = <0x4a00233c 0x4>;
871 reg-names = "otghs_control";
874 usb_otg_hs: usb_otg_hs@4a0ab000 {
875 compatible = "ti,omap4-musb";
876 reg = <0x4a0ab000 0x7ff>;
877 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
878 interrupt-names = "mc", "dma";
879 ti,hwmods = "usb_otg_hs";
880 usb-phy = <&usb2_phy>;
882 phy-names = "usb2-phy";
886 ctrl-module = <&omap_control_usbotg>;
890 compatible = "ti,omap4-aes";
892 reg = <0x4b501000 0xa0>;
893 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
894 dmas = <&sdma 111>, <&sdma 110>;
895 dma-names = "tx", "rx";
899 compatible = "ti,omap4-des";
901 reg = <0x480a5000 0xa0>;
902 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
903 dmas = <&sdma 117>, <&sdma 116>;
904 dma-names = "tx", "rx";
907 abb_mpu: regulator-abb-mpu {
908 compatible = "ti,abb-v2";
909 regulator-name = "abb_mpu";
910 #address-cells = <0>;
912 ti,tranxdone-status-mask = <0x80>;
913 clocks = <&sys_clkin_ck>;
914 ti,settling-time = <50>;
915 ti,clock-cycles = <16>;
920 abb_iva: regulator-abb-iva {
921 compatible = "ti,abb-v2";
922 regulator-name = "abb_iva";
923 #address-cells = <0>;
925 ti,tranxdone-status-mask = <0x80000000>;
926 clocks = <&sys_clkin_ck>;
927 ti,settling-time = <50>;
928 ti,clock-cycles = <16>;
934 compatible = "ti,omap4-dss";
935 reg = <0x58000000 0x80>;
937 ti,hwmods = "dss_core";
938 clocks = <&dss_dss_clk>;
940 #address-cells = <1>;
945 compatible = "ti,omap4-dispc";
946 reg = <0x58001000 0x1000>;
947 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
948 ti,hwmods = "dss_dispc";
949 clocks = <&dss_dss_clk>;
953 rfbi: encoder@58002000 {
954 compatible = "ti,omap4-rfbi";
955 reg = <0x58002000 0x1000>;
957 ti,hwmods = "dss_rfbi";
958 clocks = <&dss_dss_clk>, <&l3_div_ck>;
959 clock-names = "fck", "ick";
962 venc: encoder@58003000 {
963 compatible = "ti,omap4-venc";
964 reg = <0x58003000 0x1000>;
966 ti,hwmods = "dss_venc";
967 clocks = <&dss_tv_clk>;
971 dsi1: encoder@58004000 {
972 compatible = "ti,omap4-dsi";
973 reg = <0x58004000 0x200>,
976 reg-names = "proto", "phy", "pll";
977 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
979 ti,hwmods = "dss_dsi1";
980 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
981 clock-names = "fck", "sys_clk";
984 dsi2: encoder@58005000 {
985 compatible = "ti,omap4-dsi";
986 reg = <0x58005000 0x200>,
989 reg-names = "proto", "phy", "pll";
990 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
992 ti,hwmods = "dss_dsi2";
993 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
994 clock-names = "fck", "sys_clk";
997 hdmi: encoder@58006000 {
998 compatible = "ti,omap4-hdmi";
999 reg = <0x58006000 0x200>,
1002 <0x58006400 0x1000>;
1003 reg-names = "wp", "pll", "phy", "core";
1004 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1005 status = "disabled";
1006 ti,hwmods = "dss_hdmi";
1007 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1008 clock-names = "fck", "sys_clk";
1010 dma-names = "audio_tx";
1016 /include/ "omap44xx-clocks.dtsi"