arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/pinctrl/omap.h>
  12
  13 / {
  14         compatible = "ti,omap4430", "ti,omap4";
  15         interrupt-parent = <&wakeupgen>;
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18         chosen { };
  19
  20         aliases {
  21                 i2c0 = &i2c1;
  22                 i2c1 = &i2c2;
  23                 i2c2 = &i2c3;
  24                 i2c3 = &i2c4;
  25                 mmc0 = &mmc1;
  26                 mmc1 = &mmc2;
  27                 mmc2 = &mmc3;
  28                 mmc3 = &mmc4;
  29                 mmc4 = &mmc5;
  30                 serial0 = &uart1;
  31                 serial1 = &uart2;
  32                 serial2 = &uart3;
  33                 serial3 = &uart4;
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 cpu@0 {
  41                         compatible = "arm,cortex-a9";
  42                         device_type = "cpu";
  43                         next-level-cache = <&L2>;
  44                         reg = <0x0>;
  45
  46                         clocks = <&dpll_mpu_ck>;
  47                         clock-names = "cpu";
  48
  49                         clock-latency = <300000>; /* From omap-cpufreq driver */
  50                 };
  51                 cpu@1 {
  52                         compatible = "arm,cortex-a9";
  53                         device_type = "cpu";
  54                         next-level-cache = <&L2>;
  55                         reg = <0x1>;
  56                 };
  57         };
  58
  59         gic: interrupt-controller@48241000 {
  60                 compatible = "arm,cortex-a9-gic";
  61                 interrupt-controller;
  62                 #interrupt-cells = <3>;
  63                 reg = <0x48241000 0x1000>,
  64                       <0x48240100 0x0100>;
  65                 interrupt-parent = <&gic>;
  66         };
  67
  68         L2: l2-cache-controller@48242000 {
  69                 compatible = "arm,pl310-cache";
  70                 reg = <0x48242000 0x1000>;
  71                 cache-unified;
  72                 cache-level = <2>;
  73         };
  74
  75         local-timer@48240600 {
  76                 compatible = "arm,cortex-a9-twd-timer";
  77                 clocks = <&mpu_periphclk>;
  78                 reg = <0x48240600 0x20>;
  79                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
  80                 interrupt-parent = <&gic>;
  81         };
  82
  83         wakeupgen: interrupt-controller@48281000 {
  84                 compatible = "ti,omap4-wugen-mpu";
  85                 interrupt-controller;
  86                 #interrupt-cells = <3>;
  87                 reg = <0x48281000 0x1000>;
  88                 interrupt-parent = <&gic>;
  89         };
  90
  91         /*
  92          * The soc node represents the soc top level view. It is used for IPs
  93          * that are not memory mapped in the MPU view or for the MPU itself.
  94          */
  95         soc {
  96                 compatible = "ti,omap-infra";
  97                 mpu {
  98                         compatible = "ti,omap4-mpu";
  99                         ti,hwmods = "mpu";
 100                         sram = <&ocmcram>;
 101                 };
 102
 103                 dsp {
 104                         compatible = "ti,omap3-c64";
 105                         ti,hwmods = "dsp";
 106                 };
 107
 108                 iva {
 109                         compatible = "ti,ivahd";
 110                         ti,hwmods = "iva";
 111                 };
 112         };
 113
 114         /*
 115          * XXX: Use a flat representation of the OMAP4 interconnect.
 116          * The real OMAP interconnect network is quite complex.
 117          * Since it will not bring real advantage to represent that in DT for
 118          * the moment, just use a fake OCP bus entry to represent the whole bus
 119          * hierarchy.
 120          */
 121         ocp {
 122                 compatible = "ti,omap4-l3-noc", "simple-bus";
 123                 #address-cells = <1>;
 124                 #size-cells = <1>;
 125                 ranges;
 126                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 127                 reg = <0x44000000 0x1000>,
 128                       <0x44800000 0x2000>,
 129                       <0x45000000 0x1000>;
 130                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 131                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 132
 133                 l4_cfg: l4@4a000000 {
 134                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 135                         #address-cells = <1>;
 136                         #size-cells = <1>;
 137                         ranges = <0 0x4a000000 0x1000000>;
 138
 139                         cm1: cm1@4000 {
 140                                 compatible = "ti,omap4-cm1";
 141                                 reg = <0x4000 0x2000>;
 142
 143                                 cm1_clocks: clocks {
 144                                         #address-cells = <1>;
 145                                         #size-cells = <0>;
 146                                 };
 147
 148                                 cm1_clockdomains: clockdomains {
 149                                 };
 150                         };
 151
 152                         cm2: cm2@8000 {
 153                                 compatible = "ti,omap4-cm2";
 154                                 reg = <0x8000 0x3000>;
 155
 156                                 cm2_clocks: clocks {
 157                                         #address-cells = <1>;
 158                                         #size-cells = <0>;
 159                                 };
 160
 161                                 cm2_clockdomains: clockdomains {
 162                                 };
 163                         };
 164
 165                         omap4_scm_core: scm@2000 {
 166                                 compatible = "ti,omap4-scm-core", "simple-bus";
 167                                 reg = <0x2000 0x1000>;
 168                                 #address-cells = <1>;
 169                                 #size-cells = <1>;
 170                                 ranges = <0 0x2000 0x1000>;
 171
 172                                 scm_conf: scm_conf@0 {
 173                                         compatible = "syscon";
 174                                         reg = <0x0 0x800>;
 175                                         #address-cells = <1>;
 176                                         #size-cells = <1>;
 177                                 };
 178                         };
 179
 180                         omap4_padconf_core: scm@100000 {
 181                                 compatible = "ti,omap4-scm-padconf-core",
 182                                              "simple-bus";
 183                                 #address-cells = <1>;
 184                                 #size-cells = <1>;
 185                                 ranges = <0 0x100000 0x1000>;
 186
 187                                 omap4_pmx_core: pinmux@40 {
 188                                         compatible = "ti,omap4-padconf",
 189                                                      "pinctrl-single";
 190                                         reg = <0x40 0x0196>;
 191                                         #address-cells = <1>;
 192                                         #size-cells = <0>;
 193                                         #pinctrl-cells = <1>;
 194                                         #interrupt-cells = <1>;
 195                                         interrupt-controller;
 196                                         pinctrl-single,register-width = <16>;
 197                                         pinctrl-single,function-mask = <0x7fff>;
 198                                 };
 199
 200                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 201                                         compatible = "syscon",
 202                                                      "simple-bus";
 203                                         reg = <0x5a0 0x170>;
 204                                         #address-cells = <1>;
 205                                         #size-cells = <1>;
 206                                         ranges = <0 0x5a0 0x170>;
 207
 208                                         pbias_regulator: pbias_regulator@60 {
 209                                                 compatible = "ti,pbias-omap4", "ti,pbias-omap";
 210                                                 reg = <0x60 0x4>;
 211                                                 syscon = <&omap4_padconf_global>;
 212                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 213                                                         regulator-name = "pbias_mmc_omap4";
 214                                                         regulator-min-microvolt = <1800000>;
 215                                                         regulator-max-microvolt = <3000000>;
 216                                                 };
 217                                         };
 218                                 };
 219                         };
 220
 221                         l4_wkup: l4@300000 {
 222                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 223                                 #address-cells = <1>;
 224                                 #size-cells = <1>;
 225                                 ranges = <0 0x300000 0x40000>;
 226
 227                                 counter32k: counter@4000 {
 228                                         compatible = "ti,omap-counter32k";
 229                                         reg = <0x4000 0x20>;
 230                                         ti,hwmods = "counter_32k";
 231                                 };
 232
 233                                 prm: prm@6000 {
 234                                         compatible = "ti,omap4-prm";
 235                                         reg = <0x6000 0x3000>;
 236                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 237
 238                                         prm_clocks: clocks {
 239                                                 #address-cells = <1>;
 240                                                 #size-cells = <0>;
 241                                         };
 242
 243                                         prm_clockdomains: clockdomains {
 244                                         };
 245                                 };
 246
 247                                 scrm: scrm@a000 {
 248                                         compatible = "ti,omap4-scrm";
 249                                         reg = <0xa000 0x2000>;
 250
 251                                         scrm_clocks: clocks {
 252                                                 #address-cells = <1>;
 253                                                 #size-cells = <0>;
 254                                         };
 255
 256                                         scrm_clockdomains: clockdomains {
 257                                         };
 258                                 };
 259
 260                                 omap4_pmx_wkup: pinmux@1e040 {
 261                                         compatible = "ti,omap4-padconf",
 262                                                      "pinctrl-single";
 263                                         reg = <0x1e040 0x0038>;
 264                                         #address-cells = <1>;
 265                                         #size-cells = <0>;
 266                                         #pinctrl-cells = <1>;
 267                                         #interrupt-cells = <1>;
 268                                         interrupt-controller;
 269                                         pinctrl-single,register-width = <16>;
 270                                         pinctrl-single,function-mask = <0x7fff>;
 271                                 };
 272                         };
 273                 };
 274
 275                 ocmcram: ocmcram@40304000 {
 276                         compatible = "mmio-sram";
 277                         reg = <0x40304000 0xa000>; /* 40k */
 278                 };
 279
 280                 sdma: dma-controller@4a056000 {
 281                         compatible = "ti,omap4430-sdma";
 282                         reg = <0x4a056000 0x1000>;
 283                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 284                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 285                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 286                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 287                         #dma-cells = <1>;
 288                         dma-channels = <32>;
 289                         dma-requests = <127>;
 290                 };
 291
 292                 gpio1: gpio@4a310000 {
 293                         compatible = "ti,omap4-gpio";
 294                         reg = <0x4a310000 0x200>;
 295                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 296                         ti,hwmods = "gpio1";
 297                         ti,gpio-always-on;
 298                         gpio-controller;
 299                         #gpio-cells = <2>;
 300                         interrupt-controller;
 301                         #interrupt-cells = <2>;
 302                 };
 303
 304                 gpio2: gpio@48055000 {
 305                         compatible = "ti,omap4-gpio";
 306                         reg = <0x48055000 0x200>;
 307                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 308                         ti,hwmods = "gpio2";
 309                         gpio-controller;
 310                         #gpio-cells = <2>;
 311                         interrupt-controller;
 312                         #interrupt-cells = <2>;
 313                 };
 314
 315                 gpio3: gpio@48057000 {
 316                         compatible = "ti,omap4-gpio";
 317                         reg = <0x48057000 0x200>;
 318                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 319                         ti,hwmods = "gpio3";
 320                         gpio-controller;
 321                         #gpio-cells = <2>;
 322                         interrupt-controller;
 323                         #interrupt-cells = <2>;
 324                 };
 325
 326                 gpio4: gpio@48059000 {
 327                         compatible = "ti,omap4-gpio";
 328                         reg = <0x48059000 0x200>;
 329                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 330                         ti,hwmods = "gpio4";
 331                         gpio-controller;
 332                         #gpio-cells = <2>;
 333                         interrupt-controller;
 334                         #interrupt-cells = <2>;
 335                 };
 336
 337                 gpio5: gpio@4805b000 {
 338                         compatible = "ti,omap4-gpio";
 339                         reg = <0x4805b000 0x200>;
 340                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 341                         ti,hwmods = "gpio5";
 342                         gpio-controller;
 343                         #gpio-cells = <2>;
 344                         interrupt-controller;
 345                         #interrupt-cells = <2>;
 346                 };
 347
 348                 gpio6: gpio@4805d000 {
 349                         compatible = "ti,omap4-gpio";
 350                         reg = <0x4805d000 0x200>;
 351                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 352                         ti,hwmods = "gpio6";
 353                         gpio-controller;
 354                         #gpio-cells = <2>;
 355                         interrupt-controller;
 356                         #interrupt-cells = <2>;
 357                 };
 358
 359                 elm: elm@48078000 {
 360                         compatible = "ti,am3352-elm";
 361                         reg = <0x48078000 0x2000>;
 362                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 363                         ti,hwmods = "elm";
 364                         status = "disabled";
 365                 };
 366
 367                 gpmc: gpmc@50000000 {
 368                         compatible = "ti,omap4430-gpmc";
 369                         reg = <0x50000000 0x1000>;
 370                         #address-cells = <2>;
 371                         #size-cells = <1>;
 372                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 373                         dmas = <&sdma 4>;
 374                         dma-names = "rxtx";
 375                         gpmc,num-cs = <8>;
 376                         gpmc,num-waitpins = <4>;
 377                         ti,hwmods = "gpmc";
 378                         ti,no-idle-on-init;
 379                         clocks = <&l3_div_ck>;
 380                         clock-names = "fck";
 381                         interrupt-controller;
 382                         #interrupt-cells = <2>;
 383                         gpio-controller;
 384                         #gpio-cells = <2>;
 385                 };
 386
 387                 uart1: serial@4806a000 {
 388                         compatible = "ti,omap4-uart";
 389                         reg = <0x4806a000 0x100>;
 390                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 391                         ti,hwmods = "uart1";
 392                         clock-frequency = <48000000>;
 393                 };
 394
 395                 uart2: serial@4806c000 {
 396                         compatible = "ti,omap4-uart";
 397                         reg = <0x4806c000 0x100>;
 398                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 399                         ti,hwmods = "uart2";
 400                         clock-frequency = <48000000>;
 401                 };
 402
 403                 uart3: serial@48020000 {
 404                         compatible = "ti,omap4-uart";
 405                         reg = <0x48020000 0x100>;
 406                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 407                         ti,hwmods = "uart3";
 408                         clock-frequency = <48000000>;
 409                 };
 410
 411                 uart4: serial@4806e000 {
 412                         compatible = "ti,omap4-uart";
 413                         reg = <0x4806e000 0x100>;
 414                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 415                         ti,hwmods = "uart4";
 416                         clock-frequency = <48000000>;
 417                 };
 418
 419                 hwspinlock: spinlock@4a0f6000 {
 420                         compatible = "ti,omap4-hwspinlock";
 421                         reg = <0x4a0f6000 0x1000>;
 422                         ti,hwmods = "spinlock";
 423                         #hwlock-cells = <1>;
 424                 };
 425
 426                 i2c1: i2c@48070000 {
 427                         compatible = "ti,omap4-i2c";
 428                         reg = <0x48070000 0x100>;
 429                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 430                         #address-cells = <1>;
 431                         #size-cells = <0>;
 432                         ti,hwmods = "i2c1";
 433                 };
 434
 435                 i2c2: i2c@48072000 {
 436                         compatible = "ti,omap4-i2c";
 437                         reg = <0x48072000 0x100>;
 438                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 439                         #address-cells = <1>;
 440                         #size-cells = <0>;
 441                         ti,hwmods = "i2c2";
 442                 };
 443
 444                 i2c3: i2c@48060000 {
 445                         compatible = "ti,omap4-i2c";
 446                         reg = <0x48060000 0x100>;
 447                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 448                         #address-cells = <1>;
 449                         #size-cells = <0>;
 450                         ti,hwmods = "i2c3";
 451                 };
 452
 453                 i2c4: i2c@48350000 {
 454                         compatible = "ti,omap4-i2c";
 455                         reg = <0x48350000 0x100>;
 456                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 457                         #address-cells = <1>;
 458                         #size-cells = <0>;
 459                         ti,hwmods = "i2c4";
 460                 };
 461
 462                 mcspi1: spi@48098000 {
 463                         compatible = "ti,omap4-mcspi";
 464                         reg = <0x48098000 0x200>;
 465                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 466                         #address-cells = <1>;
 467                         #size-cells = <0>;
 468                         ti,hwmods = "mcspi1";
 469                         ti,spi-num-cs = <4>;
 470                         dmas = <&sdma 35>,
 471                                <&sdma 36>,
 472                                <&sdma 37>,
 473                                <&sdma 38>,
 474                                <&sdma 39>,
 475                                <&sdma 40>,
 476                                <&sdma 41>,
 477                                <&sdma 42>;
 478                         dma-names = "tx0", "rx0", "tx1", "rx1",
 479                                     "tx2", "rx2", "tx3", "rx3";
 480                 };
 481
 482                 mcspi2: spi@4809a000 {
 483                         compatible = "ti,omap4-mcspi";
 484                         reg = <0x4809a000 0x200>;
 485                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 486                         #address-cells = <1>;
 487                         #size-cells = <0>;
 488                         ti,hwmods = "mcspi2";
 489                         ti,spi-num-cs = <2>;
 490                         dmas = <&sdma 43>,
 491                                <&sdma 44>,
 492                                <&sdma 45>,
 493                                <&sdma 46>;
 494                         dma-names = "tx0", "rx0", "tx1", "rx1";
 495                 };
 496
 497                 mcspi3: spi@480b8000 {
 498                         compatible = "ti,omap4-mcspi";
 499                         reg = <0x480b8000 0x200>;
 500                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 501                         #address-cells = <1>;
 502                         #size-cells = <0>;
 503                         ti,hwmods = "mcspi3";
 504                         ti,spi-num-cs = <2>;
 505                         dmas = <&sdma 15>, <&sdma 16>;
 506                         dma-names = "tx0", "rx0";
 507                 };
 508
 509                 mcspi4: spi@480ba000 {
 510                         compatible = "ti,omap4-mcspi";
 511                         reg = <0x480ba000 0x200>;
 512                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 513                         #address-cells = <1>;
 514                         #size-cells = <0>;
 515                         ti,hwmods = "mcspi4";
 516                         ti,spi-num-cs = <1>;
 517                         dmas = <&sdma 70>, <&sdma 71>;
 518                         dma-names = "tx0", "rx0";
 519                 };
 520
 521                 mmc1: mmc@4809c000 {
 522                         compatible = "ti,omap4-hsmmc";
 523                         reg = <0x4809c000 0x400>;
 524                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 525                         ti,hwmods = "mmc1";
 526                         ti,dual-volt;
 527                         ti,needs-special-reset;
 528                         dmas = <&sdma 61>, <&sdma 62>;
 529                         dma-names = "tx", "rx";
 530                         pbias-supply = <&pbias_mmc_reg>;
 531                 };
 532
 533                 mmc2: mmc@480b4000 {
 534                         compatible = "ti,omap4-hsmmc";
 535                         reg = <0x480b4000 0x400>;
 536                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 537                         ti,hwmods = "mmc2";
 538                         ti,needs-special-reset;
 539                         dmas = <&sdma 47>, <&sdma 48>;
 540                         dma-names = "tx", "rx";
 541                 };
 542
 543                 mmc3: mmc@480ad000 {
 544                         compatible = "ti,omap4-hsmmc";
 545                         reg = <0x480ad000 0x400>;
 546                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 547                         ti,hwmods = "mmc3";
 548                         ti,needs-special-reset;
 549                         dmas = <&sdma 77>, <&sdma 78>;
 550                         dma-names = "tx", "rx";
 551                 };
 552
 553                 mmc4: mmc@480d1000 {
 554                         compatible = "ti,omap4-hsmmc";
 555                         reg = <0x480d1000 0x400>;
 556                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 557                         ti,hwmods = "mmc4";
 558                         ti,needs-special-reset;
 559                         dmas = <&sdma 57>, <&sdma 58>;
 560                         dma-names = "tx", "rx";
 561                 };
 562
 563                 mmc5: mmc@480d5000 {
 564                         compatible = "ti,omap4-hsmmc";
 565                         reg = <0x480d5000 0x400>;
 566                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 567                         ti,hwmods = "mmc5";
 568                         ti,needs-special-reset;
 569                         dmas = <&sdma 59>, <&sdma 60>;
 570                         dma-names = "tx", "rx";
 571                 };
 572
 573                 mmu_dsp: mmu@4a066000 {
 574                         compatible = "ti,omap4-iommu";
 575                         reg = <0x4a066000 0x100>;
 576                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 577                         ti,hwmods = "mmu_dsp";
 578                         #iommu-cells = <0>;
 579                 };
 580
 581                 mmu_ipu: mmu@55082000 {
 582                         compatible = "ti,omap4-iommu";
 583                         reg = <0x55082000 0x100>;
 584                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 585                         ti,hwmods = "mmu_ipu";
 586                         #iommu-cells = <0>;
 587                         ti,iommu-bus-err-back;
 588                 };
 589
 590                 wdt2: wdt@4a314000 {
 591                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 592                         reg = <0x4a314000 0x80>;
 593                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 594                         ti,hwmods = "wd_timer2";
 595                 };
 596
 597                 mcpdm: mcpdm@40132000 {
 598                         compatible = "ti,omap4-mcpdm";
 599                         reg = <0x40132000 0x7f>, /* MPU private access */
 600                               <0x49032000 0x7f>; /* L3 Interconnect */
 601                         reg-names = "mpu", "dma";
 602                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 603                         ti,hwmods = "mcpdm";
 604                         dmas = <&sdma 65>,
 605                                <&sdma 66>;
 606                         dma-names = "up_link", "dn_link";
 607                         status = "disabled";
 608                 };
 609
 610                 dmic: dmic@4012e000 {
 611                         compatible = "ti,omap4-dmic";
 612                         reg = <0x4012e000 0x7f>, /* MPU private access */
 613                               <0x4902e000 0x7f>; /* L3 Interconnect */
 614                         reg-names = "mpu", "dma";
 615                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 616                         ti,hwmods = "dmic";
 617                         dmas = <&sdma 67>;
 618                         dma-names = "up_link";
 619                         status = "disabled";
 620                 };
 621
 622                 mcbsp1: mcbsp@40122000 {
 623                         compatible = "ti,omap4-mcbsp";
 624                         reg = <0x40122000 0xff>, /* MPU private access */
 625                               <0x49022000 0xff>; /* L3 Interconnect */
 626                         reg-names = "mpu", "dma";
 627                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 628                         interrupt-names = "common";
 629                         ti,buffer-size = <128>;
 630                         ti,hwmods = "mcbsp1";
 631                         dmas = <&sdma 33>,
 632                                <&sdma 34>;
 633                         dma-names = "tx", "rx";
 634                         status = "disabled";
 635                 };
 636
 637                 mcbsp2: mcbsp@40124000 {
 638                         compatible = "ti,omap4-mcbsp";
 639                         reg = <0x40124000 0xff>, /* MPU private access */
 640                               <0x49024000 0xff>; /* L3 Interconnect */
 641                         reg-names = "mpu", "dma";
 642                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 643                         interrupt-names = "common";
 644                         ti,buffer-size = <128>;
 645                         ti,hwmods = "mcbsp2";
 646                         dmas = <&sdma 17>,
 647                                <&sdma 18>;
 648                         dma-names = "tx", "rx";
 649                         status = "disabled";
 650                 };
 651
 652                 mcbsp3: mcbsp@40126000 {
 653                         compatible = "ti,omap4-mcbsp";
 654                         reg = <0x40126000 0xff>, /* MPU private access */
 655                               <0x49026000 0xff>; /* L3 Interconnect */
 656                         reg-names = "mpu", "dma";
 657                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 658                         interrupt-names = "common";
 659                         ti,buffer-size = <128>;
 660                         ti,hwmods = "mcbsp3";
 661                         dmas = <&sdma 19>,
 662                                <&sdma 20>;
 663                         dma-names = "tx", "rx";
 664                         status = "disabled";
 665                 };
 666
 667                 mcbsp4: mcbsp@48096000 {
 668                         compatible = "ti,omap4-mcbsp";
 669                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 670                         reg-names = "mpu";
 671                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 672                         interrupt-names = "common";
 673                         ti,buffer-size = <128>;
 674                         ti,hwmods = "mcbsp4";
 675                         dmas = <&sdma 31>,
 676                                <&sdma 32>;
 677                         dma-names = "tx", "rx";
 678                         status = "disabled";
 679                 };
 680
 681                 keypad: keypad@4a31c000 {
 682                         compatible = "ti,omap4-keypad";
 683                         reg = <0x4a31c000 0x80>;
 684                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 685                         reg-names = "mpu";
 686                         ti,hwmods = "kbd";
 687                 };
 688
 689                 dmm@4e000000 {
 690                         compatible = "ti,omap4-dmm";
 691                         reg = <0x4e000000 0x800>;
 692                         interrupts = <0 113 0x4>;
 693                         ti,hwmods = "dmm";
 694                 };
 695
 696                 emif1: emif@4c000000 {
 697                         compatible = "ti,emif-4d";
 698                         reg = <0x4c000000 0x100>;
 699                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 700                         ti,hwmods = "emif1";
 701                         ti,no-idle-on-init;
 702                         phy-type = <1>;
 703                         hw-caps-read-idle-ctrl;
 704                         hw-caps-ll-interface;
 705                         hw-caps-temp-alert;
 706                 };
 707
 708                 emif2: emif@4d000000 {
 709                         compatible = "ti,emif-4d";
 710                         reg = <0x4d000000 0x100>;
 711                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 712                         ti,hwmods = "emif2";
 713                         ti,no-idle-on-init;
 714                         phy-type = <1>;
 715                         hw-caps-read-idle-ctrl;
 716                         hw-caps-ll-interface;
 717                         hw-caps-temp-alert;
 718                 };
 719
 720                 ocp2scp@4a0ad000 {
 721                         compatible = "ti,omap-ocp2scp";
 722                         reg = <0x4a0ad000 0x1f>;
 723                         #address-cells = <1>;
 724                         #size-cells = <1>;
 725                         ranges;
 726                         ti,hwmods = "ocp2scp_usb_phy";
 727                         usb2_phy: usb2phy@4a0ad080 {
 728                                 compatible = "ti,omap-usb2";
 729                                 reg = <0x4a0ad080 0x58>;
 730                                 ctrl-module = <&omap_control_usb2phy>;
 731                                 clocks = <&usb_phy_cm_clk32k>;
 732                                 clock-names = "wkupclk";
 733                                 #phy-cells = <0>;
 734                         };
 735                 };
 736
 737                 mailbox: mailbox@4a0f4000 {
 738                         compatible = "ti,omap4-mailbox";
 739                         reg = <0x4a0f4000 0x200>;
 740                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 741                         ti,hwmods = "mailbox";
 742                         #mbox-cells = <1>;
 743                         ti,mbox-num-users = <3>;
 744                         ti,mbox-num-fifos = <8>;
 745                         mbox_ipu: mbox_ipu {
 746                                 ti,mbox-tx = <0 0 0>;
 747                                 ti,mbox-rx = <1 0 0>;
 748                         };
 749                         mbox_dsp: mbox_dsp {
 750                                 ti,mbox-tx = <3 0 0>;
 751                                 ti,mbox-rx = <2 0 0>;
 752                         };
 753                 };
 754
 755                 timer1: timer@4a318000 {
 756                         compatible = "ti,omap3430-timer";
 757                         reg = <0x4a318000 0x80>;
 758                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 759                         ti,hwmods = "timer1";
 760                         ti,timer-alwon;
 761                 };
 762
 763                 timer2: timer@48032000 {
 764                         compatible = "ti,omap3430-timer";
 765                         reg = <0x48032000 0x80>;
 766                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 767                         ti,hwmods = "timer2";
 768                 };
 769
 770                 timer3: timer@48034000 {
 771                         compatible = "ti,omap4430-timer";
 772                         reg = <0x48034000 0x80>;
 773                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 774                         ti,hwmods = "timer3";
 775                 };
 776
 777                 timer4: timer@48036000 {
 778                         compatible = "ti,omap4430-timer";
 779                         reg = <0x48036000 0x80>;
 780                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 781                         ti,hwmods = "timer4";
 782                 };
 783
 784                 timer5: timer@40138000 {
 785                         compatible = "ti,omap4430-timer";
 786                         reg = <0x40138000 0x80>,
 787                               <0x49038000 0x80>;
 788                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 789                         ti,hwmods = "timer5";
 790                         ti,timer-dsp;
 791                 };
 792
 793                 timer6: timer@4013a000 {
 794                         compatible = "ti,omap4430-timer";
 795                         reg = <0x4013a000 0x80>,
 796                               <0x4903a000 0x80>;
 797                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 798                         ti,hwmods = "timer6";
 799                         ti,timer-dsp;
 800                 };
 801
 802                 timer7: timer@4013c000 {
 803                         compatible = "ti,omap4430-timer";
 804                         reg = <0x4013c000 0x80>,
 805                               <0x4903c000 0x80>;
 806                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 807                         ti,hwmods = "timer7";
 808                         ti,timer-dsp;
 809                 };
 810
 811                 timer8: timer@4013e000 {
 812                         compatible = "ti,omap4430-timer";
 813                         reg = <0x4013e000 0x80>,
 814                               <0x4903e000 0x80>;
 815                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 816                         ti,hwmods = "timer8";
 817                         ti,timer-pwm;
 818                         ti,timer-dsp;
 819                 };
 820
 821                 timer9: timer@4803e000 {
 822                         compatible = "ti,omap4430-timer";
 823                         reg = <0x4803e000 0x80>;
 824                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 825                         ti,hwmods = "timer9";
 826                         ti,timer-pwm;
 827                 };
 828
 829                 timer10: timer@48086000 {
 830                         compatible = "ti,omap3430-timer";
 831                         reg = <0x48086000 0x80>;
 832                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 833                         ti,hwmods = "timer10";
 834                         ti,timer-pwm;
 835                 };
 836
 837                 timer11: timer@48088000 {
 838                         compatible = "ti,omap4430-timer";
 839                         reg = <0x48088000 0x80>;
 840                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 841                         ti,hwmods = "timer11";
 842                         ti,timer-pwm;
 843                 };
 844
 845                 usbhstll: usbhstll@4a062000 {
 846                         compatible = "ti,usbhs-tll";
 847                         reg = <0x4a062000 0x1000>;
 848                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 849                         ti,hwmods = "usb_tll_hs";
 850                 };
 851
 852                 usbhshost: usbhshost@4a064000 {
 853                         compatible = "ti,usbhs-host";
 854                         reg = <0x4a064000 0x800>;
 855                         ti,hwmods = "usb_host_hs";
 856                         #address-cells = <1>;
 857                         #size-cells = <1>;
 858                         ranges;
 859                         clocks = <&init_60m_fclk>,
 860                                  <&xclk60mhsp1_ck>,
 861                                  <&xclk60mhsp2_ck>;
 862                         clock-names = "refclk_60m_int",
 863                                       "refclk_60m_ext_p1",
 864                                       "refclk_60m_ext_p2";
 865
 866                         usbhsohci: ohci@4a064800 {
 867                                 compatible = "ti,ohci-omap3";
 868                                 reg = <0x4a064800 0x400>;
 869                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 870                         };
 871
 872                         usbhsehci: ehci@4a064c00 {
 873                                 compatible = "ti,ehci-omap";
 874                                 reg = <0x4a064c00 0x400>;
 875                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 876                         };
 877                 };
 878
 879                 omap_control_usb2phy: control-phy@4a002300 {
 880                         compatible = "ti,control-phy-usb2";
 881                         reg = <0x4a002300 0x4>;
 882                         reg-names = "power";
 883                 };
 884
 885                 omap_control_usbotg: control-phy@4a00233c {
 886                         compatible = "ti,control-phy-otghs";
 887                         reg = <0x4a00233c 0x4>;
 888                         reg-names = "otghs_control";
 889                 };
 890
 891                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 892                         compatible = "ti,omap4-musb";
 893                         reg = <0x4a0ab000 0x7ff>;
 894                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 895                         interrupt-names = "mc", "dma";
 896                         ti,hwmods = "usb_otg_hs";
 897                         usb-phy = <&usb2_phy>;
 898                         phys = <&usb2_phy>;
 899                         phy-names = "usb2-phy";
 900                         multipoint = <1>;
 901                         num-eps = <16>;
 902                         ram-bits = <12>;
 903                         ctrl-module = <&omap_control_usbotg>;
 904                 };
 905
 906                 aes1: aes@4b501000 {
 907                         compatible = "ti,omap4-aes";
 908                         ti,hwmods = "aes1";
 909                         reg = <0x4b501000 0xa0>;
 910                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 911                         dmas = <&sdma 111>, <&sdma 110>;
 912                         dma-names = "tx", "rx";
 913                 };
 914
 915                 aes2: aes@4b701000 {
 916                         compatible = "ti,omap4-aes";
 917                         ti,hwmods = "aes2";
 918                         reg = <0x4b701000 0xa0>;
 919                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 920                         dmas = <&sdma 114>, <&sdma 113>;
 921                         dma-names = "tx", "rx";
 922                 };
 923
 924                 des: des@480a5000 {
 925                         compatible = "ti,omap4-des";
 926                         ti,hwmods = "des";
 927                         reg = <0x480a5000 0xa0>;
 928                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 929                         dmas = <&sdma 117>, <&sdma 116>;
 930                         dma-names = "tx", "rx";
 931                 };
 932
 933                 sham: sham@4b100000 {
 934                         compatible = "ti,omap4-sham";
 935                         ti,hwmods = "sham";
 936                         reg = <0x4b100000 0x300>;
 937                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 938                         dmas = <&sdma 119>;
 939                         dma-names = "rx";
 940                 };
 941
 942                 abb_mpu: regulator-abb-mpu {
 943                         compatible = "ti,abb-v2";
 944                         regulator-name = "abb_mpu";
 945                         #address-cells = <0>;
 946                         #size-cells = <0>;
 947                         ti,tranxdone-status-mask = <0x80>;
 948                         clocks = <&sys_clkin_ck>;
 949                         ti,settling-time = <50>;
 950                         ti,clock-cycles = <16>;
 951
 952                         status = "disabled";
 953                 };
 954
 955                 abb_iva: regulator-abb-iva {
 956                         compatible = "ti,abb-v2";
 957                         regulator-name = "abb_iva";
 958                         #address-cells = <0>;
 959                         #size-cells = <0>;
 960                         ti,tranxdone-status-mask = <0x80000000>;
 961                         clocks = <&sys_clkin_ck>;
 962                         ti,settling-time = <50>;
 963                         ti,clock-cycles = <16>;
 964
 965                         status = "disabled";
 966                 };
 967
 968                 dss: dss@58000000 {
 969                         compatible = "ti,omap4-dss";
 970                         reg = <0x58000000 0x80>;
 971                         status = "disabled";
 972                         ti,hwmods = "dss_core";
 973                         clocks = <&dss_dss_clk>;
 974                         clock-names = "fck";
 975                         #address-cells = <1>;
 976                         #size-cells = <1>;
 977                         ranges;
 978
 979                         dispc@58001000 {
 980                                 compatible = "ti,omap4-dispc";
 981                                 reg = <0x58001000 0x1000>;
 982                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 983                                 ti,hwmods = "dss_dispc";
 984                                 clocks = <&dss_dss_clk>;
 985                                 clock-names = "fck";
 986                         };
 987
 988                         rfbi: encoder@58002000  {
 989                                 compatible = "ti,omap4-rfbi";
 990                                 reg = <0x58002000 0x1000>;
 991                                 status = "disabled";
 992                                 ti,hwmods = "dss_rfbi";
 993                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
 994                                 clock-names = "fck", "ick";
 995                         };
 996
 997                         venc: encoder@58003000 {
 998                                 compatible = "ti,omap4-venc";
 999                                 reg = <0x58003000 0x1000>;
1000                                 status = "disabled";
1001                                 ti,hwmods = "dss_venc";
1002                                 clocks = <&dss_tv_clk>;
1003                                 clock-names = "fck";
1004                         };
1005
1006                         dsi1: encoder@58004000 {
1007                                 compatible = "ti,omap4-dsi";
1008                                 reg = <0x58004000 0x200>,
1009                                       <0x58004200 0x40>,
1010                                       <0x58004300 0x20>;
1011                                 reg-names = "proto", "phy", "pll";
1012                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
1013                                 status = "disabled";
1014                                 ti,hwmods = "dss_dsi1";
1015                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1016                                 clock-names = "fck", "sys_clk";
1017                         };
1018
1019                         dsi2: encoder@58005000 {
1020                                 compatible = "ti,omap4-dsi";
1021                                 reg = <0x58005000 0x200>,
1022                                       <0x58005200 0x40>,
1023                                       <0x58005300 0x20>;
1024                                 reg-names = "proto", "phy", "pll";
1025                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1026                                 status = "disabled";
1027                                 ti,hwmods = "dss_dsi2";
1028                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1029                                 clock-names = "fck", "sys_clk";
1030                         };
1031
1032                         hdmi: encoder@58006000 {
1033                                 compatible = "ti,omap4-hdmi";
1034                                 reg = <0x58006000 0x200>,
1035                                       <0x58006200 0x100>,
1036                                       <0x58006300 0x100>,
1037                                       <0x58006400 0x1000>;
1038                                 reg-names = "wp", "pll", "phy", "core";
1039                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1040                                 status = "disabled";
1041                                 ti,hwmods = "dss_hdmi";
1042                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1043                                 clock-names = "fck", "sys_clk";
1044                                 dmas = <&sdma 76>;
1045                                 dma-names = "audio_tx";
1046                         };
1047                 };
1048         };
1049 };
1050
1051 /include/ "omap44xx-clocks.dtsi"