2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
16 compatible = "ti,omap3430", "ti,omap3";
17 interrupt-parent = <&intc>;
39 compatible = "arm,cortex-a8";
46 clock-latency = <300000>; /* From omap-cpufreq driver */
51 compatible = "arm,cortex-a8-pmu";
52 reg = <0x54000000 0x800000>;
54 ti,hwmods = "debugss";
58 * The soc node represents the soc top level view. It is used for IPs
59 * that are not memory mapped in the MPU view or for the MPU itself.
62 compatible = "ti,omap-infra";
64 compatible = "ti,omap3-mpu";
69 compatible = "ti,iva2.2";
73 compatible = "ti,omap3-c64";
79 * XXX: Use a flat representation of the OMAP3 interconnect.
80 * The real OMAP interconnect network is quite complex.
81 * Since it will not bring real advantage to represent that in DT for
82 * the moment, just use a fake OCP bus entry to represent the whole bus
86 compatible = "ti,omap3-l3-smx", "simple-bus";
87 reg = <0x68000000 0x10000>;
92 ti,hwmods = "l3_main";
94 l4_core: l4@48000000 {
95 compatible = "ti,omap3-l4-core", "simple-bus";
98 ranges = <0 0x48000000 0x1000000>;
101 compatible = "ti,omap3-scm", "simple-bus";
102 reg = <0x2000 0x2000>;
103 #address-cells = <1>;
105 ranges = <0 0x2000 0x2000>;
107 omap3_pmx_core: pinmux@30 {
108 compatible = "ti,omap3-padconf",
111 #address-cells = <1>;
113 #pinctrl-cells = <1>;
114 #interrupt-cells = <1>;
115 interrupt-controller;
116 pinctrl-single,register-width = <16>;
117 pinctrl-single,function-mask = <0xff1f>;
120 scm_conf: scm_conf@270 {
121 compatible = "syscon", "simple-bus";
123 #address-cells = <1>;
125 ranges = <0 0x270 0x330>;
127 pbias_regulator: pbias_regulator@2b0 {
128 compatible = "ti,pbias-omap3", "ti,pbias-omap";
130 syscon = <&scm_conf>;
131 pbias_mmc_reg: pbias_mmc_omap2430 {
132 regulator-name = "pbias_mmc_omap2430";
133 regulator-min-microvolt = <1800000>;
134 regulator-max-microvolt = <3000000>;
139 #address-cells = <1>;
144 scm_clockdomains: clockdomains {
147 omap3_pmx_wkup: pinmux@a00 {
148 compatible = "ti,omap3-padconf",
151 #address-cells = <1>;
153 #pinctrl-cells = <1>;
154 #interrupt-cells = <1>;
155 interrupt-controller;
156 pinctrl-single,register-width = <16>;
157 pinctrl-single,function-mask = <0xff1f>;
163 compatible = "ti,omap3-aes";
165 reg = <0x480c5000 0x50>;
167 dmas = <&sdma 65 &sdma 66>;
168 dma-names = "tx", "rx";
172 compatible = "ti,omap3-prm";
173 reg = <0x48306000 0x4000>;
177 #address-cells = <1>;
181 prm_clockdomains: clockdomains {
186 compatible = "ti,omap3-cm";
187 reg = <0x48004000 0x4000>;
190 #address-cells = <1>;
194 cm_clockdomains: clockdomains {
198 counter32k: counter@48320000 {
199 compatible = "ti,omap-counter32k";
200 reg = <0x48320000 0x20>;
201 ti,hwmods = "counter_32k";
204 intc: interrupt-controller@48200000 {
205 compatible = "ti,omap3-intc";
206 interrupt-controller;
207 #interrupt-cells = <1>;
208 reg = <0x48200000 0x1000>;
211 sdma: dma-controller@48056000 {
212 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
213 reg = <0x48056000 0x1000>;
224 gpio1: gpio@48310000 {
225 compatible = "ti,omap3-gpio";
226 reg = <0x48310000 0x200>;
232 interrupt-controller;
233 #interrupt-cells = <2>;
236 gpio2: gpio@49050000 {
237 compatible = "ti,omap3-gpio";
238 reg = <0x49050000 0x200>;
243 interrupt-controller;
244 #interrupt-cells = <2>;
247 gpio3: gpio@49052000 {
248 compatible = "ti,omap3-gpio";
249 reg = <0x49052000 0x200>;
254 interrupt-controller;
255 #interrupt-cells = <2>;
258 gpio4: gpio@49054000 {
259 compatible = "ti,omap3-gpio";
260 reg = <0x49054000 0x200>;
265 interrupt-controller;
266 #interrupt-cells = <2>;
269 gpio5: gpio@49056000 {
270 compatible = "ti,omap3-gpio";
271 reg = <0x49056000 0x200>;
276 interrupt-controller;
277 #interrupt-cells = <2>;
280 gpio6: gpio@49058000 {
281 compatible = "ti,omap3-gpio";
282 reg = <0x49058000 0x200>;
287 interrupt-controller;
288 #interrupt-cells = <2>;
291 uart1: serial@4806a000 {
292 compatible = "ti,omap3-uart";
293 reg = <0x4806a000 0x2000>;
294 interrupts-extended = <&intc 72>;
295 dmas = <&sdma 49 &sdma 50>;
296 dma-names = "tx", "rx";
298 clock-frequency = <48000000>;
301 uart2: serial@4806c000 {
302 compatible = "ti,omap3-uart";
303 reg = <0x4806c000 0x400>;
304 interrupts-extended = <&intc 73>;
305 dmas = <&sdma 51 &sdma 52>;
306 dma-names = "tx", "rx";
308 clock-frequency = <48000000>;
311 uart3: serial@49020000 {
312 compatible = "ti,omap3-uart";
313 reg = <0x49020000 0x400>;
314 interrupts-extended = <&intc 74>;
315 dmas = <&sdma 53 &sdma 54>;
316 dma-names = "tx", "rx";
318 clock-frequency = <48000000>;
322 compatible = "ti,omap3-i2c";
323 reg = <0x48070000 0x80>;
325 dmas = <&sdma 27 &sdma 28>;
326 dma-names = "tx", "rx";
327 #address-cells = <1>;
333 compatible = "ti,omap3-i2c";
334 reg = <0x48072000 0x80>;
336 dmas = <&sdma 29 &sdma 30>;
337 dma-names = "tx", "rx";
338 #address-cells = <1>;
344 compatible = "ti,omap3-i2c";
345 reg = <0x48060000 0x80>;
347 dmas = <&sdma 25 &sdma 26>;
348 dma-names = "tx", "rx";
349 #address-cells = <1>;
354 mailbox: mailbox@48094000 {
355 compatible = "ti,omap3-mailbox";
356 ti,hwmods = "mailbox";
357 reg = <0x48094000 0x200>;
360 ti,mbox-num-users = <2>;
361 ti,mbox-num-fifos = <2>;
363 ti,mbox-tx = <0 0 0>;
364 ti,mbox-rx = <1 0 0>;
368 mcspi1: spi@48098000 {
369 compatible = "ti,omap2-mcspi";
370 reg = <0x48098000 0x100>;
372 #address-cells = <1>;
374 ti,hwmods = "mcspi1";
384 dma-names = "tx0", "rx0", "tx1", "rx1",
385 "tx2", "rx2", "tx3", "rx3";
388 mcspi2: spi@4809a000 {
389 compatible = "ti,omap2-mcspi";
390 reg = <0x4809a000 0x100>;
392 #address-cells = <1>;
394 ti,hwmods = "mcspi2";
400 dma-names = "tx0", "rx0", "tx1", "rx1";
403 mcspi3: spi@480b8000 {
404 compatible = "ti,omap2-mcspi";
405 reg = <0x480b8000 0x100>;
407 #address-cells = <1>;
409 ti,hwmods = "mcspi3";
415 dma-names = "tx0", "rx0", "tx1", "rx1";
418 mcspi4: spi@480ba000 {
419 compatible = "ti,omap2-mcspi";
420 reg = <0x480ba000 0x100>;
422 #address-cells = <1>;
424 ti,hwmods = "mcspi4";
426 dmas = <&sdma 70>, <&sdma 71>;
427 dma-names = "tx0", "rx0";
430 hdqw1w: 1w@480b2000 {
431 compatible = "ti,omap3-1w";
432 reg = <0x480b2000 0x1000>;
438 compatible = "ti,omap3-hsmmc";
439 reg = <0x4809c000 0x200>;
443 dmas = <&sdma 61>, <&sdma 62>;
444 dma-names = "tx", "rx";
445 pbias-supply = <&pbias_mmc_reg>;
449 compatible = "ti,omap3-hsmmc";
450 reg = <0x480b4000 0x200>;
453 dmas = <&sdma 47>, <&sdma 48>;
454 dma-names = "tx", "rx";
458 compatible = "ti,omap3-hsmmc";
459 reg = <0x480ad000 0x200>;
462 dmas = <&sdma 77>, <&sdma 78>;
463 dma-names = "tx", "rx";
466 mmu_isp: mmu@480bd400 {
468 compatible = "ti,omap2-iommu";
469 reg = <0x480bd400 0x80>;
471 ti,hwmods = "mmu_isp";
472 ti,#tlb-entries = <8>;
475 mmu_iva: mmu@5d000000 {
477 compatible = "ti,omap2-iommu";
478 reg = <0x5d000000 0x80>;
480 ti,hwmods = "mmu_iva";
485 compatible = "ti,omap3-wdt";
486 reg = <0x48314000 0x80>;
487 ti,hwmods = "wd_timer2";
490 mcbsp1: mcbsp@48074000 {
491 compatible = "ti,omap3-mcbsp";
492 reg = <0x48074000 0xff>;
494 interrupts = <16>, /* OCP compliant interrupt */
495 <59>, /* TX interrupt */
496 <60>; /* RX interrupt */
497 interrupt-names = "common", "tx", "rx";
498 ti,buffer-size = <128>;
499 ti,hwmods = "mcbsp1";
502 dma-names = "tx", "rx";
503 clocks = <&mcbsp1_fck>;
508 mcbsp2: mcbsp@49022000 {
509 compatible = "ti,omap3-mcbsp";
510 reg = <0x49022000 0xff>,
512 reg-names = "mpu", "sidetone";
513 interrupts = <17>, /* OCP compliant interrupt */
514 <62>, /* TX interrupt */
515 <63>, /* RX interrupt */
517 interrupt-names = "common", "tx", "rx", "sidetone";
518 ti,buffer-size = <1280>;
519 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
522 dma-names = "tx", "rx";
523 clocks = <&mcbsp2_fck>, <&mcbsp2_ick>;
524 clock-names = "fck", "ick";
528 mcbsp3: mcbsp@49024000 {
529 compatible = "ti,omap3-mcbsp";
530 reg = <0x49024000 0xff>,
532 reg-names = "mpu", "sidetone";
533 interrupts = <22>, /* OCP compliant interrupt */
534 <89>, /* TX interrupt */
535 <90>, /* RX interrupt */
537 interrupt-names = "common", "tx", "rx", "sidetone";
538 ti,buffer-size = <128>;
539 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
542 dma-names = "tx", "rx";
543 clocks = <&mcbsp3_fck>, <&mcbsp3_ick>;
544 clock-names = "fck", "ick";
548 mcbsp4: mcbsp@49026000 {
549 compatible = "ti,omap3-mcbsp";
550 reg = <0x49026000 0xff>;
552 interrupts = <23>, /* OCP compliant interrupt */
553 <54>, /* TX interrupt */
554 <55>; /* RX interrupt */
555 interrupt-names = "common", "tx", "rx";
556 ti,buffer-size = <128>;
557 ti,hwmods = "mcbsp4";
560 dma-names = "tx", "rx";
561 clocks = <&mcbsp4_fck>;
563 #sound-dai-cells = <0>;
567 mcbsp5: mcbsp@48096000 {
568 compatible = "ti,omap3-mcbsp";
569 reg = <0x48096000 0xff>;
571 interrupts = <27>, /* OCP compliant interrupt */
572 <81>, /* TX interrupt */
573 <82>; /* RX interrupt */
574 interrupt-names = "common", "tx", "rx";
575 ti,buffer-size = <128>;
576 ti,hwmods = "mcbsp5";
579 dma-names = "tx", "rx";
580 clocks = <&mcbsp5_fck>;
585 sham: sham@480c3000 {
586 compatible = "ti,omap3-sham";
588 reg = <0x480c3000 0x64>;
594 timer1: timer@48318000 {
595 compatible = "ti,omap3430-timer";
596 reg = <0x48318000 0x400>;
598 ti,hwmods = "timer1";
602 timer2: timer@49032000 {
603 compatible = "ti,omap3430-timer";
604 reg = <0x49032000 0x400>;
606 ti,hwmods = "timer2";
609 timer3: timer@49034000 {
610 compatible = "ti,omap3430-timer";
611 reg = <0x49034000 0x400>;
613 ti,hwmods = "timer3";
616 timer4: timer@49036000 {
617 compatible = "ti,omap3430-timer";
618 reg = <0x49036000 0x400>;
620 ti,hwmods = "timer4";
623 timer5: timer@49038000 {
624 compatible = "ti,omap3430-timer";
625 reg = <0x49038000 0x400>;
627 ti,hwmods = "timer5";
631 timer6: timer@4903a000 {
632 compatible = "ti,omap3430-timer";
633 reg = <0x4903a000 0x400>;
635 ti,hwmods = "timer6";
639 timer7: timer@4903c000 {
640 compatible = "ti,omap3430-timer";
641 reg = <0x4903c000 0x400>;
643 ti,hwmods = "timer7";
647 timer8: timer@4903e000 {
648 compatible = "ti,omap3430-timer";
649 reg = <0x4903e000 0x400>;
651 ti,hwmods = "timer8";
656 timer9: timer@49040000 {
657 compatible = "ti,omap3430-timer";
658 reg = <0x49040000 0x400>;
660 ti,hwmods = "timer9";
664 timer10: timer@48086000 {
665 compatible = "ti,omap3430-timer";
666 reg = <0x48086000 0x400>;
668 ti,hwmods = "timer10";
672 timer11: timer@48088000 {
673 compatible = "ti,omap3430-timer";
674 reg = <0x48088000 0x400>;
676 ti,hwmods = "timer11";
680 timer12: timer@48304000 {
681 compatible = "ti,omap3430-timer";
682 reg = <0x48304000 0x400>;
684 ti,hwmods = "timer12";
689 usbhstll: usbhstll@48062000 {
690 compatible = "ti,usbhs-tll";
691 reg = <0x48062000 0x1000>;
693 ti,hwmods = "usb_tll_hs";
696 usbhshost: usbhshost@48064000 {
697 compatible = "ti,usbhs-host";
698 reg = <0x48064000 0x400>;
699 ti,hwmods = "usb_host_hs";
700 #address-cells = <1>;
704 usbhsohci: ohci@48064400 {
705 compatible = "ti,ohci-omap3";
706 reg = <0x48064400 0x400>;
708 remote-wakeup-connected;
711 usbhsehci: ehci@48064800 {
712 compatible = "ti,ehci-omap";
713 reg = <0x48064800 0x400>;
718 gpmc: gpmc@6e000000 {
719 compatible = "ti,omap3430-gpmc";
721 reg = <0x6e000000 0x02d0>;
726 gpmc,num-waitpins = <4>;
727 #address-cells = <2>;
729 interrupt-controller;
730 #interrupt-cells = <2>;
735 usb_otg_hs: usb_otg_hs@480ab000 {
736 compatible = "ti,omap3-musb";
737 reg = <0x480ab000 0x1000>;
738 interrupts = <92>, <93>;
739 interrupt-names = "mc", "dma";
740 ti,hwmods = "usb_otg_hs";
747 compatible = "ti,omap3-dss";
748 reg = <0x48050000 0x200>;
750 ti,hwmods = "dss_core";
751 clocks = <&dss1_alwon_fck>;
753 #address-cells = <1>;
758 compatible = "ti,omap3-dispc";
759 reg = <0x48050400 0x400>;
761 ti,hwmods = "dss_dispc";
762 clocks = <&dss1_alwon_fck>;
766 dsi: encoder@4804fc00 {
767 compatible = "ti,omap3-dsi";
768 reg = <0x4804fc00 0x200>,
771 reg-names = "proto", "phy", "pll";
774 ti,hwmods = "dss_dsi1";
775 clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
776 clock-names = "fck", "sys_clk";
779 rfbi: encoder@48050800 {
780 compatible = "ti,omap3-rfbi";
781 reg = <0x48050800 0x100>;
783 ti,hwmods = "dss_rfbi";
784 clocks = <&dss1_alwon_fck>, <&dss_ick>;
785 clock-names = "fck", "ick";
788 venc: encoder@48050c00 {
789 compatible = "ti,omap3-venc";
790 reg = <0x48050c00 0x100>;
792 ti,hwmods = "dss_venc";
793 clocks = <&dss_tv_fck>;
798 ssi: ssi-controller@48058000 {
799 compatible = "ti,omap3-ssi";
804 reg = <0x48058000 0x1000>,
810 interrupt-names = "gdd_mpu";
812 #address-cells = <1>;
816 ssi_port1: ssi-port@4805a000 {
817 compatible = "ti,omap3-ssi-port";
819 reg = <0x4805a000 0x800>,
828 ssi_port2: ssi-port@4805b000 {
829 compatible = "ti,omap3-ssi-port";
831 reg = <0x4805b000 0x800>,
843 /include/ "omap3xxx-clocks.dtsi"