GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / omap3-sniper.dts
1 /*
2  * Copyright (C) 2015-2016 Paul Kocialkowski <contact@paulk.fr>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 /dts-v1/;
9
10 #include "omap36xx.dtsi"
11 #include <dt-bindings/input/input.h>
12
13 / {
14         model = "LG Optimus Black";
15         compatible = "lg,omap3-sniper", "ti,omap36xx", "ti,omap3";
16
17         cpus {
18                 cpu@0 {
19                         cpu0-supply = <&vcc>;
20                 };
21         };
22
23         memory@80000000 {
24                 device_type = "memory";
25                 reg = <0x80000000 0x20000000>; /* 512 MB */
26         };
27 };
28
29 &omap3_pmx_core {
30         pinctrl-names = "default";
31
32         uart3_pins: pinmux_uart3_pins {
33                 pinctrl-single,pins = <
34                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)        /* uart3_rx_irrx */
35                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx */
36                 >;
37         };
38
39         dp3t_sel_pins: pinmux_dp3t_sel_pins {
40                 pinctrl-single,pins = <
41                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4)       /* gpio_161 */
42                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* gpio_162 */
43                 >;
44         };
45
46         i2c1_pins: pinmux_i2c1_pins {
47                 pinctrl-single,pins = <
48                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl */
49                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda */
50                 >;
51         };
52
53         i2c2_pins: pinmux_i2c2_pins {
54                 pinctrl-single,pins = <
55                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)        /* i2c2_scl */
56                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)        /* i2c2_sda */
57                 >;
58         };
59
60         i2c3_pins: pinmux_i2c3_pins {
61                 pinctrl-single,pins = <
62                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl */
63                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda */
64                 >;
65         };
66
67         lp8720_en_pin: pinmux_lp8720_en_pin {
68                 pinctrl-single,pins = <
69                         OMAP3_CORE1_IOPAD(0x2080, PIN_OUTPUT | MUX_MODE4)       /* gpio_37 */
70                 >;
71         };
72
73         mmc1_pins: pinmux_mmc1_pins {
74                 pinctrl-single,pins = <
75                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT | MUX_MODE0)        /* sdmmc1_clk */
76                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)        /* sdmmc1_cmd */
77                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat0 */
78                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat1 */
79                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat2 */
80                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)        /* sdmmc1_dat3 */
81                 >;
82         };
83
84         mmc2_pins: pinmux_mmc2_pins {
85                 pinctrl-single,pins = <
86                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT | MUX_MODE0)        /* sdmmc2_clk */
87                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT | MUX_MODE0)        /* sdmmc2_cmd */
88                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat0 */
89                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat1 */
90                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat2 */
91                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat3 */
92                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat4 */
93                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat5 */
94                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat6 */
95                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0)        /* sdmmc2_dat7 */
96                 >;
97         };
98
99         usb_otg_hs_pins: pinmux_usb_otg_hs_pins {
100                 pinctrl-single,pins = <
101                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk */
102                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp */
103                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir */
104                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt */
105                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0 */
106                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1 */
107                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2 */
108                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3 */
109                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4 */
110                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5 */
111                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6 */
112                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7 */
113                 >;
114         };
115 };
116
117 &omap3_pmx_wkup {
118         pinctrl-names = "default";
119
120         mmc1_cd_pin: pinmux_mmc1_cd_pin {
121                 pinctrl-single,pins = <
122                         OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | MUX_MODE4)         /* gpio_10 */
123                 >;
124         };
125 };
126
127 &gpio2 {
128         ti,no-reset-on-init;
129 };
130
131 &gpio5 {
132         ti,no-reset-on-init;
133 };
134
135 &gpio6 {
136         ti,no-reset-on-init;
137 };
138
139 &uart3 {
140         pinctrl-names = "default";
141         pinctrl-0 = <&uart3_pins &dp3t_sel_pins>;
142
143         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
144 };
145
146 &i2c1 {
147         pinctrl-names = "default";
148         pinctrl-0 = <&i2c1_pins>;
149
150         clock-frequency = <2600000>;
151
152         twl: twl@48 {
153                 reg = <0x48>;
154                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
155                 interrupt-parent = <&intc>;
156
157                 power {
158                         compatible = "ti,twl4030-power";
159                         ti,use_poweroff;
160                 };
161         };
162 };
163
164 &i2c2 {
165         pinctrl-names = "default";
166         pinctrl-0 = <&i2c2_pins>;
167
168         clock-frequency = <400000>;
169 };
170
171 &i2c3 {
172         pinctrl-names = "default";
173         pinctrl-0 = <&i2c3_pins>;
174
175         clock-frequency = <400000>;
176
177         lp8720@7d {
178                 pinctrl-names = "default";
179                 pinctrl-0 = <&lp8720_en_pin>;
180
181                 compatible = "ti,lp8720";
182                 reg = <0x7d>;
183
184                 enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* gpio_37 */
185
186                 lp8720_ldo1: ldo1 {
187                         regulator-min-microvolt = <3000000>;
188                         regulator-max-microvolt = <3000000>;
189                 };
190         };
191 };
192
193 &mmc1 {
194         pinctrl-names = "default";
195         pinctrl-0 = <&mmc1_pins &mmc1_cd_pin>;
196
197         vmmc-supply = <&lp8720_ldo1>;
198         cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio 10 */
199         bus-width = <4>;
200 };
201
202 &mmc2 {
203         pinctrl-names = "default";
204         pinctrl-0 = <&mmc2_pins>;
205
206         vmmc-supply = <&vmmc2>;
207         ti,non-removable;
208         bus-width = <8>;
209 };
210
211 &mmc3 {
212         status = "disabled";
213 };
214
215 &usb_otg_hs {
216         pinctrl-names = "default";
217         pinctrl-0 = <&usb_otg_hs_pins>;
218
219         interface-type = <0>;
220         usb-phy = <&usb2_phy>;
221         phys = <&usb2_phy>;
222         phy-names = "usb2-phy";
223         mode = <3>;
224         power = <50>;
225 };
226
227 #include "twl4030.dtsi"
228 #include "twl4030_omap3.dtsi"
229
230 &twl_keypad {
231         linux,keymap = <
232                 MATRIX_KEY(0x00, 0x00, KEY_VOLUMEUP)
233                 MATRIX_KEY(0x01, 0x00, KEY_VOLUMEDOWN)
234                 MATRIX_KEY(0x02, 0x00, KEY_SELECT)
235         >;
236 };
237
238 /*
239  * The TWL4030 VAUX2 and VDAC regulators power sensors that are slaves on I2C3.
240  * When not powered, these sensors cause the I2C3 clock to stay low at all times,
241  * making it impossible to reach other devices on I2C3.
242  */
243
244 &vaux2 {
245         regulator-min-microvolt = <2800000>;
246         regulator-max-microvolt = <2800000>;
247         regulator-always-on;
248 };
249
250 &vdac {
251         regulator-min-microvolt = <1800000>;
252         regulator-max-microvolt = <1800000>;
253         regulator-always-on;
254 };