arch/arm/boot/dts/omap3-n900.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   4  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   5  */
   6
   7 /dts-v1/;
   8
   9 #include "omap34xx.dtsi"
  10 #include <dt-bindings/input/input.h>
  11 #include <dt-bindings/leds/common.h>
  12
  13 /*
  14  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  15  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  16  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  17  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  18  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  19  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  20  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  21  * There is also no runtime detection code if AES is disabled in L3 firewall...
  22  */
  23 &aes1_target {
  24         status = "disabled";
  25 };
  26
  27 &aes2_target {
  28         status = "disabled";
  29 };
  30
  31 / {
  32         model = "Nokia N900";
  33         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  34
  35         aliases {
  36                 i2c0;
  37                 i2c1 = &i2c1;
  38                 i2c2 = &i2c2;
  39                 i2c3 = &i2c3;
  40                 display0 = &lcd;
  41                 display1 = &tv;
  42         };
  43
  44         cpus {
  45                 cpu@0 {
  46                         cpu0-supply = <&vcc>;
  47                 };
  48         };
  49
  50         leds {
  51                 compatible = "gpio-leds";
  52                 heartbeat {
  53                         label = "debug::sleep";
  54                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
  55                         linux,default-trigger = "default-on";
  56                         pinctrl-names = "default";
  57                         pinctrl-0 = <&debug_leds>;
  58                 };
  59         };
  60
  61         memory@80000000 {
  62                 device_type = "memory";
  63                 reg = <0x80000000 0x10000000>; /* 256 MB */
  64         };
  65
  66         gpio_keys {
  67                 compatible = "gpio-keys";
  68
  69                 camera_lens_cover {
  70                         label = "Camera Lens Cover";
  71                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  72                         linux,input-type = <EV_SW>;
  73                         linux,code = <SW_CAMERA_LENS_COVER>;
  74                         linux,can-disable;
  75                 };
  76
  77                 camera_focus {
  78                         label = "Camera Focus";
  79                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  80                         linux,code = <KEY_CAMERA_FOCUS>;
  81                         linux,can-disable;
  82                 };
  83
  84                 camera_capture {
  85                         label = "Camera Capture";
  86                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  87                         linux,code = <KEY_CAMERA>;
  88                         linux,can-disable;
  89                 };
  90
  91                 lock_button {
  92                         label = "Lock Button";
  93                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  94                         linux,code = <KEY_SCREENLOCK>;
  95                         linux,can-disable;
  96                 };
  97
  98                 keypad_slide {
  99                         label = "Keypad Slide";
 100                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
 101                         linux,input-type = <EV_SW>;
 102                         linux,code = <SW_KEYPAD_SLIDE>;
 103                         linux,can-disable;
 104                 };
 105
 106                 proximity_sensor {
 107                         label = "Proximity Sensor";
 108                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 109                         linux,input-type = <EV_SW>;
 110                         linux,code = <SW_FRONT_PROXIMITY>;
 111                         linux,can-disable;
 112                 };
 113
 114                 machine_cover {
 115                         label = "Machine Cover";
 116                         gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
 117                         linux,input-type = <EV_SW>;
 118                         linux,code = <SW_MACHINE_COVER>;
 119                         linux,can-disable;
 120                 };
 121         };
 122
 123         isp1707: isp1707 {
 124                 compatible = "nxp,isp1707";
 125                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 126                 usb-phy = <&usb2_phy>;
 127         };
 128
 129         tv: connector {
 130                 compatible = "composite-video-connector";
 131                 label = "tv";
 132
 133                 port {
 134                         tv_connector_in: endpoint {
 135                                 remote-endpoint = <&venc_out>;
 136                         };
 137                 };
 138         };
 139
 140         sound: n900-audio {
 141                 compatible = "nokia,n900-audio";
 142
 143                 nokia,cpu-dai = <&mcbsp2>;
 144                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 145                 nokia,headphone-amplifier = <&tpa6130a2>;
 146
 147                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 148                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 149                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 150                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 151         };
 152
 153         battery: n900-battery {
 154                 compatible = "nokia,n900-battery";
 155                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 156                 io-channel-names = "temp", "bsi", "vbat";
 157         };
 158
 159         pwm9: pwm-9 {
 160                 compatible = "ti,omap-dmtimer-pwm";
 161                 #pwm-cells = <3>;
 162                 ti,timers = <&timer9>;
 163                 ti,clock-source = <0x00>; /* timer_sys_ck */
 164         };
 165
 166         ir: n900-ir {
 167                 compatible = "nokia,n900-ir";
 168                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
 169         };
 170
 171         rom_rng: rng {
 172                 compatible = "nokia,n900-rom-rng";
 173                 clocks = <&rng_ick>;
 174                 clock-names = "ick";
 175         };
 176
 177         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
 178         vctcxo: vctcxo {
 179                 compatible = "fixed-clock";
 180                 #clock-cells = <0>;
 181                 clock-frequency = <38400000>;
 182         };
 183 };
 184
 185 &isp {
 186         vdds_csib-supply = <&vaux2>;
 187
 188         pinctrl-names = "default";
 189         pinctrl-0 = <&camera_pins>;
 190
 191         ports {
 192                 port@1 {
 193                         reg = <1>;
 194
 195                         csi_isp: endpoint {
 196                                 remote-endpoint = <&csi_cam1>;
 197                                 bus-type = <3>; /* CCP2 */
 198                                 clock-lanes = <1>;
 199                                 data-lanes = <0>;
 200                                 lane-polarity = <0 0>;
 201                                 /* Select strobe = <1> for back camera, <0> for front camera */
 202                                 strobe = <1>;
 203                         };
 204                 };
 205         };
 206 };
 207
 208 &omap3_pmx_core {
 209         pinctrl-names = "default";
 210
 211         uart2_pins: pinmux_uart2_pins {
 212                 pinctrl-single,pins = <
 213                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 214                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
 215                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 216                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 217                 >;
 218         };
 219
 220         uart3_pins: pinmux_uart3_pins {
 221                 pinctrl-single,pins = <
 222                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 223                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 224                 >;
 225         };
 226
 227         ethernet_pins: pinmux_ethernet_pins {
 228                 pinctrl-single,pins = <
 229                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 230                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 231                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 232                 >;
 233         };
 234
 235         gpmc_pins: pinmux_gpmc_pins {
 236                 pinctrl-single,pins = <
 237
 238                         /* address lines */
 239                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 240                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 241                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 242
 243                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 244                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 245                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 246                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 247                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 248                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 249                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 250                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 251                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 252
 253                         /*
 254                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 255                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 256                          */
 257                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 258                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 259                         >;
 260         };
 261
 262         i2c1_pins: pinmux_i2c1_pins {
 263                 pinctrl-single,pins = <
 264                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 265                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 266                 >;
 267         };
 268
 269         i2c2_pins: pinmux_i2c2_pins {
 270                 pinctrl-single,pins = <
 271                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 272                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 273                 >;
 274         };
 275
 276         i2c3_pins: pinmux_i2c3_pins {
 277                 pinctrl-single,pins = <
 278                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 279                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 280                 >;
 281         };
 282
 283         debug_leds: pinmux_debug_led_pins {
 284                 pinctrl-single,pins = <
 285                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 286                 >;
 287         };
 288
 289         mcspi4_pins: pinmux_mcspi4_pins {
 290                 pinctrl-single,pins = <
 291                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 292                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 293                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 294                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 295                 >;
 296         };
 297
 298         mmc1_pins: pinmux_mmc1_pins {
 299                 pinctrl-single,pins = <
 300                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 301                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 302                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 303                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 304                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 305                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 306                 >;
 307         };
 308
 309         mmc2_pins: pinmux_mmc2_pins {
 310                 pinctrl-single,pins = <
 311                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 312                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 313                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 314                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 315                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 316                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 317                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 318                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 319                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 320                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 321                 >;
 322         };
 323
 324         acx565akm_pins: pinmux_acx565akm_pins {
 325                 pinctrl-single,pins = <
 326                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 327                 >;
 328         };
 329
 330         dss_sdi_pins: pinmux_dss_sdi_pins {
 331                 pinctrl-single,pins = <
 332                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 333                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 334                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 335                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 336
 337                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 338                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 339                 >;
 340         };
 341
 342         wl1251_pins: pinmux_wl1251 {
 343                 pinctrl-single,pins = <
 344                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 345                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 346                 >;
 347         };
 348
 349         ssi_pins: pinmux_ssi {
 350                 pinctrl-single,pins = <
 351                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 352                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 353                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
 354                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 355                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 356                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 357                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 358                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 359                 >;
 360         };
 361
 362         modem_pins: pinmux_modem {
 363                 pinctrl-single,pins = <
 364                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 365                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
 366                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 367                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 368                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 369                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 370                 >;
 371         };
 372
 373         camera_pins: pinmux_camera {
 374                 pinctrl-single,pins = <
 375                         OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7)       /* cam_hs */
 376                         OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7)       /* cam_vs */
 377                         OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0)       /* cam_xclka */
 378                         OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7)       /* cam_d4 */
 379                         OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)        /* cam_d6 */
 380                         OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)        /* cam_d7 */
 381                         OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0)        /* cam_d8 */
 382                         OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0)        /* cam_d9 */
 383                         OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7)       /* cam_d10 */
 384                         OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7)       /* cam_xclkb */
 385                         OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0)       /* cam_strobe */
 386                 >;
 387         };
 388 };
 389
 390 &i2c1 {
 391         pinctrl-names = "default";
 392         pinctrl-0 = <&i2c1_pins>;
 393
 394         clock-frequency = <2200000>;
 395
 396         twl: twl@48 {
 397                 reg = <0x48>;
 398                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 399                 interrupt-parent = <&intc>;
 400         };
 401 };
 402
 403 #include "twl4030.dtsi"
 404 #include "twl4030_omap3.dtsi"
 405
 406 &vaux1 {
 407         regulator-name = "V28";
 408         regulator-min-microvolt = <2800000>;
 409         regulator-max-microvolt = <2800000>;
 410         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 411         regulator-always-on; /* due to battery cover sensor */
 412 };
 413
 414 &vaux2 {
 415         regulator-name = "VCSI";
 416         regulator-min-microvolt = <1800000>;
 417         regulator-max-microvolt = <1800000>;
 418         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 419 };
 420
 421 &vaux3 {
 422         regulator-name = "VMMC2_30";
 423         regulator-min-microvolt = <2800000>;
 424         regulator-max-microvolt = <3000000>;
 425         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 426 };
 427
 428 &vaux4 {
 429         regulator-name = "VCAM_ANA_28";
 430         regulator-min-microvolt = <2800000>;
 431         regulator-max-microvolt = <2800000>;
 432         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 433 };
 434
 435 &vmmc1 {
 436         regulator-name = "VMMC1";
 437         regulator-min-microvolt = <1850000>;
 438         regulator-max-microvolt = <3150000>;
 439         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 440 };
 441
 442 &vmmc2 {
 443         regulator-name = "V28_A";
 444         regulator-min-microvolt = <2800000>;
 445         regulator-max-microvolt = <3000000>;
 446         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 447         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 448 };
 449
 450 &vpll1 {
 451         regulator-name = "VPLL";
 452         regulator-min-microvolt = <1800000>;
 453         regulator-max-microvolt = <1800000>;
 454         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 455         regulator-always-on;
 456 };
 457
 458 &vpll2 {
 459         regulator-name = "VSDI_CSI";
 460         regulator-min-microvolt = <1800000>;
 461         regulator-max-microvolt = <1800000>;
 462         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 463         regulator-always-on;
 464 };
 465
 466 &vsim {
 467         regulator-name = "VMMC2_IO_18";
 468         regulator-min-microvolt = <1800000>;
 469         regulator-max-microvolt = <1800000>;
 470         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 471 };
 472
 473 &vio {
 474         regulator-name = "VIO";
 475         regulator-min-microvolt = <1800000>;
 476         regulator-max-microvolt = <1800000>;
 477 };
 478
 479 &vintana1 {
 480         regulator-name = "VINTANA1";
 481         /* fixed to 1500000 */
 482         regulator-always-on;
 483 };
 484
 485 &vintana2 {
 486         regulator-name = "VINTANA2";
 487         regulator-min-microvolt = <2750000>;
 488         regulator-max-microvolt = <2750000>;
 489         regulator-always-on;
 490 };
 491
 492 &vintdig {
 493         regulator-name = "VINTDIG";
 494         /* fixed to 1500000 */
 495         regulator-always-on;
 496 };
 497
 498 /* First two dma channels are reserved on secure omap3 */
 499 &sdma {
 500         dma-channel-mask = <0xfffffffc>;
 501 };
 502
 503 &twl {
 504         twl_audio: audio {
 505                 compatible = "ti,twl4030-audio";
 506                 ti,enable-vibra = <1>;
 507         };
 508
 509         twl_power: power {
 510                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 511                 ti,use_poweroff;
 512         };
 513 };
 514
 515 &twl_keypad {
 516         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 517                          MATRIX_KEY(0x00, 0x01, KEY_O)
 518                          MATRIX_KEY(0x00, 0x02, KEY_P)
 519                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 520                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 521                          MATRIX_KEY(0x00, 0x06, KEY_A)
 522                          MATRIX_KEY(0x00, 0x07, KEY_S)
 523
 524                          MATRIX_KEY(0x01, 0x00, KEY_W)
 525                          MATRIX_KEY(0x01, 0x01, KEY_D)
 526                          MATRIX_KEY(0x01, 0x02, KEY_F)
 527                          MATRIX_KEY(0x01, 0x03, KEY_G)
 528                          MATRIX_KEY(0x01, 0x04, KEY_H)
 529                          MATRIX_KEY(0x01, 0x05, KEY_J)
 530                          MATRIX_KEY(0x01, 0x06, KEY_K)
 531                          MATRIX_KEY(0x01, 0x07, KEY_L)
 532
 533                          MATRIX_KEY(0x02, 0x00, KEY_E)
 534                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 535                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 536                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 537                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 538                          MATRIX_KEY(0x02, 0x06, KEY_X)
 539                          MATRIX_KEY(0x02, 0x07, KEY_C)
 540                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 541
 542                          MATRIX_KEY(0x03, 0x00, KEY_R)
 543                          MATRIX_KEY(0x03, 0x01, KEY_V)
 544                          MATRIX_KEY(0x03, 0x02, KEY_B)
 545                          MATRIX_KEY(0x03, 0x03, KEY_N)
 546                          MATRIX_KEY(0x03, 0x04, KEY_M)
 547                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 548                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 549                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 550
 551                          MATRIX_KEY(0x04, 0x00, KEY_T)
 552                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 553                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 554                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 555                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 556                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 557                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 558
 559                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 560                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 561
 562                          MATRIX_KEY(0x06, 0x00, KEY_U)
 563
 564                          MATRIX_KEY(0x07, 0x00, KEY_I)
 565                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 566                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 567                          >;
 568 };
 569
 570 &twl_gpio {
 571         ti,pullups = <0x0>;
 572         ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 573 };
 574
 575 &i2c2 {
 576         pinctrl-names = "default";
 577         pinctrl-0 = <&i2c2_pins>;
 578
 579         clock-frequency = <100000>;
 580
 581         tlv320aic3x: tlv320aic3x@18 {
 582                 compatible = "ti,tlv320aic3x";
 583                 reg = <0x18>;
 584                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 585                 ai3x-gpio-func = <
 586                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 587                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 588                 >;
 589
 590                 AVDD-supply = <&vmmc2>;
 591                 DRVDD-supply = <&vmmc2>;
 592                 IOVDD-supply = <&vio>;
 593                 DVDD-supply = <&vio>;
 594
 595                 ai3x-micbias-vg = <1>;
 596         };
 597
 598         tlv320aic3x_aux: tlv320aic3x@19 {
 599                 compatible = "ti,tlv320aic3x";
 600                 reg = <0x19>;
 601                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 602
 603                 AVDD-supply = <&vmmc2>;
 604                 DRVDD-supply = <&vmmc2>;
 605                 IOVDD-supply = <&vio>;
 606                 DVDD-supply = <&vio>;
 607
 608                 ai3x-micbias-vg = <2>;
 609         };
 610
 611         tsl2563: tsl2563@29 {
 612                 compatible = "amstaos,tsl2563";
 613                 reg = <0x29>;
 614
 615                 amstaos,cover-comp-gain = <16>;
 616         };
 617
 618         adp1653: led-controller@30 {
 619                 compatible = "adi,adp1653";
 620                 reg = <0x30>;
 621                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
 622
 623                 flash {
 624                         flash-timeout-us = <500000>;
 625                         flash-max-microamp = <320000>;
 626                         led-max-microamp = <50000>;
 627                 };
 628                 indicator {
 629                         led-max-microamp = <17500>;
 630                 };
 631         };
 632
 633         lp5523: lp5523@32 {
 634                 #address-cells = <1>;
 635                 #size-cells = <0>;
 636                 compatible = "national,lp5523";
 637                 reg = <0x32>;
 638                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 639                 enable-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 640
 641                 led@0 {
 642                         reg = <0>;
 643                         chan-name = "lp5523:kb1";
 644                         led-cur = /bits/ 8 <50>;
 645                         max-cur = /bits/ 8 <100>;
 646                         color = <LED_COLOR_ID_WHITE>;
 647                         function = LED_FUNCTION_KBD_BACKLIGHT;
 648                 };
 649
 650                 led@1 {
 651                         reg = <1>;
 652                         chan-name = "lp5523:kb2";
 653                         led-cur = /bits/ 8 <50>;
 654                         max-cur = /bits/ 8 <100>;
 655                         color = <LED_COLOR_ID_WHITE>;
 656                         function = LED_FUNCTION_KBD_BACKLIGHT;
 657                 };
 658
 659                 led@2 {
 660                         reg = <2>;
 661                         chan-name = "lp5523:kb3";
 662                         led-cur = /bits/ 8 <50>;
 663                         max-cur = /bits/ 8 <100>;
 664                         color = <LED_COLOR_ID_WHITE>;
 665                         function = LED_FUNCTION_KBD_BACKLIGHT;
 666                 };
 667
 668                 led@3 {
 669                         reg = <3>;
 670                         chan-name = "lp5523:kb4";
 671                         led-cur = /bits/ 8 <50>;
 672                         max-cur = /bits/ 8 <100>;
 673                         color = <LED_COLOR_ID_WHITE>;
 674                         function = LED_FUNCTION_KBD_BACKLIGHT;
 675                 };
 676
 677                 led@4 {
 678                         reg = <4>;
 679                         chan-name = "lp5523:b";
 680                         led-cur = /bits/ 8 <50>;
 681                         max-cur = /bits/ 8 <100>;
 682                         color = <LED_COLOR_ID_BLUE>;
 683                         function = LED_FUNCTION_STATUS;
 684                 };
 685
 686                 led@5 {
 687                         reg = <5>;
 688                         chan-name = "lp5523:g";
 689                         led-cur = /bits/ 8 <50>;
 690                         max-cur = /bits/ 8 <100>;
 691                         color = <LED_COLOR_ID_GREEN>;
 692                         function = LED_FUNCTION_STATUS;
 693                 };
 694
 695                 led@6 {
 696                         reg = <6>;
 697                         chan-name = "lp5523:r";
 698                         led-cur = /bits/ 8 <50>;
 699                         max-cur = /bits/ 8 <100>;
 700                         color = <LED_COLOR_ID_RED>;
 701                         function = LED_FUNCTION_STATUS;
 702                 };
 703
 704                 led@7 {
 705                         reg = <7>;
 706                         chan-name = "lp5523:kb5";
 707                         led-cur = /bits/ 8 <50>;
 708                         max-cur = /bits/ 8 <100>;
 709                         color = <LED_COLOR_ID_WHITE>;
 710                         function = LED_FUNCTION_KBD_BACKLIGHT;
 711                 };
 712
 713                 led@8 {
 714                         reg = <8>;
 715                         chan-name = "lp5523:kb6";
 716                         led-cur = /bits/ 8 <50>;
 717                         max-cur = /bits/ 8 <100>;
 718                         color = <LED_COLOR_ID_WHITE>;
 719                         function = LED_FUNCTION_KBD_BACKLIGHT;
 720                 };
 721         };
 722
 723         bq27200: bq27200@55 {
 724                 compatible = "ti,bq27200";
 725                 reg = <0x55>;
 726                 power-supplies = <&bq24150a>;
 727         };
 728
 729         /* Stereo headphone amplifier */
 730         tpa6130a2: tpa6130a2@60 {
 731                 compatible = "ti,tpa6130a2";
 732                 reg = <0x60>;
 733
 734                 Vdd-supply = <&vmmc2>;
 735
 736                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 737         };
 738
 739         si4713: si4713@63 {
 740                 compatible = "silabs,si4713";
 741                 reg = <0x63>;
 742
 743                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 744                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 745                 vio-supply = <&vio>;
 746                 vdd-supply = <&vaux1>;
 747         };
 748
 749         bq24150a: bq24150a@6b {
 750                 compatible = "ti,bq24150a";
 751                 reg = <0x6b>;
 752
 753                 ti,current-limit = <100>;
 754                 ti,weak-battery-voltage = <3400>;
 755                 ti,battery-regulation-voltage = <4200>;
 756                 ti,charge-current = <650>;
 757                 ti,termination-current = <100>;
 758                 ti,resistor-sense = <68>;
 759
 760                 ti,usb-charger-detection = <&isp1707>;
 761         };
 762 };
 763
 764 &i2c3 {
 765         pinctrl-names = "default";
 766         pinctrl-0 = <&i2c3_pins>;
 767
 768         clock-frequency = <400000>;
 769
 770         lis302dl: lis3lv02d@1d {
 771                 compatible = "st,lis3lv02d";
 772                 reg = <0x1d>;
 773
 774                 Vdd-supply = <&vaux1>;
 775                 Vdd_IO-supply = <&vio>;
 776
 777                 interrupt-parent = <&gpio6>;
 778                 interrupts = <21 20>; /* 181 and 180 */
 779
 780                 /* click flags */
 781                 st,click-single-x;
 782                 st,click-single-y;
 783                 st,click-single-z;
 784
 785                 /* Limits are 0.5g * value */
 786                 st,click-threshold-x = <8>;
 787                 st,click-threshold-y = <8>;
 788                 st,click-threshold-z = <10>;
 789
 790                 /* Click must be longer than time limit */
 791                 st,click-time-limit = <9>;
 792
 793                 /* Kind of debounce filter */
 794                 st,click-latency = <50>;
 795
 796                 /* Interrupt line 2 for click detection */
 797                 st,irq2-click;
 798
 799                 st,wakeup-x-hi;
 800                 st,wakeup-y-hi;
 801                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 802
 803                 st,wakeup2-z-hi;
 804                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 805
 806                 st,hipass1-disable;
 807                 st,hipass2-disable;
 808
 809                 st,axis-x = <1>;    /* LIS3_DEV_X */
 810                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 811                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 812
 813                 st,min-limit-x = <(-32)>;
 814                 st,min-limit-y = <3>;
 815                 st,min-limit-z = <3>;
 816
 817                 st,max-limit-x = <(-3)>;
 818                 st,max-limit-y = <32>;
 819                 st,max-limit-z = <32>;
 820         };
 821
 822         cam1: camera@3e {
 823                 compatible = "toshiba,et8ek8";
 824                 reg = <0x3e>;
 825
 826                 vana-supply = <&vaux4>;
 827
 828                 clocks = <&isp 0>;
 829                 clock-names = "extclk";
 830                 clock-frequency = <9600000>;
 831
 832                 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
 833
 834                 lens-focus = <&ad5820>;
 835
 836                 port {
 837                         csi_cam1: endpoint {
 838                                 bus-type = <3>; /* CCP2 */
 839                                 strobe = <1>;
 840                                 clock-inv = <0>;
 841                                 crc = <1>;
 842
 843                                 remote-endpoint = <&csi_isp>;
 844                         };
 845                 };
 846         };
 847
 848         /* D/A converter for auto-focus */
 849         ad5820: dac@c {
 850                 compatible = "adi,ad5820";
 851                 reg = <0x0c>;
 852
 853                 VANA-supply = <&vaux4>;
 854
 855                 #io-channel-cells = <0>;
 856         };
 857 };
 858
 859 &mmc1 {
 860         pinctrl-names = "default";
 861         pinctrl-0 = <&mmc1_pins>;
 862         vmmc-supply = <&vmmc1>;
 863         bus-width = <4>;
 864 };
 865
 866 /* most boards use vaux3, only some old versions use vmmc2 instead */
 867 &mmc2 {
 868         pinctrl-names = "default";
 869         pinctrl-0 = <&mmc2_pins>;
 870         vmmc-supply = <&vaux3>;
 871         vqmmc-supply = <&vsim>;
 872         bus-width = <8>;
 873         non-removable;
 874         no-sdio;
 875         no-sd;
 876 };
 877
 878 &mmc3 {
 879         status = "disabled";
 880 };
 881
 882 &gpmc {
 883         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 884                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 885         pinctrl-names = "default";
 886         pinctrl-0 = <&gpmc_pins>;
 887
 888         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 889         onenand@0,0 {
 890                 #address-cells = <1>;
 891                 #size-cells = <1>;
 892                 compatible = "ti,omap2-onenand";
 893                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 894
 895                 /*
 896                  * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
 897                  * bootloader set values when booted with v5.1
 898                  * (OneNAND Manufacturer: Samsung):
 899                  *
 900                  *   cs0 GPMC_CS_CONFIG1: 0xfb001202
 901                  *   cs0 GPMC_CS_CONFIG2: 0x00111100
 902                  *   cs0 GPMC_CS_CONFIG3: 0x00020200
 903                  *   cs0 GPMC_CS_CONFIG4: 0x11001102
 904                  *   cs0 GPMC_CS_CONFIG5: 0x03101616
 905                  *   cs0 GPMC_CS_CONFIG6: 0x90060000
 906                  */
 907                 gpmc,sync-read;
 908                 gpmc,sync-write;
 909                 gpmc,burst-length = <16>;
 910                 gpmc,burst-read;
 911                 gpmc,burst-wrap;
 912                 gpmc,burst-write;
 913                 gpmc,device-width = <2>;
 914                 gpmc,mux-add-data = <2>;
 915                 gpmc,cs-on-ns = <0>;
 916                 gpmc,cs-rd-off-ns = <102>;
 917                 gpmc,cs-wr-off-ns = <102>;
 918                 gpmc,adv-on-ns = <0>;
 919                 gpmc,adv-rd-off-ns = <12>;
 920                 gpmc,adv-wr-off-ns = <12>;
 921                 gpmc,oe-on-ns = <12>;
 922                 gpmc,oe-off-ns = <102>;
 923                 gpmc,we-on-ns = <0>;
 924                 gpmc,we-off-ns = <102>;
 925                 gpmc,rd-cycle-ns = <132>;
 926                 gpmc,wr-cycle-ns = <132>;
 927                 gpmc,access-ns = <96>;
 928                 gpmc,page-burst-access-ns = <18>;
 929                 gpmc,bus-turnaround-ns = <0>;
 930                 gpmc,cycle2cycle-delay-ns = <0>;
 931                 gpmc,wait-monitoring-ns = <0>;
 932                 gpmc,clk-activation-ns = <6>;
 933                 gpmc,wr-data-mux-bus-ns = <36>;
 934                 gpmc,wr-access-ns = <96>;
 935                 gpmc,sync-clk-ps = <15000>;
 936
 937                 /*
 938                  * MTD partition table corresponding to Nokia's
 939                  * Maemo 5 (Fremantle) release.
 940                  */
 941                 partition@0 {
 942                         label = "bootloader";
 943                         reg = <0x00000000 0x00020000>;
 944                         read-only;
 945                 };
 946                 partition@1 {
 947                         label = "config";
 948                         reg = <0x00020000 0x00060000>;
 949                 };
 950                 partition@2 {
 951                         label = "log";
 952                         reg = <0x00080000 0x00040000>;
 953                 };
 954                 partition@3 {
 955                         label = "kernel";
 956                         reg = <0x000c0000 0x00200000>;
 957                 };
 958                 partition@4 {
 959                         label = "initfs";
 960                         reg = <0x002c0000 0x00200000>;
 961                 };
 962                 partition@5 {
 963                         label = "rootfs";
 964                         reg = <0x004c0000 0x0fb40000>;
 965                 };
 966         };
 967
 968         /* Ethernet is on some early development boards and qemu */
 969         ethernet@gpmc {
 970                 compatible = "smsc,lan91c94";
 971                 interrupt-parent = <&gpio2>;
 972                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 973                 reg = <1 0 0xf>;                /* 16 byte IO range */
 974                 bank-width = <2>;
 975                 pinctrl-names = "default";
 976                 pinctrl-0 = <&ethernet_pins>;
 977                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 978                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 979                 gpmc,device-width = <2>;
 980                 gpmc,sync-clk-ps = <0>;
 981                 gpmc,cs-on-ns = <0>;
 982                 gpmc,cs-rd-off-ns = <48>;
 983                 gpmc,cs-wr-off-ns = <24>;
 984                 gpmc,adv-on-ns = <0>;
 985                 gpmc,adv-rd-off-ns = <0>;
 986                 gpmc,adv-wr-off-ns = <0>;
 987                 gpmc,we-on-ns = <12>;
 988                 gpmc,we-off-ns = <18>;
 989                 gpmc,oe-on-ns = <12>;
 990                 gpmc,oe-off-ns = <48>;
 991                 gpmc,page-burst-access-ns = <0>;
 992                 gpmc,access-ns = <42>;
 993                 gpmc,rd-cycle-ns = <180>;
 994                 gpmc,wr-cycle-ns = <180>;
 995                 gpmc,bus-turnaround-ns = <0>;
 996                 gpmc,cycle2cycle-delay-ns = <0>;
 997                 gpmc,wait-monitoring-ns = <0>;
 998                 gpmc,clk-activation-ns = <0>;
 999                 gpmc,wr-access-ns = <0>;
1000                 gpmc,wr-data-mux-bus-ns = <12>;
1001         };
1002 };
1003
1004 &mcspi1 {
1005         /*
1006          * For some reason, touchscreen is necessary for screen to work at
1007          * all on real hw. It works well without it on emulator.
1008          *
1009          * Also... order in the device tree actually matters here.
1010          */
1011         tsc2005@0 {
1012                 compatible = "ti,tsc2005";
1013                 spi-max-frequency = <6000000>;
1014                 reg = <0>;
1015
1016                 vio-supply = <&vio>;
1017
1018                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
1019                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
1020
1021                 touchscreen-fuzz-x = <4>;
1022                 touchscreen-fuzz-y = <7>;
1023                 touchscreen-fuzz-pressure = <2>;
1024                 touchscreen-size-x = <4096>;
1025                 touchscreen-size-y = <4096>;
1026                 touchscreen-max-pressure = <2048>;
1027
1028                 ti,x-plate-ohms = <280>;
1029                 ti,esd-recovery-timeout-ms = <8000>;
1030         };
1031
1032         lcd: acx565akm@2 {
1033                 compatible = "sony,acx565akm";
1034                 spi-max-frequency = <6000000>;
1035                 reg = <2>;
1036
1037                 pinctrl-names = "default";
1038                 pinctrl-0 = <&acx565akm_pins>;
1039
1040                 label = "lcd";
1041                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
1042
1043                 port {
1044                         lcd_in: endpoint {
1045                                 remote-endpoint = <&sdi_out>;
1046                         };
1047                 };
1048         };
1049 };
1050
1051 &mcspi4 {
1052         pinctrl-names = "default";
1053         pinctrl-0 = <&mcspi4_pins>;
1054
1055         wl1251@0 {
1056                 pinctrl-names = "default";
1057                 pinctrl-0 = <&wl1251_pins>;
1058
1059                 vio-supply = <&vio>;
1060
1061                 compatible = "ti,wl1251";
1062                 reg = <0>;
1063                 spi-max-frequency = <48000000>;
1064
1065                 spi-cpol;
1066                 spi-cpha;
1067
1068                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1069
1070                 interrupt-parent = <&gpio2>;
1071                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1072
1073                 clocks = <&vctcxo>;
1074         };
1075 };
1076
1077 /* RNG not directly accessible on n900, see omap3-rom-rng instead */
1078 &rng_target {
1079         status = "disabled";
1080 };
1081
1082 &usb_otg_hs {
1083         interface-type = <0>;
1084         usb-phy = <&usb2_phy>;
1085         phys = <&usb2_phy>;
1086         phy-names = "usb2-phy";
1087         mode = <2>;
1088         power = <50>;
1089 };
1090
1091 &uart1 {
1092         status = "disabled";
1093 };
1094
1095 &uart2 {
1096         pinctrl-names = "default";
1097         pinctrl-0 = <&uart2_pins>;
1098
1099         bcm2048: bluetooth {
1100                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1101                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1102                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1103                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1104                 clocks = <&vctcxo>;
1105                 clock-names = "sysclk";
1106         };
1107 };
1108
1109 &uart3 {
1110         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1111         pinctrl-names = "default";
1112         pinctrl-0 = <&uart3_pins>;
1113 };
1114
1115 &dss {
1116         status = "okay";
1117
1118         pinctrl-names = "default";
1119         pinctrl-0 = <&dss_sdi_pins>;
1120
1121         vdds_sdi-supply = <&vaux1>;
1122
1123         ports {
1124                 #address-cells = <1>;
1125                 #size-cells = <0>;
1126
1127                 port@1 {
1128                         reg = <1>;
1129
1130                         sdi_out: endpoint {
1131                                 remote-endpoint = <&lcd_in>;
1132                                 datapairs = <2>;
1133                         };
1134                 };
1135         };
1136 };
1137
1138 &venc {
1139         status = "okay";
1140
1141         vdda-supply = <&vdac>;
1142
1143         port {
1144                 venc_out: endpoint {
1145                         remote-endpoint = <&tv_connector_in>;
1146                         ti,channels = <1>;
1147                 };
1148         };
1149 };
1150
1151 &mcbsp2 {
1152         status = "okay";
1153 };
1154
1155 &ssi_port1 {
1156         pinctrl-names = "default";
1157         pinctrl-0 = <&ssi_pins>;
1158
1159         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1160
1161         modem: hsi-client {
1162                 compatible = "nokia,n900-modem";
1163
1164                 pinctrl-names = "default";
1165                 pinctrl-0 = <&modem_pins>;
1166
1167                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1168                 hsi-channel-names = "mcsaab-control",
1169                                     "speech-control",
1170                                     "speech-data",
1171                                     "mcsaab-data";
1172                 hsi-speed-kbps = <55000>;
1173                 hsi-mode = "frame";
1174                 hsi-flow = "synchronized";
1175                 hsi-arb-mode = "round-robin";
1176
1177                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1178
1179                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1180                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1181                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1182                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1183                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1184                 gpio-names = "cmt_apeslpx",
1185                              "cmt_rst_rq",
1186                              "cmt_en",
1187                              "cmt_rst",
1188                              "cmt_bsi";
1189         };
1190 };
1191
1192 &ssi_port2 {
1193         status = "disabled";
1194 };