1 // SPDX-License-Identifier: GPL-2.0
3 * Support for CompuLab CM-T3517
8 #include "omap3-cm-t3x.dtsi"
11 model = "CompuLab CM-T3517";
12 compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
14 vmmc: regulator-vmmc {
15 compatible = "regulator-fixed";
16 regulator-name = "vmmc";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
21 wl12xx_vmmc2: wl12xx_vmmc2 {
22 compatible = "regulator-fixed";
23 regulator-name = "vw1271";
24 pinctrl-names = "default";
29 regulator-min-microvolt = <1800000>;
30 regulator-max-microvolt = <1800000>;
31 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
32 startup-delay-us = <20000>;
36 wl12xx_vaux2: wl12xx_vaux2 {
37 compatible = "regulator-fixed";
38 regulator-name = "vwl1271_vaux2";
39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1800000>;
46 wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
47 pinctrl-single,pins = <
48 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
49 OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
56 phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
57 pinctrl-single,pins = <
58 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
62 phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
63 pinctrl-single,pins = <
64 OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
68 otg_drv_vbus: pinmux_otg_drv_vbus {
69 pinctrl-single,pins = <
70 OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
74 mmc2_pins: pinmux_mmc2_pins {
75 pinctrl-single,pins = <
76 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
77 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
78 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
79 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
80 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
81 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
85 wl12xx_core_pins: pinmux_wl12xx_core_pins {
86 pinctrl-single,pins = <
87 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
88 OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
92 usb_hub_pins: pinmux_usb_hub_pins {
93 pinctrl-single,pins = <
94 OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
100 pinctrl-names = "default";
101 pinctrl-0 = <&phy1_reset_pins>;
102 reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&phy2_reset_pins>;
108 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&otg_drv_vbus>;
126 vmmc-supply = <&vmmc>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&mmc2_pins>;
132 vmmc-supply = <&wl12xx_vmmc2>;
133 vqmmc-supply = <&wl12xx_vaux2>;
138 #address-cells = <1>;
141 compatible = "ti,wl1271";
143 interrupt-parent = <&gpio5>;
144 interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */
145 ref-clock-frequency = <38400000>;
152 pinctrl-names = "default";
155 &dss_dpi_pins_cm_t35x