1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP2420 SoC
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 compatible = "ti,omap2420", "ti,omap2";
15 compatible = "ti,omap2-l4", "simple-bus";
18 ranges = <0 0x48000000 0x100000>;
21 compatible = "ti,omap2-prcm";
22 reg = <0x8000 0x1000>;
29 prcm_clockdomains: clockdomains {
34 compatible = "ti,omap2-scm", "simple-bus";
39 ranges = <0 0x0 0x1000>;
41 omap2420_pmx: pinmux@30 {
42 compatible = "ti,omap2420-padconf",
48 pinctrl-single,register-width = <8>;
49 pinctrl-single,function-mask = <0x3f>;
52 scm_conf: scm_conf@270 {
53 compatible = "syscon";
64 scm_clockdomains: clockdomains {
69 compatible = "ti,sysc-omap2", "ti,sysc";
72 reg-names = "rev", "sysc";
73 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
75 clocks = <&func_32k_ck>;
79 ranges = <0x0 0x4000 0x1000>;
81 counter32k: counter@0 {
82 compatible = "ti,omap-counter32k";
88 gpio1: gpio@48018000 {
89 compatible = "ti,omap2-gpio";
90 reg = <0x48018000 0x200>;
96 #interrupt-cells = <2>;
100 gpio2: gpio@4801a000 {
101 compatible = "ti,omap2-gpio";
102 reg = <0x4801a000 0x200>;
108 #interrupt-cells = <2>;
109 interrupt-controller;
112 gpio3: gpio@4801c000 {
113 compatible = "ti,omap2-gpio";
114 reg = <0x4801c000 0x200>;
120 #interrupt-cells = <2>;
121 interrupt-controller;
124 gpio4: gpio@4801e000 {
125 compatible = "ti,omap2-gpio";
126 reg = <0x4801e000 0x200>;
132 #interrupt-cells = <2>;
133 interrupt-controller;
136 gpmc: gpmc@6800a000 {
137 compatible = "ti,omap2420-gpmc";
138 reg = <0x6800a000 0x1000>;
139 #address-cells = <2>;
143 gpmc,num-waitpins = <4>;
145 interrupt-controller;
146 #interrupt-cells = <2>;
151 mcbsp1: mcbsp@48074000 {
152 compatible = "ti,omap2420-mcbsp";
153 reg = <0x48074000 0xff>;
155 interrupts = <59>, /* TX interrupt */
156 <60>; /* RX interrupt */
157 interrupt-names = "tx", "rx";
158 ti,hwmods = "mcbsp1";
161 dma-names = "tx", "rx";
165 mcbsp2: mcbsp@48076000 {
166 compatible = "ti,omap2420-mcbsp";
167 reg = <0x48076000 0xff>;
169 interrupts = <62>, /* TX interrupt */
170 <63>; /* RX interrupt */
171 interrupt-names = "tx", "rx";
172 ti,hwmods = "mcbsp2";
175 dma-names = "tx", "rx";
179 msdi1: mmc@4809c000 {
180 compatible = "ti,omap2420-mmc";
182 reg = <0x4809c000 0x80>;
184 dmas = <&sdma 61 &sdma 62>;
185 dma-names = "tx", "rx";
188 mailbox: mailbox@48094000 {
189 compatible = "ti,omap2-mailbox";
190 reg = <0x48094000 0x200>;
191 interrupts = <26>, <34>;
192 ti,hwmods = "mailbox";
194 ti,mbox-num-users = <4>;
195 ti,mbox-num-fifos = <6>;
197 ti,mbox-tx = <0 0 0>;
198 ti,mbox-rx = <1 0 0>;
201 ti,mbox-tx = <2 1 3>;
202 ti,mbox-rx = <3 1 3>;
206 timer1_target: target-module@48028000 {
207 compatible = "ti,sysc-omap2-timer", "ti,sysc";
208 reg = <0x48028000 0x4>,
211 reg-names = "rev", "sysc", "syss";
212 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
214 SYSC_OMAP2_ENAWAKEUP |
215 SYSC_OMAP2_SOFTRESET |
216 SYSC_OMAP2_AUTOIDLE)>;
217 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
221 clocks = <&gpt1_fck>, <&gpt1_ick>;
222 clock-names = "fck", "ick";
223 #address-cells = <1>;
225 ranges = <0x0 0x48028000 0x1000>;
228 compatible = "ti,omap2420-timer";
235 wd_timer2: wdt@48022000 {
236 compatible = "ti,omap2-wdt";
237 ti,hwmods = "wd_timer2";
238 reg = <0x48022000 0x80>;
244 compatible = "ti,omap2420-i2c";
248 compatible = "ti,omap2420-i2c";
251 #include "omap24xx-clocks.dtsi"
252 #include "omap2420-clocks.dtsi"
254 /* Preferred always-on timer for clockevent */
259 assigned-clocks = <&gpt1_fck>;
260 assigned-clock-parents = <&func_32k_ck>;