2 * Copyright 2017 Sean Wang <sean.wang@mediatek.com>
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
10 #include "mt6323.dtsi"
13 model = "Bananapi BPI-R2";
14 compatible = "bananapi,bpi-r2", "mediatek,mt7623";
21 stdout-path = "serial2:115200n8";
26 proc-supply = <&mt6323_vproc_reg>;
30 proc-supply = <&mt6323_vproc_reg>;
34 proc-supply = <&mt6323_vproc_reg>;
38 proc-supply = <&mt6323_vproc_reg>;
42 reg_3p3v: regulator-3p3v {
43 compatible = "regulator-fixed";
44 regulator-name = "fixed-3.3V";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
51 reg_5v: regulator-5v {
52 compatible = "regulator-fixed";
53 regulator-name = "fixed-5V";
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
61 compatible = "gpio-keys";
62 pinctrl-names = "default";
63 pinctrl-0 = <&key_pins_a>;
68 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
73 linux,code = <KEY_WPS_BUTTON>;
74 gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
79 compatible = "gpio-leds";
80 pinctrl-names = "default";
81 pinctrl-0 = <&led_pins_a>;
84 label = "bpi-r2:pio:blue";
85 gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
86 default-state = "off";
90 label = "bpi-r2:pio:green";
91 gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
92 default-state = "off";
96 label = "bpi-r2:pio:red";
97 gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
98 default-state = "off";
103 device_type = "memory";
104 reg = <0 0x80000000 0 0x40000000>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&cir_pins_a>;
122 compatible = "mediatek,eth-mac";
134 #address-cells = <1>;
138 compatible = "mediatek,mt7530";
139 #address-cells = <1>;
142 pinctrl-names = "default";
143 reset-gpios = <&pio 33 0>;
144 core-supply = <&mt6323_vpa_reg>;
145 io-supply = <&mt6323_vemc3v3_reg>;
148 #address-cells = <1>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&i2c0_pins_a>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&i2c1_pins_a>;
207 pinctrl-names = "default", "state_uhs";
208 pinctrl-0 = <&mmc0_pins_default>;
209 pinctrl-1 = <&mmc0_pins_uhs>;
212 max-frequency = <50000000>;
214 vmmc-supply = <&mt6323_vemc3v3_reg>;
215 vqmmc-supply = <&mt6323_vio18_reg>;
220 pinctrl-names = "default", "state_uhs";
221 pinctrl-0 = <&mmc1_pins_default>;
222 pinctrl-1 = <&mmc1_pins_uhs>;
225 max-frequency = <50000000>;
227 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
228 vmmc-supply = <&mt6323_vmch_reg>;
229 vqmmc-supply = <&mt6323_vio18_reg>;
235 pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
242 pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
243 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
250 pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
251 <MT7623_PIN_58_SCL1_FUNC_SCL1>;
258 pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
259 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
260 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
261 <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
262 <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
263 drive-strength = <MTK_DRIVE_12mA>;
270 pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
271 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
272 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
273 <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
274 <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
275 drive-strength = <MTK_DRIVE_12mA>;
282 pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
283 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
290 pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
291 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
292 <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
296 mmc0_pins_default: mmc0default {
298 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
299 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
300 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
301 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
302 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
303 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
304 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
305 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
306 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
312 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
317 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
322 mmc0_pins_uhs: mmc0 {
324 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
325 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
326 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
327 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
328 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
329 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
330 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
331 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
332 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
334 drive-strength = <MTK_DRIVE_2mA>;
335 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
339 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
340 drive-strength = <MTK_DRIVE_2mA>;
341 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
345 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
350 mmc1_pins_default: mmc1default {
352 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
353 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
354 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
355 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
356 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
358 drive-strength = <MTK_DRIVE_4mA>;
359 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
363 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
365 drive-strength = <MTK_DRIVE_4mA>;
369 pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
375 pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
380 mmc1_pins_uhs: mmc1 {
382 pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
383 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
384 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
385 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
386 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
388 drive-strength = <MTK_DRIVE_4mA>;
389 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
393 pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
394 drive-strength = <MTK_DRIVE_4mA>;
395 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
401 pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
402 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
403 <MT7623_PIN_205_PWM2_FUNC_PWM2>,
404 <MT7623_PIN_206_PWM3_FUNC_PWM3>,
405 <MT7623_PIN_207_PWM4_FUNC_PWM4>;
411 pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
412 <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
413 <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
414 <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
419 uart0_pins_a: uart@0 {
421 pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
422 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
426 uart1_pins_a: uart@1 {
428 pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
429 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&pwm_pins_a>;
443 compatible = "mediatek,mt6323-led";
444 #address-cells = <1>;
449 label = "bpi-r2:isink:green";
450 default-state = "off";
455 label = "bpi-r2:isink:red";
456 default-state = "off";
461 label = "bpi-r2:isink:blue";
462 default-state = "off";
469 pinctrl-names = "default";
470 pinctrl-0 = <&spi0_pins_a>;
475 pinctrl-names = "default";
476 pinctrl-0 = <&uart0_pins_a>;
481 pinctrl-names = "default";
482 pinctrl-0 = <&uart1_pins_a>;
491 vusb33-supply = <®_3p3v>;
492 vbus-supply = <®_5v>;
497 vusb33-supply = <®_3p3v>;
498 vbus-supply = <®_5v>;