1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015 MediaTek Inc.
4 * Author: Mars.C <mars.cheng@mediatek.com>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include "skeleton.dtsi"
13 compatible = "mediatek,mt6580";
16 interrupt-parent = <&sysirq>;
24 compatible = "arm,cortex-a7";
29 compatible = "arm,cortex-a7";
34 compatible = "arm,cortex-a7";
39 compatible = "arm,cortex-a7";
45 system_clk: dummy13m {
46 compatible = "fixed-clock";
47 clock-frequency = <13000000>;
52 compatible = "fixed-clock";
53 clock-frequency = <32000>;
58 compatible = "fixed-clock";
59 clock-frequency = <26000000>;
63 timer: timer@10008000 {
64 compatible = "mediatek,mt6580-timer",
65 "mediatek,mt6577-timer";
66 reg = <0x10008000 0x80>;
67 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
68 clocks = <&system_clk>, <&rtc_clk>;
69 clock-names = "system-clk", "rtc-clk";
72 sysirq: interrupt-controller@10200100 {
73 compatible = "mediatek,mt6580-sysirq",
74 "mediatek,mt6577-sysirq";
76 #interrupt-cells = <3>;
77 interrupt-parent = <&gic>;
78 reg = <0x10200100 0x1c>;
81 gic: interrupt-controller@10211000 {
82 compatible = "arm,cortex-a7-gic";
84 #interrupt-cells = <3>;
85 interrupt-parent = <&gic>;
86 reg = <0x10211000 0x1000>,
92 uart0: serial@11005000 {
93 compatible = "mediatek,mt6580-uart",
94 "mediatek,mt6577-uart";
95 reg = <0x11005000 0x400>;
96 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
101 uart1: serial@11006000 {
102 compatible = "mediatek,mt6580-uart",
103 "mediatek,mt6577-uart";
104 reg = <0x11006000 0x400>;
105 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>;
106 clocks = <&uart_clk>;