arch/arm/boot/dts/ls1021a-twr.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright 2013-2014 Freescale Semiconductor, Inc.
   4  * Copyright 2018 NXP
   5  */
   6
   7 /dts-v1/;
   8 #include "ls1021a.dtsi"
   9
  10 / {
  11         model = "LS1021A TWR Board";
  12         compatible = "fsl,ls1021a-twr", "fsl,ls1021a";
  13
  14         aliases {
  15                 enet2_rgmii_phy = &rgmii_phy1;
  16                 enet0_sgmii_phy = &sgmii_phy2;
  17                 enet1_sgmii_phy = &sgmii_phy0;
  18         };
  19
  20         sys_mclk: clock-mclk {
  21                 compatible = "fixed-clock";
  22                 #clock-cells = <0>;
  23                 clock-frequency = <24576000>;
  24         };
  25
  26         reg_3p3v: regulator {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "3P3V";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31                 regulator-always-on;
  32         };
  33
  34         sound {
  35                 compatible = "simple-audio-card";
  36                 simple-audio-card,format = "i2s";
  37                 simple-audio-card,widgets =
  38                         "Microphone", "Microphone Jack",
  39                         "Headphone", "Headphone Jack",
  40                         "Speaker", "Speaker Ext",
  41                         "Line", "Line In Jack";
  42                 simple-audio-card,routing =
  43                         "MIC_IN", "Microphone Jack",
  44                         "Microphone Jack", "Mic Bias",
  45                         "LINE_IN", "Line In Jack",
  46                         "Headphone Jack", "HP_OUT",
  47                         "Speaker Ext", "LINE_OUT";
  48
  49                 simple-audio-card,cpu {
  50                         sound-dai = <&sai1>;
  51                         frame-master;
  52                         bitclock-master;
  53                 };
  54
  55                 simple-audio-card,codec {
  56                         sound-dai = <&codec>;
  57                         frame-master;
  58                         bitclock-master;
  59                 };
  60         };
  61
  62         panel: panel {
  63                 compatible = "nec,nl4827hc19-05b";
  64
  65                 port {
  66                         panel_in: endpoint {
  67                                 remote-endpoint = <&dcu_out>;
  68                         };
  69                 };
  70         };
  71 };
  72
  73 &dcu {
  74         status = "okay";
  75
  76         port {
  77                 dcu_out: endpoint {
  78                         remote-endpoint = <&panel_in>;
  79                 };
  80         };
  81 };
  82
  83 &dspi1 {
  84         bus-num = <0>;
  85         status = "okay";
  86
  87         dspiflash: s25fl064k@0 {
  88                 #address-cells = <1>;
  89                 #size-cells = <1>;
  90                 compatible = "spansion,s25fl064k";
  91                 spi-max-frequency = <16000000>;
  92                 spi-cpol;
  93                 spi-cpha;
  94                 reg = <0>;
  95         };
  96 };
  97
  98 &enet0 {
  99         tbi-handle = <&tbi0>;
 100         phy-handle = <&sgmii_phy2>;
 101         phy-connection-type = "sgmii";
 102         status = "okay";
 103 };
 104
 105 &enet1 {
 106         tbi-handle = <&tbi1>;
 107         phy-handle = <&sgmii_phy0>;
 108         phy-connection-type = "sgmii";
 109         status = "okay";
 110 };
 111
 112 &enet2 {
 113         phy-handle = <&rgmii_phy1>;
 114         phy-connection-type = "rgmii-id";
 115         status = "okay";
 116 };
 117
 118 &i2c0 {
 119         status = "okay";
 120
 121         ina220@40 {
 122                 compatible = "ti,ina220";
 123                 reg = <0x40>;
 124                 shunt-resistor = <1000>;
 125         };
 126
 127         ina220@41 {
 128                 compatible = "ti,ina220";
 129                 reg = <0x41>;
 130                 shunt-resistor = <1000>;
 131         };
 132
 133 };
 134
 135 &i2c1 {
 136         status = "okay";
 137         codec: sgtl5000@a {
 138                 #sound-dai-cells = <0>;
 139                 compatible = "fsl,sgtl5000";
 140                 reg = <0x0a>;
 141                 VDDA-supply = <&reg_3p3v>;
 142                 VDDIO-supply = <&reg_3p3v>;
 143                 clocks = <&sys_mclk>;
 144         };
 145 };
 146
 147 &ifc {
 148         #address-cells = <2>;
 149         #size-cells = <1>;
 150         /* NOR Flash on board */
 151         ranges = <0x0 0x0 0x0 0x60000000 0x08000000>;
 152         status = "okay";
 153
 154         nor@0,0 {
 155                 #address-cells = <1>;
 156                 #size-cells = <1>;
 157                 compatible = "cfi-flash";
 158                 reg = <0x0 0x0 0x8000000>;
 159                 big-endian;
 160                 bank-width = <2>;
 161                 device-width = <1>;
 162         };
 163 };
 164
 165 &lpuart0 {
 166         status = "okay";
 167 };
 168
 169 &mdio0 {
 170         sgmii_phy0: ethernet-phy@0 {
 171                 reg = <0x0>;
 172         };
 173         rgmii_phy1: ethernet-phy@1 {
 174                 reg = <0x1>;
 175         };
 176         sgmii_phy2: ethernet-phy@2 {
 177                 reg = <0x2>;
 178         };
 179         tbi0: tbi-phy@1f {
 180                 reg = <0x1f>;
 181                 device_type = "tbi-phy";
 182         };
 183 };
 184
 185 &mdio1 {
 186         tbi1: tbi-phy@1f {
 187                 reg = <0x1f>;
 188                 device_type = "tbi-phy";
 189         };
 190 };
 191
 192 &esdhc {
 193         status = "okay";
 194 };
 195
 196 &qspi {
 197         status = "okay";
 198
 199         n25q128a130: flash@0 {
 200                 compatible = "jedec,spi-nor";
 201                 #address-cells = <1>;
 202                 #size-cells = <1>;
 203                 spi-max-frequency = <50000000>;
 204                 reg = <0>;
 205                 spi-rx-bus-width = <4>;
 206                 spi-tx-bus-width = <4>;
 207         };
 208 };
 209
 210 &sai1 {
 211         status = "okay";
 212 };
 213
 214 &sata {
 215         status = "okay";
 216 };
 217
 218 &uart0 {
 219         status = "okay";
 220 };
 221
 222 &uart1 {
 223         status = "okay";
 224 };
 225
 226 &can0 {
 227         status = "okay";
 228 };
 229
 230 &can1 {
 231         status = "okay";
 232 };
 233
 234 &can2 {
 235         status = "disabled";
 236 };
 237
 238 &can3 {
 239         status = "disabled";
 240 };