GNU Linux-libre 4.14.251-gnu1
[releases.git] / arch / arm / boot / dts / logicpd-torpedo-som.dtsi
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License version 2 as
4  * published by the Free Software Foundation.
5  */
6
7 #include <dt-bindings/input/input.h>
8
9 / {
10         chosen {
11                 stdout-path = &uart1;
12         };
13
14         cpus {
15                 cpu@0 {
16                         cpu0-supply = <&vcc>;
17                 };
18         };
19
20         memory@80000000 {
21                 device_type = "memory";
22                 reg = <0x80000000 0>;
23         };
24
25         leds {
26                 compatible = "gpio-leds";
27                 user0 {
28                         label = "user0";
29                         gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */
30                         linux,default-trigger = "none";
31                 };
32         };
33
34         wl12xx_vmmc: wl12xx_vmmc {
35                 compatible = "regulator-fixed";
36                 regulator-name = "vwl1271";
37                 regulator-min-microvolt = <1800000>;
38                 regulator-max-microvolt = <1800000>;
39                 gpio = <&gpio5 29 0>;   /* gpio157 */
40                 startup-delay-us = <70000>;
41                 enable-active-high;
42                 vin-supply = <&vmmc2>;
43         };
44 };
45
46 &gpmc {
47         ranges = <0 0 0x30000000 0x1000000>;    /* CS0: 16MB for NAND */
48
49         nand@0,0 {
50                 compatible = "ti,omap2-nand";
51                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
52                 interrupt-parent = <&gpmc>;
53                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
54                              <1 IRQ_TYPE_NONE>; /* termcount */
55                 linux,mtd-name = "micron,mt29f4g16abbda3w";
56                 nand-bus-width = <16>;
57                 ti,nand-ecc-opt = "bch8";
58                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
59                 gpmc,sync-clk-ps = <0>;
60                 gpmc,cs-on-ns = <0>;
61                 gpmc,cs-rd-off-ns = <44>;
62                 gpmc,cs-wr-off-ns = <44>;
63                 gpmc,adv-on-ns = <6>;
64                 gpmc,adv-rd-off-ns = <34>;
65                 gpmc,adv-wr-off-ns = <44>;
66                 gpmc,we-off-ns = <40>;
67                 gpmc,oe-off-ns = <54>;
68                 gpmc,access-ns = <64>;
69                 gpmc,rd-cycle-ns = <82>;
70                 gpmc,wr-cycle-ns = <82>;
71                 gpmc,wr-access-ns = <40>;
72                 gpmc,wr-data-mux-bus-ns = <0>;
73                 gpmc,device-width = <2>;
74                 #address-cells = <1>;
75                 #size-cells = <1>;
76
77                 /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
78
79                 x-loader@0 {
80                         label = "x-loader";
81                         reg = <0 0x80000>;
82                 };
83
84                 bootloaders@80000 {
85                         label = "u-boot";
86                         reg = <0x80000 0x1e0000>;
87                 };
88
89                 bootloaders_env@260000 {
90                         label = "u-boot-env";
91                         reg = <0x260000 0x20000>;
92                 };
93
94                 kernel@280000 {
95                         label = "kernel";
96                         reg = <0x280000 0x400000>;
97                 };
98
99                 filesystem@680000 {
100                         label = "fs";
101                         reg = <0x680000 0>;     /* 0 = MTDPART_SIZ_FULL */
102                 };
103         };
104 };
105
106 &i2c1 {
107         pinctrl-names = "default";
108         pinctrl-0 = <&i2c1_pins>;
109         clock-frequency = <2600000>;
110
111         twl: twl@48 {
112                 reg = <0x48>;
113                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
114                 interrupt-parent = <&intc>;
115                 twl_audio: audio {
116                         compatible = "ti,twl4030-audio";
117                         codec {
118                         };
119                 };
120         };
121 };
122
123 &i2c2 {
124         pinctrl-names = "default";
125         pinctrl-0 = <&i2c2_pins>;
126         clock-frequency = <400000>;
127 };
128
129 &i2c3 {
130         pinctrl-names = "default";
131         pinctrl-0 = <&i2c3_pins>;
132         clock-frequency = <400000>;
133         at24@50 {
134                 compatible = "atmel,24c64";
135                 readonly;
136                 reg = <0x50>;
137         };
138 };
139
140 /*
141  * Only found on the wireless SOM. For the SOM without wireless, the pins for
142  * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
143  * gpio157 is not connected. So this should be OK to keep common for now,
144  * probably device tree overlays is the way to go with the various SOM and
145  * jumpering combinations for the long run.
146  */
147 &mmc3 {
148         interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
149         pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
150         pinctrl-names = "default";
151         vmmc-supply = <&wl12xx_vmmc>;
152         non-removable;
153         bus-width = <4>;
154         cap-power-off-card;
155         #address-cells = <1>;
156         #size-cells = <0>;
157         wlcore: wlcore@2 {
158                 compatible = "ti,wl1283";
159                 reg = <2>;
160                 interrupt-parent = <&gpio5>;
161                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
162                 ref-clock-frequency = <26000000>;
163                 tcxo-clock-frequency = <26000000>;
164         };
165 };
166
167 &omap3_pmx_core {
168         mmc3_pins: pinmux_mm3_pins {
169                 pinctrl-single,pins = <
170                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
171                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
172                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
173                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
174                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
175                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_fsr.gpio_157 */
176                 >;
177         };
178         mcbsp2_pins: pinmux_mcbsp2_pins {
179                 pinctrl-single,pins = <
180                         OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
181                         OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
182                         OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
183                         OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
184                 >;
185         };
186         uart2_pins: pinmux_uart2_pins {
187                 pinctrl-single,pins = <
188                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
189                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
190                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
191                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
192                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
193                 >;
194         };
195         mcspi1_pins: pinmux_mcspi1_pins {
196                 pinctrl-single,pins = <
197                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
198                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
199                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
200                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
201                 >;
202         };
203         hsusb_otg_pins: pinmux_hsusb_otg_pins {
204                 pinctrl-single,pins = <
205                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk.hsusb0_clk */
206                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp.hsusb0_stp */
207                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir.hsusb0_dir */
208                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt.hsusb0_nxt */
209
210                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0.hsusb0_data0 */
211                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1.hsusb0_data1 */
212                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2.hsusb0_data2 */
213                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3.hsusb0_data3 */
214                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4.hsusb0_data4 */
215                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5.hsusb0_data5 */
216                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6.hsusb0_data6 */
217                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7.hsusb0_data7 */
218                 >;
219         };
220         i2c1_pins: pinmux_i2c1_pins {
221                 pinctrl-single,pins = <
222                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
223                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
224                 >;
225         };
226         i2c2_pins: pinmux_i2c2_pins {
227                 pinctrl-single,pins = <
228                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)        /* i2c2_scl */
229                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)        /* i2c2_sda */
230                 >;
231         };
232         i2c3_pins: pinmux_i2c3_pins {
233                 pinctrl-single,pins = <
234                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl */
235                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda */
236                 >;
237         };
238 };
239
240 &uart2 {
241         interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
242         pinctrl-names = "default";
243         pinctrl-0 = <&uart2_pins>;
244 };
245
246 &mcspi1 {
247         pinctrl-names = "default";
248         pinctrl-0 = <&mcspi1_pins>;
249 };
250
251 &omap3_pmx_core2 {
252         mmc3_core2_pins: pinmux_mmc3_core2_pins {
253                 pinctrl-single,pins = <
254                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_clk.sdmmc3_clk */
255                         OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_ctl.sdmmc3_cmd */
256                 >;
257         };
258 };
259
260 #include "twl4030.dtsi"
261 #include "twl4030_omap3.dtsi"
262
263 &twl {
264         twl_power: power {
265                 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
266                 ti,use_poweroff;
267         };
268 };
269
270 &twl_gpio {
271         ti,use-leds;
272 };
273
274 &twl_keypad {
275         status = "disabled";
276 };