arch/arm/boot/dts/lan966x.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
   4  *
   5  * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
   6  *
   7  * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
   8  *
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/mfd/atmel-flexcom.h>
  14 #include <dt-bindings/dma/at91.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/clock/microchip,lan966x.h>
  17
  18 / {
  19         model = "Microchip LAN966 family SoC";
  20         compatible = "microchip,lan966";
  21         interrupt-parent = <&gic>;
  22         #address-cells = <1>;
  23         #size-cells = <1>;
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a7";
  32                         clock-frequency = <600000000>;
  33                         reg = <0x0>;
  34                 };
  35         };
  36
  37         clocks {
  38                 sys_clk: sys_clk {
  39                         compatible = "fixed-clock";
  40                         #clock-cells = <0>;
  41                         clock-frequency = <162500000>;
  42                 };
  43
  44                 cpu_clk: cpu_clk {
  45                         compatible = "fixed-clock";
  46                         #clock-cells = <0>;
  47                         clock-frequency = <600000000>;
  48                 };
  49
  50                 ddr_clk: ddr_clk {
  51                         compatible = "fixed-clock";
  52                         #clock-cells = <0>;
  53                         clock-frequency = <300000000>;
  54                 };
  55
  56                 nic_clk: nic_clk {
  57                         compatible = "fixed-clock";
  58                         #clock-cells = <0>;
  59                         clock-frequency = <200000000>;
  60                 };
  61         };
  62
  63         clks: clock-controller@e00c00a8 {
  64                 compatible = "microchip,lan966x-gck";
  65                 #clock-cells = <1>;
  66                 clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
  67                 clock-names = "cpu", "ddr", "sys";
  68                 reg = <0xe00c00a8 0x38>;
  69         };
  70
  71         timer {
  72                 compatible = "arm,armv7-timer";
  73                 interrupt-parent = <&gic>;
  74                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
  75                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
  76                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
  77                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
  78                 clock-frequency = <37500000>;
  79         };
  80
  81         soc {
  82                 compatible = "simple-bus";
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85                 ranges;
  86
  87                 switch: switch@e0000000 {
  88                         compatible = "microchip,lan966x-switch";
  89                         reg = <0xe0000000 0x0100000>,
  90                               <0xe2000000 0x0800000>;
  91                         reg-names = "cpu", "gcb";
  92                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  93                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
  94                                      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  95                                      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  96                                      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  97                         interrupt-names = "xtr", "fdma", "ana", "ptp",
  98                                           "ptp-ext";
  99                         resets = <&reset 0>;
 100                         reset-names = "switch";
 101                         status = "disabled";
 102
 103                         ethernet-ports {
 104                                 #address-cells = <1>;
 105                                 #size-cells = <0>;
 106
 107                                 port0: port@0 {
 108                                         reg = <0>;
 109                                         status = "disabled";
 110                                 };
 111
 112                                 port1: port@1 {
 113                                         reg = <1>;
 114                                         status = "disabled";
 115                                 };
 116
 117                                 port2: port@2 {
 118                                         reg = <2>;
 119                                         status = "disabled";
 120                                 };
 121
 122                                 port3: port@3 {
 123                                         reg = <3>;
 124                                         status = "disabled";
 125                                 };
 126
 127                                 port4: port@4 {
 128                                         reg = <4>;
 129                                         status = "disabled";
 130                                 };
 131
 132                                 port5: port@5 {
 133                                         reg = <5>;
 134                                         status = "disabled";
 135                                 };
 136
 137                                 port6: port@6 {
 138                                         reg = <6>;
 139                                         status = "disabled";
 140                                 };
 141
 142                                 port7: port@7 {
 143                                         reg = <7>;
 144                                         status = "disabled";
 145                                 };
 146                         };
 147                 };
 148
 149                 flx0: flexcom@e0040000 {
 150                         compatible = "atmel,sama5d2-flexcom";
 151                         reg = <0xe0040000 0x100>;
 152                         clocks = <&clks GCK_ID_FLEXCOM0>;
 153                         #address-cells = <1>;
 154                         #size-cells = <1>;
 155                         ranges = <0x0 0xe0040000 0x800>;
 156                         status = "disabled";
 157
 158                         usart0: serial@200 {
 159                                 compatible = "atmel,at91sam9260-usart";
 160                                 reg = <0x200 0x200>;
 161                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 162                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
 163                                        <&dma0 AT91_XDMAC_DT_PERID(2)>;
 164                                 dma-names = "tx", "rx";
 165                                 clocks = <&nic_clk>;
 166                                 clock-names = "usart";
 167                                 atmel,fifo-size = <32>;
 168                                 status = "disabled";
 169                         };
 170
 171                         spi0: spi@400 {
 172                                 compatible = "atmel,at91rm9200-spi";
 173                                 reg = <0x400 0x200>;
 174                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 175                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
 176                                        <&dma0 AT91_XDMAC_DT_PERID(2)>;
 177                                 dma-names = "tx", "rx";
 178                                 clocks = <&nic_clk>;
 179                                 clock-names = "spi_clk";
 180                                 atmel,fifo-size = <32>;
 181                                 #address-cells = <1>;
 182                                 #size-cells = <0>;
 183                                 status = "disabled";
 184                         };
 185
 186                         i2c0: i2c@600 {
 187                                 compatible = "microchip,sam9x60-i2c";
 188                                 reg = <0x600 0x200>;
 189                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 190                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
 191                                        <&dma0 AT91_XDMAC_DT_PERID(2)>;
 192                                 dma-names = "tx", "rx";
 193                                 clocks = <&nic_clk>;
 194                                 #address-cells = <1>;
 195                                 #size-cells = <0>;
 196                                 status = "disabled";
 197                         };
 198                 };
 199
 200                 flx1: flexcom@e0044000 {
 201                         compatible = "atmel,sama5d2-flexcom";
 202                         reg = <0xe0044000 0x100>;
 203                         clocks = <&clks GCK_ID_FLEXCOM1>;
 204                         #address-cells = <1>;
 205                         #size-cells = <1>;
 206                         ranges = <0x0 0xe0044000 0x800>;
 207                         status = "disabled";
 208
 209                         usart1: serial@200 {
 210                                 compatible = "atmel,at91sam9260-usart";
 211                                 reg = <0x200 0x200>;
 212                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 213                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
 214                                        <&dma0 AT91_XDMAC_DT_PERID(4)>;
 215                                 dma-names = "tx", "rx";
 216                                 clocks = <&nic_clk>;
 217                                 clock-names = "usart";
 218                                 atmel,fifo-size = <32>;
 219                                 status = "disabled";
 220                         };
 221
 222                         spi1: spi@400 {
 223                                 compatible = "atmel,at91rm9200-spi";
 224                                 reg = <0x400 0x200>;
 225                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 226                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
 227                                        <&dma0 AT91_XDMAC_DT_PERID(4)>;
 228                                 dma-names = "tx", "rx";
 229                                 clocks = <&nic_clk>;
 230                                 clock-names = "spi_clk";
 231                                 atmel,fifo-size = <32>;
 232                                 #address-cells = <1>;
 233                                 #size-cells = <0>;
 234                                 status = "disabled";
 235                         };
 236
 237                         i2c1: i2c@600 {
 238                                 compatible = "microchip,sam9x60-i2c";
 239                                 reg = <0x600 0x200>;
 240                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 241                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
 242                                        <&dma0 AT91_XDMAC_DT_PERID(4)>;
 243                                 dma-names = "tx", "rx";
 244                                 clocks = <&nic_clk>;
 245                                 #address-cells = <1>;
 246                                 #size-cells = <0>;
 247                                 status = "disabled";
 248                         };
 249                 };
 250
 251                 trng: rng@e0048000 {
 252                         compatible = "atmel,at91sam9g45-trng";
 253                         reg = <0xe0048000 0x100>;
 254                         clocks = <&nic_clk>;
 255                 };
 256
 257                 aes: crypto@e004c000 {
 258                         compatible = "atmel,at91sam9g46-aes";
 259                         reg = <0xe004c000 0x100>;
 260                         interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 261                         dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
 262                                <&dma0 AT91_XDMAC_DT_PERID(13)>;
 263                         dma-names = "tx", "rx";
 264                         clocks = <&nic_clk>;
 265                         clock-names = "aes_clk";
 266                 };
 267
 268                 flx2: flexcom@e0060000 {
 269                         compatible = "atmel,sama5d2-flexcom";
 270                         reg = <0xe0060000 0x100>;
 271                         clocks = <&clks GCK_ID_FLEXCOM2>;
 272                         #address-cells = <1>;
 273                         #size-cells = <1>;
 274                         ranges = <0x0 0xe0060000 0x800>;
 275                         status = "disabled";
 276
 277                         usart2: serial@200 {
 278                                 compatible = "atmel,at91sam9260-usart";
 279                                 reg = <0x200 0x200>;
 280                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
 281                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
 282                                        <&dma0 AT91_XDMAC_DT_PERID(6)>;
 283                                 dma-names = "tx", "rx";
 284                                 clocks = <&nic_clk>;
 285                                 clock-names = "usart";
 286                                 atmel,fifo-size = <32>;
 287                                 status = "disabled";
 288                         };
 289
 290                         spi2: spi@400 {
 291                                 compatible = "atmel,at91rm9200-spi";
 292                                 reg = <0x400 0x200>;
 293                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
 294                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
 295                                        <&dma0 AT91_XDMAC_DT_PERID(6)>;
 296                                 dma-names = "tx", "rx";
 297                                 clocks = <&nic_clk>;
 298                                 clock-names = "spi_clk";
 299                                 atmel,fifo-size = <32>;
 300                                 #address-cells = <1>;
 301                                 #size-cells = <0>;
 302                                 status = "disabled";
 303                         };
 304
 305                         i2c2: i2c@600 {
 306                                 compatible = "microchip,sam9x60-i2c";
 307                                 reg = <0x600 0x200>;
 308                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
 309                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
 310                                        <&dma0 AT91_XDMAC_DT_PERID(6)>;
 311                                 dma-names = "tx", "rx";
 312                                 clocks = <&nic_clk>;
 313                                 #address-cells = <1>;
 314                                 #size-cells = <0>;
 315                                 status = "disabled";
 316                         };
 317                 };
 318
 319                 flx3: flexcom@e0064000 {
 320                         compatible = "atmel,sama5d2-flexcom";
 321                         reg = <0xe0064000 0x100>;
 322                         clocks = <&clks GCK_ID_FLEXCOM3>;
 323                         #address-cells = <1>;
 324                         #size-cells = <1>;
 325                         ranges = <0x0 0xe0064000 0x800>;
 326                         status = "disabled";
 327
 328                         usart3: serial@200 {
 329                                 compatible = "atmel,at91sam9260-usart";
 330                                 reg = <0x200 0x200>;
 331                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 332                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
 333                                        <&dma0 AT91_XDMAC_DT_PERID(8)>;
 334                                 dma-names = "tx", "rx";
 335                                 clocks = <&nic_clk>;
 336                                 clock-names = "usart";
 337                                 atmel,fifo-size = <32>;
 338                                 status = "disabled";
 339                         };
 340
 341                         spi3: spi@400 {
 342                                 compatible = "atmel,at91rm9200-spi";
 343                                 reg = <0x400 0x200>;
 344                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 345                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
 346                                        <&dma0 AT91_XDMAC_DT_PERID(8)>;
 347                                 dma-names = "tx", "rx";
 348                                 clocks = <&nic_clk>;
 349                                 clock-names = "spi_clk";
 350                                 atmel,fifo-size = <32>;
 351                                 #address-cells = <1>;
 352                                 #size-cells = <0>;
 353                                 status = "disabled";
 354                         };
 355
 356                         i2c3: i2c@600 {
 357                                 compatible = "microchip,sam9x60-i2c";
 358                                 reg = <0x600 0x200>;
 359                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 360                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
 361                                        <&dma0 AT91_XDMAC_DT_PERID(8)>;
 362                                 dma-names = "tx", "rx";
 363                                 clocks = <&nic_clk>;
 364                                 #address-cells = <1>;
 365                                 #size-cells = <0>;
 366                                 status = "disabled";
 367                         };
 368                 };
 369
 370                 dma0: dma-controller@e0068000 {
 371                         compatible = "microchip,sama7g5-dma";
 372                         reg = <0xe0068000 0x1000>;
 373                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 374                         #dma-cells = <1>;
 375                         clocks = <&nic_clk>;
 376                         clock-names = "dma_clk";
 377                 };
 378
 379                 sha: crypto@e006c000 {
 380                         compatible = "atmel,at91sam9g46-sha";
 381                         reg = <0xe006c000 0xec>;
 382                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 383                         dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>;
 384                         dma-names = "tx";
 385                         clocks = <&nic_clk>;
 386                         clock-names = "sha_clk";
 387                 };
 388
 389                 flx4: flexcom@e0070000 {
 390                         compatible = "atmel,sama5d2-flexcom";
 391                         reg = <0xe0070000 0x100>;
 392                         clocks = <&clks GCK_ID_FLEXCOM4>;
 393                         #address-cells = <1>;
 394                         #size-cells = <1>;
 395                         ranges = <0x0 0xe0070000 0x800>;
 396                         status = "disabled";
 397
 398                         usart4: serial@200 {
 399                                 compatible = "atmel,at91sam9260-usart";
 400                                 reg = <0x200 0x200>;
 401                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 402                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
 403                                        <&dma0 AT91_XDMAC_DT_PERID(10)>;
 404                                 dma-names = "tx", "rx";
 405                                 clocks = <&nic_clk>;
 406                                 clock-names = "usart";
 407                                 atmel,fifo-size = <32>;
 408                                 status = "disabled";
 409                         };
 410
 411                         spi4: spi@400 {
 412                                 compatible = "atmel,at91rm9200-spi";
 413                                 reg = <0x400 0x200>;
 414                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 415                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
 416                                        <&dma0 AT91_XDMAC_DT_PERID(10)>;
 417                                 dma-names = "tx", "rx";
 418                                 clocks = <&nic_clk>;
 419                                 clock-names = "spi_clk";
 420                                 atmel,fifo-size = <32>;
 421                                 #address-cells = <1>;
 422                                 #size-cells = <0>;
 423                                 status = "disabled";
 424                         };
 425
 426                         i2c4: i2c@600 {
 427                                 compatible = "microchip,sam9x60-i2c";
 428                                 reg = <0x600 0x200>;
 429                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
 430                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
 431                                        <&dma0 AT91_XDMAC_DT_PERID(10)>;
 432                                 dma-names = "tx", "rx";
 433                                 clocks = <&nic_clk>;
 434                                 #address-cells = <1>;
 435                                 #size-cells = <0>;
 436                                 status = "disabled";
 437                         };
 438                 };
 439
 440                 timer0: timer@e008c000 {
 441                         compatible = "snps,dw-apb-timer";
 442                         reg = <0xe008c000 0x400>;
 443                         clocks = <&nic_clk>;
 444                         clock-names = "timer";
 445                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 446                 };
 447
 448                 watchdog: watchdog@e0090000 {
 449                         compatible = "snps,dw-wdt";
 450                         reg = <0xe0090000 0x1000>;
 451                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 452                         clocks = <&nic_clk>;
 453                         status = "disabled";
 454                 };
 455
 456                 cpu_ctrl: syscon@e00c0000 {
 457                         compatible = "microchip,lan966x-cpu-syscon", "syscon";
 458                         reg = <0xe00c0000 0x350>;
 459                 };
 460
 461                 can0: can@e081c000 {
 462                         compatible = "bosch,m_can";
 463                         reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
 464                         reg-names = "m_can", "message_ram";
 465                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 466                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 467                         interrupt-names = "int0", "int1";
 468                         clocks = <&clks GCK_ID_MCAN0>, <&clks GCK_ID_MCAN0>;
 469                         clock-names = "hclk", "cclk";
 470                         assigned-clocks = <&clks GCK_ID_MCAN0>;
 471                         assigned-clock-rates = <40000000>;
 472                         bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
 473                         status = "disabled";
 474                 };
 475
 476                 reset: reset-controller@e200400c {
 477                         compatible = "microchip,lan966x-switch-reset";
 478                         reg = <0xe200400c 0x4>;
 479                         reg-names = "gcb";
 480                         #reset-cells = <1>;
 481                         cpu-syscon = <&cpu_ctrl>;
 482                 };
 483
 484                 gpio: pinctrl@e2004064 {
 485                         compatible = "microchip,lan966x-pinctrl";
 486                         reg = <0xe2004064 0xb4>,
 487                             <0xe2010024 0x138>;
 488                         resets = <&reset 0>;
 489                         reset-names = "switch";
 490                         gpio-controller;
 491                         #gpio-cells = <2>;
 492                         gpio-ranges = <&gpio 0 0 78>;
 493                         interrupt-controller;
 494                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 495                         #interrupt-cells = <2>;
 496                 };
 497
 498                 mdio0: mdio@e2004118 {
 499                         compatible = "microchip,lan966x-miim";
 500                         #address-cells = <1>;
 501                         #size-cells = <0>;
 502                         reg = <0xe2004118 0x24>;
 503                         clocks = <&sys_clk>;
 504                         status = "disabled";
 505                 };
 506
 507                 mdio1: mdio@e200413c {
 508                         compatible = "microchip,lan966x-miim";
 509                         #address-cells = <1>;
 510                         #size-cells = <0>;
 511                         reg = <0xe200413c 0x24>,
 512                               <0xe2010020 0x4>;
 513                         clocks = <&sys_clk>;
 514                         status = "disabled";
 515
 516                         phy0: ethernet-phy@1 {
 517                                 reg = <1>;
 518                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 519                                 status = "disabled";
 520                         };
 521
 522                         phy1: ethernet-phy@2 {
 523                                 reg = <2>;
 524                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 525                                 status = "disabled";
 526                         };
 527                 };
 528
 529                 sgpio: gpio@e2004190 {
 530                         compatible = "microchip,sparx5-sgpio";
 531                         reg = <0xe2004190 0x118>;
 532                         clocks = <&sys_clk>;
 533                         resets = <&reset 0>;
 534                         reset-names = "switch";
 535                         #address-cells = <1>;
 536                         #size-cells = <0>;
 537                         status = "disabled";
 538
 539                         sgpio_in: gpio@0 {
 540                                 compatible = "microchip,sparx5-sgpio-bank";
 541                                 reg = <0>;
 542                                 gpio-controller;
 543                                 #gpio-cells = <3>;
 544                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 545                                 interrupt-controller;
 546                                 #interrupt-cells = <3>;
 547                         };
 548
 549                         sgpio_out: gpio@1 {
 550                                 compatible = "microchip,sparx5-sgpio-bank";
 551                                 reg = <1>;
 552                                 gpio-controller;
 553                                 #gpio-cells = <3>;
 554                         };
 555                 };
 556
 557                 hwmon: hwmon@e2010180 {
 558                         compatible = "microchip,lan9668-hwmon";
 559                         reg = <0xe2010180 0xc>,
 560                               <0xe20042a8 0xc>;
 561                         reg-names = "pvt", "fan";
 562                         clocks = <&sys_clk>;
 563                 };
 564
 565                 serdes: serdes@e202c000 {
 566                         compatible = "microchip,lan966x-serdes";
 567                         reg = <0xe202c000 0x9c>,
 568                               <0xe2004010 0x4>;
 569                         #phy-cells = <2>;
 570                         status = "disabled";
 571                 };
 572
 573                 gic: interrupt-controller@e8c11000 {
 574                         compatible = "arm,gic-400", "arm,cortex-a7-gic";
 575                         #interrupt-cells = <3>;
 576                         interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 577                         interrupt-controller;
 578                         reg = <0xe8c11000 0x1000>,
 579                               <0xe8c12000 0x2000>,
 580                               <0xe8c14000 0x2000>,
 581                               <0xe8c16000 0x2000>;
 582                 };
 583         };
 584 };