1 // SPDX-License-Identifier: GPL-2.0
3 * Keystone 2 Kepler/Hawking EVM device tree
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
9 #include "keystone.dtsi"
10 #include "keystone-k2hk.dtsi"
13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
14 model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
23 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
30 compatible = "gpio-leds";
32 label = "keystone:green:debug1";
33 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
37 label = "keystone:red:debug1";
38 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
42 label = "keystone:blue:debug2";
43 gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
47 label = "keystone:blue:debug3";
48 gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
55 refclksys: refclksys {
57 compatible = "fixed-clock";
58 clock-frequency = <122880000>;
59 clock-output-names = "refclk-sys";
62 refclkpass: refclkpass {
64 compatible = "fixed-clock";
65 clock-frequency = <122880000>;
66 clock-output-names = "refclk-pass";
69 refclkarm: refclkarm {
71 compatible = "fixed-clock";
72 clock-frequency = <125000000>;
73 clock-output-names = "refclk-arm";
76 refclkddr3a: refclkddr3a {
78 compatible = "fixed-clock";
79 clock-frequency = <100000000>;
80 clock-output-names = "refclk-ddr3a";
83 refclkddr3b: refclkddr3b {
85 compatible = "fixed-clock";
86 clock-frequency = <100000000>;
87 clock-output-names = "refclk-ddr3b";
106 #address-cells = <2>;
111 ti,cs-chipselect = <0>;
112 /* all timings in nanoseconds */
113 ti,cs-min-turnaround-ns = <12>;
114 ti,cs-read-hold-ns = <6>;
115 ti,cs-read-strobe-ns = <23>;
116 ti,cs-read-setup-ns = <9>;
117 ti,cs-write-hold-ns = <8>;
118 ti,cs-write-strobe-ns = <23>;
119 ti,cs-write-setup-ns = <8>;
122 compatible = "ti,keystone-nand","ti,davinci-nand";
123 #address-cells = <1>;
128 ti,davinci-chipselect = <0>;
129 ti,davinci-mask-ale = <0x2000>;
130 ti,davinci-mask-cle = <0x4000>;
131 ti,davinci-mask-chipsel = <0>;
132 nand-ecc-mode = "hw";
133 ti,davinci-ecc-bits = <4>;
138 reg = <0x0 0x100000>;
144 reg = <0x100000 0x80000>;
150 reg = <0x180000 0x1fe80000>;
158 compatible = "atmel,24c1024";
164 nor_flash: n25q128a11@0 {
165 #address-cells = <1>;
167 compatible = "Micron,n25q128a11";
168 spi-max-frequency = <54000000>;
173 label = "u-boot-spl";
180 reg = <0x80000 0xf80000>;
187 ethphy0: ethernet-phy@0 {
188 compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
192 ethphy1: ethernet-phy@1 {
193 compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
199 memory-region = <&dsp_common_memory>;
204 memory-region = <&dsp_common_memory>;
209 memory-region = <&dsp_common_memory>;
214 memory-region = <&dsp_common_memory>;
219 memory-region = <&dsp_common_memory>;
224 memory-region = <&dsp_common_memory>;
229 memory-region = <&dsp_common_memory>;
234 memory-region = <&dsp_common_memory>;