arch/arm/boot/dts/imx7d-remarkable2.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
   4  * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
   5  *
   6  */
   7
   8 /dts-v1/;
   9
  10 #include "imx7d.dtsi"
  11
  12 / {
  13         model = "reMarkable 2.0";
  14         compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
  15
  16         chosen {
  17                 stdout-path = &uart6;
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x40000000>;
  23         };
  24
  25         reg_brcm: regulator-brcm {
  26                 compatible = "regulator-fixed";
  27                 regulator-name = "brcm_reg";
  28                 regulator-min-microvolt = <3300000>;
  29                 regulator-max-microvolt = <3300000>;
  30                 pinctrl-names = "default";
  31                 pinctrl-0 = <&pinctrl_brcm_reg>;
  32                 gpio = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  33                 enable-active-high;
  34                 startup-delay-us = <150>;
  35         };
  36
  37         reg_digitizer: regulator-digitizer {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "VDD_3V3_DIGITIZER";
  40                 regulator-min-microvolt = <3300000>;
  41                 regulator-max-microvolt = <3300000>;
  42                 pinctrl-names = "default", "sleep";
  43                 pinctrl-0 = <&pinctrl_digitizer_reg>;
  44                 pinctrl-1 = <&pinctrl_digitizer_reg>;
  45                 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
  46                 enable-active-high;
  47                 startup-delay-us = <100000>; /* 100 ms */
  48         };
  49
  50         wifi_pwrseq: wifi_pwrseq {
  51                 compatible = "mmc-pwrseq-simple";
  52                 pinctrl-names = "default";
  53                 pinctrl-0 = <&pinctrl_wifi>;
  54                 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  55                 clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
  56                 clock-names = "ext_clock";
  57         };
  58 };
  59
  60 &clks {
  61         assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
  62                           <&clks IMX7D_CLKO2_ROOT_DIV>;
  63         assigned-clock-parents = <&clks IMX7D_CKIL>;
  64         assigned-clock-rates = <0>, <32768>;
  65 };
  66
  67 &i2c1 {
  68         clock-frequency = <400000>;
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&pinctrl_i2c1>;
  71         status = "okay";
  72
  73         wacom_digitizer: digitizer@9 {
  74                 compatible = "hid-over-i2c";
  75                 reg = <0x09>;
  76                 hid-descr-addr = <0x01>;
  77                 pinctrl-names = "default";
  78                 pinctrl-0 = <&pinctrl_wacom>;
  79                 interrupt-parent = <&gpio1>;
  80                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  81                 touchscreen-inverted-x;
  82                 touchscreen-inverted-y;
  83                 vdd-supply = <&reg_digitizer>;
  84         };
  85 };
  86
  87 &snvs_pwrkey {
  88         status = "okay";
  89 };
  90
  91 &uart1 {
  92         pinctrl-names = "default";
  93         pinctrl-0 = <&pinctrl_uart1>;
  94         assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
  95         assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
  96         status = "okay";
  97 };
  98
  99 &uart6 {
 100         pinctrl-names = "default";
 101         pinctrl-0 = <&pinctrl_uart6>;
 102         assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
 103         assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
 104         status = "okay";
 105 };
 106
 107 &usbotg2 {
 108         srp-disable;
 109         hnp-disable;
 110         status = "okay";
 111 };
 112
 113 &usdhc2 {
 114         #address-cells = <1>;
 115         #size-cells = <0>;
 116         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
 117         pinctrl-0 = <&pinctrl_usdhc2>;
 118         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 119         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 120         mmc-pwrseq = <&wifi_pwrseq>;
 121         vmmc-supply = <&reg_brcm>;
 122         bus-width = <4>;
 123         non-removable;
 124         keep-power-in-suspend;
 125         cap-power-off-card;
 126         status = "okay";
 127
 128         brcmf: bcrmf@1 {
 129                 reg = <1>;
 130                 compatible = "brcm,bcm4329-fmac";
 131         };
 132 };
 133
 134 &usdhc3 {
 135         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
 136         pinctrl-0 = <&pinctrl_usdhc3>;
 137         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 138         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 139         pinctrl-3 = <&pinctrl_usdhc3>;
 140         assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
 141         assigned-clock-rates = <400000000>;
 142         bus-width = <8>;
 143         non-removable;
 144         status = "okay";
 145 };
 146
 147 &wdog1 {
 148         pinctrl-names = "default";
 149         pinctrl-0 = <&pinctrl_wdog>;
 150         fsl,ext-reset-output;
 151 };
 152
 153 &iomuxc_lpsr {
 154         pinctrl_digitizer_reg: digitizerreggrp {
 155                 fsl,pins = <
 156                         /* DIGITIZER_PWR_EN */
 157                         MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6     0x14
 158                 >;
 159         };
 160
 161         pinctrl_wacom: wacomgrp {
 162                 fsl,pins = <
 163                         /*MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5   0x00000014 FWE */
 164                         MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4     0x00000074 /* PDCTB */
 165                         MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1     0x00000034 /* WACOM INT */
 166                         /*MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6   0x00000014 WACOM PWR ENABLE */
 167                         /*MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0   0x00000074 WACOM RESET */
 168                 >;
 169         };
 170 };
 171
 172 &iomuxc {
 173         pinctrl_brcm_reg: brcmreggrp {
 174                 fsl,pins = <
 175                         /* WIFI_PWR_EN */
 176                         MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13       0x14
 177                 >;
 178         };
 179
 180         pinctrl_i2c1: i2c1grp {
 181                 fsl,pins = <
 182                         MX7D_PAD_I2C1_SDA__I2C1_SDA             0x4000007f
 183                         MX7D_PAD_I2C1_SCL__I2C1_SCL             0x4000007f
 184                 >;
 185         };
 186
 187         pinctrl_uart1: uart1grp {
 188                 fsl,pins = <
 189                         MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX    0x79
 190                         MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX    0x79
 191                 >;
 192         };
 193
 194         pinctrl_uart6: uart6grp {
 195                 fsl,pins = <
 196                         MX7D_PAD_EPDC_DATA09__UART6_DCE_TX              0x79
 197                         MX7D_PAD_EPDC_DATA08__UART6_DCE_RX              0x79
 198                 >;
 199         };
 200
 201         pinctrl_usdhc2: usdhc2grp {
 202                 fsl,pins = <
 203                         MX7D_PAD_SD2_CMD__SD2_CMD               0x59
 204                         MX7D_PAD_SD2_CLK__SD2_CLK               0x19
 205                         MX7D_PAD_SD2_DATA0__SD2_DATA0           0x59
 206                         MX7D_PAD_SD2_DATA1__SD2_DATA1           0x59
 207                         MX7D_PAD_SD2_DATA2__SD2_DATA2           0x59
 208                         MX7D_PAD_SD2_DATA3__SD2_DATA3           0x59
 209                 >;
 210         };
 211
 212         pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
 213                 fsl,pins = <
 214                         MX7D_PAD_SD2_CMD__SD2_CMD               0x5a
 215                         MX7D_PAD_SD2_CLK__SD2_CLK               0x1a
 216                         MX7D_PAD_SD2_DATA0__SD2_DATA0           0x5a
 217                         MX7D_PAD_SD2_DATA1__SD2_DATA1           0x5a
 218                         MX7D_PAD_SD2_DATA2__SD2_DATA2           0x5a
 219                         MX7D_PAD_SD2_DATA3__SD2_DATA3           0x5a
 220                 >;
 221         };
 222
 223         pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
 224                 fsl,pins = <
 225                         MX7D_PAD_SD2_CMD__SD2_CMD               0x5b
 226                         MX7D_PAD_SD2_CLK__SD2_CLK               0x1b
 227                         MX7D_PAD_SD2_DATA0__SD2_DATA0           0x5b
 228                         MX7D_PAD_SD2_DATA1__SD2_DATA1           0x5b
 229                         MX7D_PAD_SD2_DATA2__SD2_DATA2           0x5b
 230                         MX7D_PAD_SD2_DATA3__SD2_DATA3           0x5b
 231                 >;
 232         };
 233
 234         pinctrl_usdhc3: usdhc3grp {
 235                 fsl,pins = <
 236                         MX7D_PAD_SD3_CMD__SD3_CMD               0x59
 237                         MX7D_PAD_SD3_CLK__SD3_CLK               0x19
 238                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
 239                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
 240                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
 241                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
 242                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
 243                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
 244                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
 245                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
 246                         MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
 247                 >;
 248         };
 249
 250         pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
 251                 fsl,pins = <
 252                         MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
 253                         MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
 254                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
 255                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
 256                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
 257                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
 258                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
 259                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
 260                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
 261                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
 262                         MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1a
 263                 >;
 264         };
 265
 266         pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
 267                 fsl,pins = <
 268                         MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
 269                         MX7D_PAD_SD3_CLK__SD3_CLK               0x1b
 270                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
 271                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
 272                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
 273                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
 274                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
 275                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
 276                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
 277                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
 278                         MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
 279                 >;
 280         };
 281
 282         pinctrl_wdog: wdoggrp {
 283                 fsl,pins = <
 284                         MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY      0x74
 285                 >;
 286         };
 287
 288         pinctrl_wifi: wifigrp {
 289                 fsl,pins = <
 290                         /* WiFi Reg On */
 291                         MX7D_PAD_SD2_CD_B__GPIO5_IO9            0x00000014
 292                         /* WiFi Sleep 32k */
 293                         MX7D_PAD_SD1_WP__CCM_CLKO2              0x00000014
 294                 >;
 295         };
 296 };