arch/arm/boot/dts/imx7-tqma7.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR X11
   2 /*
   3  * Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB.
   4  *
   5  * Copyright (C) 2016 TQ-Systems GmbH
   6  * Author: Markus Niebel <Markus.Niebel@tq-group.com>
   7  * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
   8  */
   9
  10 / {
  11         memory@80000000 {
  12                 device_type = "memory";
  13                 /* 512 MB - default configuration */
  14                 reg = <0x80000000 0x20000000>;
  15         };
  16 };
  17
  18 &cpu0 {
  19         cpu-supply = <&sw1a_reg>;
  20 };
  21
  22 &gpio2 {
  23         /* Configured as pullup by QSPI pin group */
  24         qspi-reset-hog {
  25                 gpio-hog;
  26                 gpios = <4 GPIO_ACTIVE_LOW>;
  27                 input;
  28                 line-name = "qspi-reset";
  29         };
  30 };
  31
  32 &i2c1 {
  33         pinctrl-names = "default";
  34         pinctrl-0 = <&pinctrl_i2c1>;
  35         clock-frequency = <100000>;
  36         status = "okay";
  37
  38         pfuze3000: pmic@8 {
  39                 pinctrl-names = "default";
  40                 pinctrl-0 = <&pinctrl_pmic1>;
  41                 compatible = "fsl,pfuze3000";
  42                 reg = <0x08>;
  43
  44                 regulators {
  45                         sw1a_reg: sw1a {
  46                                 regulator-min-microvolt = <700000>;
  47                                 regulator-max-microvolt = <3300000>;
  48                                 regulator-boot-on;
  49                                 regulator-always-on;
  50                                 regulator-ramp-delay = <6250>;
  51                         };
  52
  53                         /* use sw1c_reg to align with pfuze100/pfuze200 */
  54                         sw1c_reg: sw1b {
  55                                 regulator-min-microvolt = <700000>;
  56                                 regulator-max-microvolt = <1475000>;
  57                                 regulator-boot-on;
  58                                 regulator-always-on;
  59                                 regulator-ramp-delay = <6250>;
  60                         };
  61
  62                         sw2_reg: sw2 {
  63                                 regulator-min-microvolt = <1500000>;
  64                                 regulator-max-microvolt = <1850000>;
  65                                 regulator-boot-on;
  66                                 regulator-always-on;
  67                         };
  68
  69                         sw3a_reg: sw3 {
  70                                 regulator-min-microvolt = <900000>;
  71                                 regulator-max-microvolt = <1650000>;
  72                                 regulator-boot-on;
  73                                 regulator-always-on;
  74                         };
  75
  76                         swbst_reg: swbst {
  77                                 regulator-min-microvolt = <5000000>;
  78                                 regulator-max-microvolt = <5150000>;
  79                         };
  80
  81                         snvs_reg: vsnvs {
  82                                 regulator-min-microvolt = <1000000>;
  83                                 regulator-max-microvolt = <3000000>;
  84                                 regulator-boot-on;
  85                                 regulator-always-on;
  86                         };
  87
  88                         vref_reg: vrefddr {
  89                                 regulator-boot-on;
  90                                 regulator-always-on;
  91                         };
  92
  93                         vgen1_reg: vldo1 {
  94                                 regulator-min-microvolt = <1800000>;
  95                                 regulator-max-microvolt = <3300000>;
  96                                 regulator-always-on;
  97                         };
  98
  99                         vgen2_reg: vldo2 {
 100                                 regulator-min-microvolt = <800000>;
 101                                 regulator-max-microvolt = <1550000>;
 102                                 regulator-always-on;
 103                         };
 104
 105                         vgen3_reg: vccsd {
 106                                 regulator-min-microvolt = <2850000>;
 107                                 regulator-max-microvolt = <3300000>;
 108                                 regulator-always-on;
 109                         };
 110
 111                         vgen4_reg: v33 {
 112                                 regulator-min-microvolt = <2850000>;
 113                                 regulator-max-microvolt = <3300000>;
 114                                 regulator-always-on;
 115                         };
 116
 117                         vgen5_reg: vldo3 {
 118                                 regulator-min-microvolt = <1800000>;
 119                                 regulator-max-microvolt = <3300000>;
 120                                 regulator-always-on;
 121                         };
 122
 123                         vgen6_reg: vldo4 {
 124                                 regulator-min-microvolt = <1800000>;
 125                                 regulator-max-microvolt = <3300000>;
 126                                 regulator-always-on;
 127                         };
 128                 };
 129         };
 130
 131         /* NXP SE97BTP with temperature sensor + eeprom */
 132         se97b: temperature-sensor-eeprom@1e {
 133                 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
 134                 reg = <0x1e>;
 135                 status = "okay";
 136         };
 137
 138         /* ST M24C64 */
 139         m24c64: eeprom@50 {
 140                 compatible = "atmel,24c64";
 141                 reg = <0x50>;
 142                 pagesize = <32>;
 143                 status = "okay";
 144         };
 145
 146         at24c02: eeprom@56 {
 147                 compatible = "atmel,24c02";
 148                 reg = <0x56>;
 149                 pagesize = <16>;
 150                 status = "okay";
 151         };
 152
 153         ds1339: rtc@68 {
 154                 compatible = "dallas,ds1339";
 155                 reg = <0x68>;
 156         };
 157 };
 158
 159 &iomuxc {
 160         pinctrl_i2c1: i2c1grp {
 161                 fsl,pins = <
 162                         MX7D_PAD_I2C1_SDA__I2C1_SDA     0x40000078
 163                         MX7D_PAD_I2C1_SCL__I2C1_SCL     0x40000078
 164                 >;
 165         };
 166
 167         pinctrl_pmic1: pmic1grp {
 168                 fsl,pins = <
 169                         MX7D_PAD_SD2_RESET_B__GPIO5_IO11        0x4000005C
 170                 >;
 171         };
 172
 173         pinctrl_qspi: qspigrp {
 174                 fsl,pins = <
 175                         MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0      0x5A
 176                         MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1      0x5A
 177                         MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2      0x5A
 178                         MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3      0x5A
 179                         MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK       0x11
 180                         MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B      0x54
 181                         MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B      0x54
 182                 >;
 183         };
 184
 185         pinctrl_qspi_reset: qspi_resetgrp {
 186                 fsl,pins = <
 187                         /* #QSPI_RESET */
 188                         MX7D_PAD_EPDC_DATA04__GPIO2_IO4         0x52
 189                 >;
 190         };
 191
 192         pinctrl_usdhc3: usdhc3grp {
 193                 fsl,pins = <
 194                         MX7D_PAD_SD3_CMD__SD3_CMD               0x59
 195                         MX7D_PAD_SD3_CLK__SD3_CLK               0x56
 196                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
 197                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
 198                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
 199                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
 200                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
 201                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
 202                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
 203                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
 204                         MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
 205                 >;
 206         };
 207
 208         pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
 209                 fsl,pins = <
 210                         MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
 211                         MX7D_PAD_SD3_CLK__SD3_CLK               0x51
 212                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
 213                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
 214                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
 215                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
 216                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
 217                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
 218                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
 219                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
 220                         MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1a
 221                 >;
 222         };
 223
 224         pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
 225                 fsl,pins = <
 226                         MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
 227                         MX7D_PAD_SD3_CLK__SD3_CLK               0x51
 228                         MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
 229                         MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
 230                         MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
 231                         MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
 232                         MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
 233                         MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
 234                         MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
 235                         MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
 236                         MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
 237                 >;
 238         };
 239 };
 240
 241 &iomuxc_lpsr {
 242         pinctrl_wdog1: wdog1grp {
 243                 fsl,pins = <
 244                         MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B  0x30
 245                 >;
 246         };
 247 };
 248
 249 &qspi {
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>;
 252         status = "okay";
 253
 254         flash0: flash@0 {
 255                 compatible = "jedec,spi-nor";
 256                 reg = <0>;
 257                 spi-max-frequency = <29000000>;
 258                 spi-rx-bus-width = <4>;
 259                 spi-tx-bus-width = <4>;
 260         };
 261 };
 262
 263 &sdma {
 264         status = "okay";
 265 };
 266
 267 &usdhc3 {
 268         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 269         pinctrl-0 = <&pinctrl_usdhc3>;
 270         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 271         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 272         assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
 273         assigned-clock-rates = <400000000>;
 274         bus-width = <8>;
 275         non-removable;
 276         vmmc-supply = <&vgen4_reg>;
 277         vqmmc-supply = <&sw2_reg>;
 278         status = "okay";
 279 };
 280
 281 &wdog1 {
 282         pinctrl-names = "default";
 283         pinctrl-0 = <&pinctrl_wdog1>;
 284         /*
 285          * Errata e10574:
 286          * WDOG reset needs to run with WDOG_RESET_B signal enabled.
 287          * X1-51 (WDOG1#) signal needs carrier board handling to reset
 288          * TQMa7 on X1-22 (RESET_IN#).
 289          */
 290         fsl,ext-reset-output;
 291         status = "okay";
 292 };