1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017 exceet electronics GmbH
4 * Copyright (C) 2018 Kontron Electronics GmbH
5 * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org>
8 #include <dt-bindings/gpio/gpio.h>
16 reg = <0x80000000 0x10000000>;
17 device_type = "memory";
22 cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_ecspi2>;
28 compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
29 spi-max-frequency = <50000000>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
38 phy-handle = <ðphy1>;
45 ethphy1: ethernet-phy@1 {
47 micrel,led-mode = <0>;
48 clocks = <&clks IMX6UL_CLK_ENET_REF>;
49 clock-names = "rmii-ref";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_qspi>;
67 compatible = "spi-nand";
68 spi-max-frequency = <104000000>;
69 spi-tx-bus-width = <4>;
70 spi-rx-bus-width = <4>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_wdog>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_reset_out>;
86 pinctrl_ecspi2: ecspi2grp {
88 MX6UL_PAD_CSI_DATA03__ECSPI2_MISO 0x100b1
89 MX6UL_PAD_CSI_DATA02__ECSPI2_MOSI 0x100b1
90 MX6UL_PAD_CSI_DATA00__ECSPI2_SCLK 0x100b1
91 MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x100b1
95 pinctrl_enet1: enet1grp {
97 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
98 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
99 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
100 MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
101 MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
102 MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
103 MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
104 MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b009
108 pinctrl_enet1_mdio: enet1mdiogrp {
110 MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
111 MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
115 pinctrl_qspi: qspigrp {
117 MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1
118 MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
119 MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1
120 MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1
121 MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1
122 MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
126 pinctrl_reset_out: rstoutgrp {
128 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
132 pinctrl_wdog: wdoggrp {
134 MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x18b0