1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017 exceet electronics GmbH
4 * Copyright (C) 2018 Kontron Electronics GmbH
5 * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org>
10 #include "imx6ul-kontron-n6310-som.dtsi"
13 model = "Kontron N6310 S";
14 compatible = "kontron,imx6ul-n6310-s", "kontron,imx6ul-n6310-som",
18 compatible = "gpio-leds";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_leds>;
24 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
25 default-state = "off";
26 linux,default-trigger = "heartbeat";
31 gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
32 default-state = "off";
37 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
38 default-state = "off";
43 compatible = "pwm-beeper";
44 pwms = <&pwm8 0 5000>;
47 reg_3v3: regulator-3v3 {
48 compatible = "regulator-fixed";
49 regulator-name = "3v3";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
54 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
55 compatible = "regulator-fixed";
56 regulator-name = "usb_otg1_vbus";
57 regulator-min-microvolt = <5000000>;
58 regulator-max-microvolt = <5000000>;
59 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
63 reg_vref_adc: regulator-vref-adc {
64 compatible = "regulator-fixed";
65 regulator-name = "vref-adc";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_adc1>;
75 vref-supply = <®_vref_adc>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_flexcan2>;
86 cs-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_ecspi1>;
92 compatible = "anvo,anv32e61w", "atmel,at25";
94 spi-max-frequency = <20000000>;
104 pinctrl-0 = <&pinctrl_enet1>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
112 phy-handle = <ðphy2>;
116 #address-cells = <1>;
119 ethphy1: ethernet-phy@1 {
121 micrel,led-mode = <0>;
122 clocks = <&clks IMX6UL_CLK_ENET_REF>;
123 clock-names = "rmii-ref";
126 ethphy2: ethernet-phy@2 {
128 micrel,led-mode = <0>;
129 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
130 clock-names = "rmii-ref";
136 clock-frequency = <100000>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_i2c1>;
143 clock-frequency = <100000>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_i2c4>;
149 compatible = "epson,rx8900";
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_pwm8>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_uart1>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_uart2>;
169 linux,rs485-enabled-at-boot-time;
171 rs485-rts-active-low;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_uart3>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_uart4>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_usbotg1>;
196 vbus-supply = <®_usb_otg1_vbus>;
202 disable-over-current;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_usdhc1>;
209 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
210 keep-power-in-suspend;
212 vmmc-supply = <®_3v3>;
213 voltage-ranges = <3300 3300>;
219 pinctrl-names = "default", "state_100mhz", "state_200mhz";
220 pinctrl-0 = <&pinctrl_usdhc2>;
221 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
222 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
224 keep-power-in-suspend;
226 vmmc-supply = <®_3v3>;
227 voltage-ranges = <3300 3300>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_wdog>;
235 fsl,ext-reset-output;
240 pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
242 pinctrl_adc1: adc1grp {
244 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
245 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
246 MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0xb0
251 pinctrl_ecspi1: ecspi1grp {
253 MX6UL_PAD_CSI_DATA07__ECSPI1_MISO 0x100b1
254 MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x100b1
255 MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK 0x100b1
256 MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x100b1 /* ECSPI1-CS1 */
260 pinctrl_enet2: enet2grp {
262 MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
263 MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
264 MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
265 MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
266 MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
267 MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
268 MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
269 MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b009
273 pinctrl_enet2_mdio: enet2mdiogrp {
275 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
276 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
280 pinctrl_flexcan2: flexcan2grp{
282 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
283 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
287 pinctrl_gpio: gpiogrp {
289 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
290 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0 /* DIN1 */
291 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b0b0 /* DOUT2 */
292 MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0 /* DIN2 */
296 pinctrl_gpio_leds: gpioledsgrp {
298 MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b0b0 /* LED H14 */
299 MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0 /* LED H15 */
300 MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 /* LED H16 */
304 pinctrl_i2c1: i2c1grp {
306 MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
307 MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
311 pinctrl_i2c4: i2c4grp {
313 MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001f8b0
314 MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001f8b0
318 pinctrl_pwm8: pwm8grp {
320 MX6UL_PAD_CSI_HSYNC__PWM8_OUT 0x110b0
324 pinctrl_uart1: uart1grp {
326 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
327 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
331 pinctrl_uart2: uart2grp {
333 MX6UL_PAD_NAND_DATA04__UART2_DCE_TX 0x1b0b1
334 MX6UL_PAD_NAND_DATA05__UART2_DCE_RX 0x1b0b1
335 MX6UL_PAD_NAND_DATA06__UART2_DCE_CTS 0x1b0b1
337 * mux unused RTS to make sure it doesn't cause
338 * any interrupts when it is undefined
340 MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x1b0b1
344 pinctrl_uart3: uart3grp {
346 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
347 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
348 MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
349 MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
353 pinctrl_uart4: uart4grp {
355 MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1
356 MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1
360 pinctrl_usbotg1: usbotg1 {
362 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1b0b0
366 pinctrl_usdhc1: usdhc1grp {
368 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
369 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
370 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
371 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
372 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
373 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
374 MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x100b1 /* SD1_CD */
378 pinctrl_usdhc2: usdhc2grp {
380 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
381 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
382 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
383 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
384 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
385 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
389 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
391 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
392 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
393 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
394 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
395 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
396 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
400 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
402 MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
403 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
404 MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
405 MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
406 MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
407 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
411 pinctrl_wdog: wdoggrp {
413 MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0