arch/arm/boot/dts/imx6sl-tolino-vision5.dts

   1 // SPDX-License-Identifier: (GPL-2.0)
   2 /*
   3  * Device tree for the Tolino Vision 5 ebook reader
   4  *
   5  * Name on mainboard is: 37NB-E70K0M+6A3
   6  * Serials start with: E70K02 (a number also seen in
   7  * vendor kernel sources)
   8  *
   9  * This mainboard seems to be equipped with different SoCs.
  10  * In the Tolino Vision 5 ebook reader it is a i.MX6SL
  11  *
  12  * Copyright 2021 Andreas Kemnade
  13  * based on works
  14  * Copyright 2016 Freescale Semiconductor, Inc.
  15  */
  16
  17 /dts-v1/;
  18
  19 #include <dt-bindings/input/input.h>
  20 #include <dt-bindings/gpio/gpio.h>
  21 #include "imx6sl.dtsi"
  22 #include "e70k02.dtsi"
  23
  24 / {
  25         model = "Tolino Vision 5";
  26         compatible = "kobo,tolino-vision5", "fsl,imx6sl";
  27 };
  28
  29 &gpio_keys {
  30         pinctrl-names = "default";
  31         pinctrl-0 = <&pinctrl_gpio_keys>;
  32 };
  33
  34 &i2c1 {
  35         pinctrl-names = "default","sleep";
  36         pinctrl-0 = <&pinctrl_i2c1>;
  37         pinctrl-1 = <&pinctrl_i2c1_sleep>;
  38 };
  39
  40 &i2c2 {
  41         pinctrl-names = "default","sleep";
  42         pinctrl-0 = <&pinctrl_i2c2>;
  43         pinctrl-1 = <&pinctrl_i2c2_sleep>;
  44 };
  45
  46 &i2c3 {
  47         pinctrl-names = "default";
  48         pinctrl-0 = <&pinctrl_i2c3>;
  49 };
  50
  51 &iomuxc {
  52         pinctrl-names = "default";
  53         pinctrl-0 = <&pinctrl_hog>;
  54
  55         pinctrl_gpio_keys: gpio-keysgrp {
  56                 fsl,pins = <
  57                         MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25        0x17059 /* PWR_SW */
  58                         MX6SL_PAD_FEC_MDC__GPIO4_IO23   0x17059 /* HALL_EN */
  59                         MX6SL_PAD_KEY_COL4__GPIO4_IO00          0x17059 /* PAGE_UP */
  60                         MX6SL_PAD_KEY_COL5__GPIO4_IO02          0x17059 /* PAGE_DOWN */
  61                 >;
  62         };
  63
  64         pinctrl_hog: hoggrp {
  65                 fsl,pins = <
  66                         MX6SL_PAD_LCD_DAT1__GPIO2_IO21  0x79
  67                         MX6SL_PAD_LCD_DAT4__GPIO2_IO24  0x79
  68                         MX6SL_PAD_LCD_DAT5__GPIO2_IO25  0x79
  69                         MX6SL_PAD_LCD_DAT6__GPIO2_IO26  0x79
  70                         MX6SL_PAD_LCD_DAT7__GPIO2_IO27  0x79
  71                         MX6SL_PAD_LCD_DAT8__GPIO2_IO28  0x79
  72                         MX6SL_PAD_LCD_DAT9__GPIO2_IO29  0x79
  73                         MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79
  74                         MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79
  75                         MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79
  76                         MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79
  77                         MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79
  78                         MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79
  79                         MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79
  80                         MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79
  81                         MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79
  82                         MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79
  83                         MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79
  84                         MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79
  85                         MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79
  86                         MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79
  87                         MX6SL_PAD_LCD_CLK__GPIO2_IO15           0x79
  88                         MX6SL_PAD_LCD_ENABLE__GPIO2_IO16        0x79
  89                         MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79
  90                         MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79
  91                         MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79
  92                         MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21        0x79
  93                         MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26       0x79
  94                         MX6SL_PAD_KEY_COL3__GPIO3_IO30          0x79
  95                         MX6SL_PAD_KEY_ROW7__GPIO4_IO07          0x79
  96                         MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13       0x79
  97                 >;
  98         };
  99
 100         pinctrl_i2c1: i2c1grp {
 101                 fsl,pins = <
 102                         MX6SL_PAD_I2C1_SCL__I2C1_SCL     0x4001f8b1
 103                         MX6SL_PAD_I2C1_SDA__I2C1_SDA     0x4001f8b1
 104                 >;
 105         };
 106
 107         pinctrl_i2c1_sleep: i2c1grp-sleep {
 108                 fsl,pins = <
 109                         MX6SL_PAD_I2C1_SCL__I2C1_SCL     0x400108b1
 110                         MX6SL_PAD_I2C1_SDA__I2C1_SDA     0x400108b1
 111                 >;
 112         };
 113
 114         pinctrl_i2c2: i2c2grp {
 115                 fsl,pins = <
 116                         MX6SL_PAD_I2C2_SCL__I2C2_SCL     0x4001f8b1
 117                         MX6SL_PAD_I2C2_SDA__I2C2_SDA     0x4001f8b1
 118                 >;
 119         };
 120
 121         pinctrl_i2c2_sleep: i2c2grp-sleep {
 122                 fsl,pins = <
 123                         MX6SL_PAD_I2C2_SCL__I2C2_SCL     0x400108b1
 124                         MX6SL_PAD_I2C2_SDA__I2C2_SDA     0x400108b1
 125                 >;
 126         };
 127
 128         pinctrl_i2c3: i2c3grp {
 129                 fsl,pins = <
 130                         MX6SL_PAD_REF_CLK_24M__I2C3_SCL  0x4001f8b1
 131                         MX6SL_PAD_REF_CLK_32K__I2C3_SDA  0x4001f8b1
 132                 >;
 133         };
 134
 135         pinctrl_led: ledgrp {
 136                 fsl,pins = <
 137                         MX6SL_PAD_FEC_RXD0__GPIO4_IO17  0x10059
 138                 >;
 139         };
 140
 141         pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp {
 142                 fsl,pins = <
 143                         MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10             0x10059 /* HWEN */
 144                 >;
 145         };
 146
 147         pinctrl_ricoh_gpio: ricoh-gpiogrp {
 148                 fsl,pins = <
 149                         MX6SL_PAD_FEC_MDIO__GPIO4_IO20          0x1b8b1 /* ricoh619 chg */
 150                         MX6SL_PAD_FEC_RX_ER__GPIO4_IO19         0x1b8b1 /* ricoh619 irq */
 151                         MX6SL_PAD_KEY_COL2__GPIO3_IO28          0x1b8b1 /* ricoh619 bat_low_int */
 152                 >;
 153         };
 154
 155         pinctrl_uart1: uart1grp {
 156                 fsl,pins = <
 157                         MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
 158                         MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
 159                 >;
 160         };
 161
 162         pinctrl_usbotg1: usbotg1grp {
 163                 fsl,pins = <
 164                         MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
 165                 >;
 166         };
 167
 168         pinctrl_usdhc1: usdhc1grp {
 169                 fsl,pins = <
 170                         MX6SL_PAD_SD1_CMD__SD1_CMD      0x17059
 171                         MX6SL_PAD_SD1_CLK__SD1_CLK      0x17059
 172                         MX6SL_PAD_SD1_DAT0__SD1_DATA0   0x17059
 173                         MX6SL_PAD_SD1_DAT1__SD1_DATA1   0x17059
 174                         MX6SL_PAD_SD1_DAT2__SD1_DATA2   0x17059
 175                         MX6SL_PAD_SD1_DAT3__SD1_DATA3   0x17059
 176                         MX6SL_PAD_SD1_DAT4__SD1_DATA4   0x17059
 177                         MX6SL_PAD_SD1_DAT5__SD1_DATA5   0x17059
 178                         MX6SL_PAD_SD1_DAT6__SD1_DATA6   0x17059
 179                         MX6SL_PAD_SD1_DAT7__SD1_DATA7   0x17059
 180                 >;
 181         };
 182
 183         pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
 184                 fsl,pins = <
 185                         MX6SL_PAD_SD1_CMD__SD1_CMD      0x170b9
 186                         MX6SL_PAD_SD1_CLK__SD1_CLK      0x170b9
 187                         MX6SL_PAD_SD1_DAT0__SD1_DATA0   0x170b9
 188                         MX6SL_PAD_SD1_DAT1__SD1_DATA1   0x170b9
 189                         MX6SL_PAD_SD1_DAT2__SD1_DATA2   0x170b9
 190                         MX6SL_PAD_SD1_DAT3__SD1_DATA3   0x170b9
 191                         MX6SL_PAD_SD1_DAT4__SD1_DATA4   0x170b9
 192                         MX6SL_PAD_SD1_DAT5__SD1_DATA5   0x170b9
 193                         MX6SL_PAD_SD1_DAT6__SD1_DATA6   0x170b9
 194                         MX6SL_PAD_SD1_DAT7__SD1_DATA7   0x170b9
 195                 >;
 196         };
 197
 198         pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
 199                 fsl,pins = <
 200                         MX6SL_PAD_SD1_CMD__SD1_CMD      0x170f9
 201                         MX6SL_PAD_SD1_CLK__SD1_CLK      0x170f9
 202                         MX6SL_PAD_SD1_DAT0__SD1_DATA0   0x170f9
 203                         MX6SL_PAD_SD1_DAT1__SD1_DATA1   0x170f9
 204                         MX6SL_PAD_SD1_DAT2__SD1_DATA2   0x170f9
 205                         MX6SL_PAD_SD1_DAT3__SD1_DATA3   0x170f9
 206                         MX6SL_PAD_SD1_DAT4__SD1_DATA4   0x170b9
 207                         MX6SL_PAD_SD1_DAT5__SD1_DATA5   0x170b9
 208                         MX6SL_PAD_SD1_DAT6__SD1_DATA6   0x170b9
 209                         MX6SL_PAD_SD1_DAT7__SD1_DATA7   0x170b9
 210                 >;
 211         };
 212
 213         pinctrl_usdhc1_sleep: usdhc1-sleepgrp {
 214                 fsl,pins = <
 215                         MX6SL_PAD_SD1_CMD__SD1_CMD      0x10059
 216                         MX6SL_PAD_SD1_CLK__SD1_CLK      0x10059
 217                         MX6SL_PAD_SD1_DAT0__SD1_DATA0   0x10059
 218                         MX6SL_PAD_SD1_DAT1__SD1_DATA1   0x10059
 219                         MX6SL_PAD_SD1_DAT2__SD1_DATA2   0x10059
 220                         MX6SL_PAD_SD1_DAT3__SD1_DATA3   0x10059
 221                         MX6SL_PAD_SD1_DAT4__SD1_DATA4   0x10059
 222                         MX6SL_PAD_SD1_DAT5__SD1_DATA5   0x10059
 223                         MX6SL_PAD_SD1_DAT6__SD1_DATA6   0x10059
 224                         MX6SL_PAD_SD1_DAT7__SD1_DATA7   0x10059
 225                 >;
 226         };
 227
 228         pinctrl_usdhc3: usdhc3grp {
 229                 fsl,pins = <
 230                         MX6SL_PAD_SD3_CMD__SD3_CMD      0x11059
 231                         MX6SL_PAD_SD3_CLK__SD3_CLK      0x11059
 232                         MX6SL_PAD_SD3_DAT0__SD3_DATA0   0x11059
 233                         MX6SL_PAD_SD3_DAT1__SD3_DATA1   0x11059
 234                         MX6SL_PAD_SD3_DAT2__SD3_DATA2   0x11059
 235                         MX6SL_PAD_SD3_DAT3__SD3_DATA3   0x11059
 236                 >;
 237         };
 238
 239         pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
 240                 fsl,pins = <
 241                         MX6SL_PAD_SD3_CMD__SD3_CMD      0x170b9
 242                         MX6SL_PAD_SD3_CLK__SD3_CLK      0x170b9
 243                         MX6SL_PAD_SD3_DAT0__SD3_DATA0   0x170b9
 244                         MX6SL_PAD_SD3_DAT1__SD3_DATA1   0x170b9
 245                         MX6SL_PAD_SD3_DAT2__SD3_DATA2   0x170b9
 246                         MX6SL_PAD_SD3_DAT3__SD3_DATA3   0x170b9
 247                 >;
 248         };
 249
 250         pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
 251                 fsl,pins = <
 252                         MX6SL_PAD_SD3_CMD__SD3_CMD      0x170f9
 253                         MX6SL_PAD_SD3_CLK__SD3_CLK      0x170f9
 254                         MX6SL_PAD_SD3_DAT0__SD3_DATA0   0x170f9
 255                         MX6SL_PAD_SD3_DAT1__SD3_DATA1   0x170f9
 256                         MX6SL_PAD_SD3_DAT2__SD3_DATA2   0x170f9
 257                         MX6SL_PAD_SD3_DAT3__SD3_DATA3   0x170f9
 258                 >;
 259         };
 260
 261         pinctrl_usdhc3_sleep: usdhc3-sleepgrp {
 262                 fsl,pins = <
 263                         MX6SL_PAD_SD3_CMD__GPIO5_IO21   0x100c1
 264                         MX6SL_PAD_SD3_CLK__GPIO5_IO18   0x100c1
 265                         MX6SL_PAD_SD3_DAT0__GPIO5_IO19  0x100c1
 266                         MX6SL_PAD_SD3_DAT1__GPIO5_IO20  0x100c1
 267                         MX6SL_PAD_SD3_DAT2__GPIO5_IO16  0x100c1
 268                         MX6SL_PAD_SD3_DAT3__GPIO5_IO17  0x100c1
 269                 >;
 270         };
 271
 272         pinctrl_wifi_power: wifi-powergrp {
 273                 fsl,pins = <
 274                         MX6SL_PAD_SD2_DAT6__GPIO4_IO29  0x10059  /* WIFI_3V3_ON */
 275                 >;
 276         };
 277
 278         pinctrl_wifi_reset: wifi-resetgrp {
 279                 fsl,pins = <
 280                         MX6SL_PAD_SD2_DAT7__GPIO5_IO00  0x10059 /* WIFI_RST */
 281                 >;
 282         };
 283 };
 284
 285 &leds {
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_led>;
 288 };
 289
 290 &lm3630a {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>;
 293 };
 294
 295 &reg_wifi {
 296         pinctrl-names = "default";
 297         pinctrl-0 = <&pinctrl_wifi_power>;
 298 };
 299
 300 &reg_vdd1p1 {
 301         vin-supply = <&dcdc2_reg>;
 302 };
 303
 304 &reg_vdd2p5 {
 305         vin-supply = <&dcdc2_reg>;
 306 };
 307
 308 &reg_arm {
 309         vin-supply = <&dcdc3_reg>;
 310 };
 311
 312 &reg_soc {
 313         vin-supply = <&dcdc1_reg>;
 314 };
 315
 316 &reg_pu {
 317         vin-supply = <&dcdc1_reg>;
 318 };
 319
 320 &ricoh619 {
 321         pinctrl-names = "default";
 322         pinctrl-0 = <&pinctrl_ricoh_gpio>;
 323 };
 324
 325 &uart1 {
 326         pinctrl-names = "default";
 327         pinctrl-0 = <&pinctrl_uart1>;
 328 };
 329
 330 &usdhc1 {
 331         pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
 332         pinctrl-0 = <&pinctrl_usdhc1>;
 333         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
 334         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 335         pinctrl-3 = <&pinctrl_usdhc1_sleep>;
 336 };
 337
 338 &usdhc3 {
 339         pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep";
 340         pinctrl-0 = <&pinctrl_usdhc3>;
 341         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 342         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 343         pinctrl-3 = <&pinctrl_usdhc3_sleep>;
 344 };
 345
 346 &wifi_pwrseq {
 347         pinctrl-names = "default";
 348         pinctrl-0 = <&pinctrl_wifi_reset>;
 349 };