1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Support for Variscite DART-MX6 Module
5 * Copyright 2017 BayLibre, SAS
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/fsl-imx-audmux.h>
14 reg = <0x10000000 0x40000000>;
17 reg_3p3v: regulator-3p3v {
18 compatible = "regulator-fixed";
19 regulator-name = "3P3V";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
25 reg_wl18xx_vmmc: regulator-wl18xx {
26 compatible = "regulator-fixed";
27 regulator-name = "vwl1807";
28 regulator-min-microvolt = <1800000>;
29 regulator-max-microvolt = <1800000>;
30 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
32 startup-delay-us = <70000>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_audmux>;
42 fsl,audmux-port = <1>;
44 (IMX_AUDMUX_V2_PTCR_SYN |
45 IMX_AUDMUX_V2_PTCR_TFSDIR |
46 IMX_AUDMUX_V2_PTCR_TFSEL(2) |
47 IMX_AUDMUX_V2_PTCR_TCLKDIR |
48 IMX_AUDMUX_V2_PTCR_TCSEL(2))
49 IMX_AUDMUX_V2_PDCR_RXDSEL(2)
54 fsl,audmux-port = <2>;
56 IMX_AUDMUX_V2_PTCR_SYN
57 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_flexcan1>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_flexcan2>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_ecspi1>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_enet>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_hdmicec>;
90 ddc-i2c-bus = <&i2c1>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_i2c1>;
101 clock-frequency = <100000>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_i2c2>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_pmic>;
109 compatible = "fsl,pfuze100";
114 regulator-min-microvolt = <300000>;
115 regulator-max-microvolt = <1875000>;
118 regulator-ramp-delay = <6250>;
122 regulator-min-microvolt = <300000>;
123 regulator-max-microvolt = <1875000>;
126 regulator-ramp-delay = <6250>;
130 regulator-min-microvolt = <800000>;
131 regulator-max-microvolt = <3300000>;
137 regulator-min-microvolt = <800000>;
138 regulator-max-microvolt = <3950000>;
144 regulator-min-microvolt = <800000>;
145 regulator-max-microvolt = <3950000>;
151 regulator-min-microvolt = <800000>;
152 regulator-max-microvolt = <3950000>;
156 regulator-min-microvolt = <1200000>;
157 regulator-max-microvolt = <3000000>;
168 regulator-min-microvolt = <2800000>;
169 regulator-max-microvolt = <2800000>;
176 tlv320aic3106: codec@1b {
177 compatible = "ti,tlv320aic3106";
179 #sound-dai-cells = <0>;
180 DRVDD-supply = <®_3p3v>;
181 AVDD-supply = <®_3p3v>;
182 IOVDD-supply = <®_3p3v>;
183 DVDD-supply = <®_3p3v>;
185 gpio-reset = <&gpio5 5 GPIO_ACTIVE_LOW>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_i2c3>;
196 pinctrl_audmux: audmux {
198 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
199 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
200 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
201 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
203 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
209 /* Bluetooth enable */
210 MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1
211 /* Bluetooth Slow Clock */
212 MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
216 pinctrl_ecspi1: ecspi1grp {
218 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
219 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
220 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
222 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
224 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
228 pinctrl_enet: enetgrp {
230 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
231 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
232 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
233 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
234 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
235 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
236 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
237 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
238 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
239 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
240 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
241 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
242 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
243 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
244 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
248 pinctrl_flexcan1: flexcan1grp {
250 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
251 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
255 pinctrl_flexcan2: flexcan2grp {
257 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
258 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
262 pinctrl_hdmicec: hdmicecgrp {
264 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
268 pinctrl_i2c1: i2c1grp {
270 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
271 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
275 pinctrl_i2c2: i2c2grp {
277 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
278 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
282 pinctrl_i2c3: i2c3grp {
284 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
285 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
289 pinctrl_pmic: pmicgrp {
292 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
296 pinctrl_pwm2: pwm2grp {
298 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
302 pinctrl_uart1: uart1grp {
304 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
305 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
309 pinctrl_uart2: uart2grp {
311 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
312 MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
313 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
314 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
318 pinctrl_uart3: uart3grp {
320 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
321 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
322 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
323 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
327 pinctrl_usbotg: usbotggrp {
329 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
333 pinctrl_usdhc1: usdhc1grp {
335 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
336 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
337 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
338 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
339 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
340 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
342 MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x17071
344 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071
348 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
350 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
351 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
352 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
353 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
354 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
355 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
359 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
361 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170F9
362 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100F9
363 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9
364 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9
365 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9
366 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9
370 pinctrl_usdhc2: usdhc2grp {
372 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
373 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
374 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
375 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
376 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
377 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
381 pinctrl_usdhc3: usdhc3grp {
383 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
384 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
385 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
386 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
387 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
388 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
394 fsl,tx-swing-full = <103>;
395 fsl,tx-swing-low = <103>;
396 reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_pwm2>;
407 vin-supply = <&sw1a_reg>;
411 vin-supply = <&sw1c_reg>;
415 vin-supply = <&sw1c_reg>;
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_uart1>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
439 compatible = "ti,wl1835-st";
440 enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_uart3>;
456 vbus-supply = <®_usb_otg_vbus>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_usbotg>;
459 disable-over-current;
464 pinctrl-names = "default", "state_100mhz", "state_200mhz";
465 pinctrl-0 = <&pinctrl_usdhc1>;
466 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
467 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
469 vmmc-supply = <®_wl18xx_vmmc>;
472 keep-power-in-suspend;
474 #address-cells = <1>;
479 compatible = "ti,wl1835";
481 interrupt-parent = <&gpio6>;
482 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
483 ref-clock-frequency = <38400000>;
488 pinctrl-names = "default";
489 pinctrl-0 = <&pinctrl_usdhc2>;
491 keep-power-in-suspend;
497 pinctrl-names = "default";
498 pinctrl-0 = <&pinctrl_usdhc3>;
500 keep-power-in-suspend;