arch/arm/boot/dts/imx6qdl-udoo.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2013 Freescale Semiconductor, Inc.
   4  *
   5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9
  10 / {
  11         aliases {
  12                 backlight = &backlight;
  13                 panelchan = &panelchan;
  14                 panel7 = &panel7;
  15                 touchscreenp7 = &touchscreenp7;
  16         };
  17
  18         chosen {
  19                 stdout-path = &uart2;
  20         };
  21
  22         backlight: backlight {
  23                 compatible = "gpio-backlight";
  24                 gpios = <&gpio1 4 0>;
  25                 default-on;
  26                 status = "disabled";
  27         };
  28
  29         gpio-poweroff {
  30                 compatible = "gpio-poweroff";
  31                 gpios = <&gpio2 4 0>;
  32                 pinctrl-0 = <&pinctrl_power_off>;
  33                 pinctrl-names = "default";
  34         };
  35
  36         memory@10000000 {
  37                 reg = <0x10000000 0x40000000>;
  38         };
  39
  40         panel7: panel7 {
  41                 /*
  42                  * in reality it is a -20t (parallel) model,
  43                  * but with LVDS bridge chip attached,
  44                  * so it is equivalent to -19t model in drive
  45                  * characteristics
  46                  */
  47                 compatible = "urt,umsh-8596md-19t";
  48                 pinctrl-names = "default";
  49                 pinctrl-0 = <&pinctrl_panel>;
  50                 power-supply = <&reg_panel>;
  51                 backlight = <&backlight>;
  52                 status = "disabled";
  53
  54                 port {
  55                         panel_in: endpoint {
  56                                 remote-endpoint = <&lvds0_out>;
  57                         };
  58                 };
  59         };
  60
  61         regulators {
  62                 compatible = "simple-bus";
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65
  66                 reg_usb_h1_vbus: regulator@0 {
  67                         compatible = "regulator-fixed";
  68                         reg = <0>;
  69                         regulator-name = "usb_h1_vbus";
  70                         regulator-min-microvolt = <5000000>;
  71                         regulator-max-microvolt = <5000000>;
  72                         enable-active-high;
  73                         startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
  74                         gpio = <&gpio7 12 0>;
  75                 };
  76
  77                 reg_panel: regulator@1 {
  78                         compatible = "regulator-fixed";
  79                         reg = <1>;
  80                         regulator-name = "lcd_panel";
  81                         enable-active-high;
  82                         gpio = <&gpio1 2 0>;
  83                 };
  84         };
  85
  86         sound {
  87                 compatible = "fsl,imx6q-udoo-ac97",
  88                              "fsl,imx-audio-ac97";
  89                 model = "fsl,imx6q-udoo-ac97";
  90                 audio-cpu = <&ssi1>;
  91                 audio-routing =
  92                         "RX", "Mic Jack",
  93                         "Headphone Jack", "TX";
  94                 mux-int-port = <1>;
  95                 mux-ext-port = <6>;
  96         };
  97 };
  98
  99 &fec {
 100         pinctrl-names = "default";
 101         pinctrl-0 = <&pinctrl_enet>;
 102         phy-mode = "rgmii-id";
 103         status = "okay";
 104 };
 105
 106 &hdmi {
 107         ddc-i2c-bus = <&i2c2>;
 108         status = "okay";
 109 };
 110
 111 &i2c2 {
 112         clock-frequency = <100000>;
 113         pinctrl-names = "default";
 114         pinctrl-0 = <&pinctrl_i2c2>;
 115         status = "okay";
 116 };
 117
 118 &i2c3 {
 119         clock-frequency = <100000>;
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&pinctrl_i2c3>;
 122         status = "okay";
 123
 124         touchscreenp7: touchscreenp7@55 {
 125                 compatible = "sitronix,st1232";
 126                 pinctrl-names = "default";
 127                 pinctrl-0 = <&pinctrl_touchscreenp7>;
 128                 reg = <0x55>;
 129                 interrupt-parent = <&gpio1>;
 130                 interrupts = <13 8>;
 131                 gpios = <&gpio1 15 0>;
 132                 status = "disabled";
 133         };
 134 };
 135
 136 &iomuxc {
 137         imx6q-udoo {
 138                 pinctrl_enet: enetgrp {
 139                         fsl,pins = <
 140                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 141                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 142                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 143                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 144                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 145                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 146                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 147                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 148                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 149                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 150                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 151                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 152                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 153                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 154                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 155                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 156                         >;
 157                 };
 158
 159                 pinctrl_i2c2: i2c2grp {
 160                         fsl,pins = <
 161                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 162                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 163                         >;
 164                 };
 165
 166                 pinctrl_i2c3: i2c3grp {
 167                         fsl,pins = <
 168                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001f8b1
 169                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001f8b1
 170                         >;
 171                 };
 172
 173                 pinctrl_panel: panelgrp {
 174                         fsl,pins = <
 175                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x70
 176                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x70
 177                         >;
 178                 };
 179
 180                 pinctrl_power_off: poweroffgrp {
 181                         fsl,pins = <
 182                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x30
 183                         >;
 184                 };
 185
 186                 pinctrl_touchscreenp7: touchscreenp7grp {
 187                         fsl,pins = <
 188                                 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15         0x70
 189                                 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13         0x1b0b0
 190                         >;
 191                 };
 192
 193                 pinctrl_uart2: uart2grp {
 194                         fsl,pins = <
 195                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 196                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 197                         >;
 198                 };
 199
 200                 pinctrl_usbh: usbhgrp {
 201                         fsl,pins = <
 202                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
 203                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
 204                         >;
 205                 };
 206
 207                 pinctrl_usdhc3: usdhc3grp {
 208                         fsl,pins = <
 209                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 210                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 211                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 212                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 213                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 214                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 215                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x1b0b0
 216                         >;
 217                 };
 218
 219                 pinctrl_ac97_running: ac97running {
 220                         fsl,pins = <
 221                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
 222                                 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x1b0b0
 223                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
 224                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
 225                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 226                         >;
 227                 };
 228
 229                 pinctrl_ac97_warm_reset: ac97warmreset {
 230                         fsl,pins = <
 231                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
 232                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
 233                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
 234                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
 235                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 236                         >;
 237                 };
 238
 239                 pinctrl_ac97_reset: ac97reset {
 240                         fsl,pins = <
 241                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
 242                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
 243                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x13080
 244                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x13080
 245                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 246                         >;
 247                 };
 248         };
 249 };
 250
 251 &ldb {
 252         status = "okay";
 253
 254         panelchan: lvds-channel@0 {
 255                 port@4 {
 256                         reg = <4>;
 257
 258                         lvds0_out: endpoint {
 259                                 remote-endpoint = <&panel_in>;
 260                         };
 261                 };
 262         };
 263 };
 264
 265 &uart2 {
 266         pinctrl-names = "default";
 267         pinctrl-0 = <&pinctrl_uart2>;
 268         status = "okay";
 269 };
 270
 271 &usbh1 {
 272         pinctrl-names = "default";
 273         pinctrl-0 = <&pinctrl_usbh>;
 274         vbus-supply = <&reg_usb_h1_vbus>;
 275         clocks = <&clks IMX6QDL_CLK_CKO>;
 276         status = "okay";
 277 };
 278
 279 &usdhc3 {
 280         pinctrl-names = "default";
 281         pinctrl-0 = <&pinctrl_usdhc3>;
 282         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 283         status = "okay";
 284 };
 285
 286 &audmux {
 287         status = "okay";
 288 };
 289
 290 &ssi1 {
 291         cell-index = <0>;
 292         fsl,mode = "ac97-slave";
 293         pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
 294         pinctrl-0 = <&pinctrl_ac97_running>;
 295         pinctrl-1 = <&pinctrl_ac97_reset>;
 296         pinctrl-2 = <&pinctrl_ac97_warm_reset>;
 297         ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
 298         status = "okay";
 299 };