2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
22 reg = <0x10000000 0x40000000>;
26 compatible = "simple-bus";
30 reg_usb_otg_vbus: regulator@0 {
31 compatible = "regulator-fixed";
33 regulator-name = "usb_otg_vbus";
34 regulator-min-microvolt = <5000000>;
35 regulator-max-microvolt = <5000000>;
38 vin-supply = <&swbst_reg>;
41 reg_usb_h1_vbus: regulator@1 {
42 compatible = "regulator-fixed";
44 regulator-name = "usb_h1_vbus";
45 regulator-min-microvolt = <5000000>;
46 regulator-max-microvolt = <5000000>;
49 vin-supply = <&swbst_reg>;
52 reg_audio: regulator@2 {
53 compatible = "regulator-fixed";
55 regulator-name = "wm8962-supply";
60 reg_pcie: regulator@3 {
61 compatible = "regulator-fixed";
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_pcie_reg>;
65 regulator-name = "MPCIE_3V3";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
75 compatible = "gpio-keys";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_gpio_keys>;
80 label = "Power Button";
81 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_POWER>;
88 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
90 linux,code = <KEY_VOLUMEUP>;
94 label = "Volume Down";
95 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_VOLUMEDOWN>;
102 compatible = "fsl,imx6q-sabresd-wm8962",
103 "fsl,imx-audio-wm8962";
104 model = "wm8962-audio";
105 ssi-controller = <&ssi2>;
106 audio-codec = <&codec>;
108 "Headphone Jack", "HPOUTL",
109 "Headphone Jack", "HPOUTR",
110 "Ext Spk", "SPKOUTL",
111 "Ext Spk", "SPKOUTR",
118 backlight_lvds: backlight-lvds {
119 compatible = "pwm-backlight";
120 pwms = <&pwm1 0 5000000>;
121 brightness-levels = <0 4 8 16 32 64 128 255>;
122 default-brightness-level = <7>;
127 compatible = "gpio-leds";
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_gpio_leds>;
132 gpios = <&gpio1 2 0>;
133 default-state = "on";
138 compatible = "hannstar,hsd100pxn1";
139 backlight = <&backlight_lvds>;
143 remote-endpoint = <&lvds0_out>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_audmux>;
156 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
157 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
158 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
159 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
163 fsl,spi-num-chipselects = <1>;
164 cs-gpios = <&gpio4 9 0>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_ecspi1>;
170 #address-cells = <1>;
172 compatible = "st,m25p32", "jedec,spi-nor";
173 spi-max-frequency = <20000000>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_enet>;
182 phy-reset-gpios = <&gpio1 25 0>;
187 ddc-i2c-bus = <&i2c2>;
192 clock-frequency = <100000>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_i2c1>;
198 compatible = "wlf,wm8962";
200 clocks = <&clks IMX6QDL_CLK_CKO>;
201 DCVDD-supply = <®_audio>;
202 DBVDD-supply = <®_audio>;
203 AVDD-supply = <®_audio>;
204 CPVDD-supply = <®_audio>;
205 MICVDD-supply = <®_audio>;
206 PLLVDD-supply = <®_audio>;
207 SPKVDD1-supply = <®_audio>;
208 SPKVDD2-supply = <®_audio>;
210 0x0000 /* 0:Default */
211 0x0000 /* 1:Default */
212 0x0013 /* 2:FN_DMICCLK */
213 0x0000 /* 3:Default */
214 0x8014 /* 4:FN_DMICCDAT */
215 0x0000 /* 5:Default */
221 clock-frequency = <100000>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_i2c2>;
227 compatible = "fsl,pfuze100";
232 regulator-min-microvolt = <300000>;
233 regulator-max-microvolt = <1875000>;
236 regulator-ramp-delay = <6250>;
240 regulator-min-microvolt = <300000>;
241 regulator-max-microvolt = <1875000>;
244 regulator-ramp-delay = <6250>;
248 regulator-min-microvolt = <800000>;
249 regulator-max-microvolt = <3300000>;
252 regulator-ramp-delay = <6250>;
256 regulator-min-microvolt = <400000>;
257 regulator-max-microvolt = <1975000>;
263 regulator-min-microvolt = <400000>;
264 regulator-max-microvolt = <1975000>;
270 regulator-min-microvolt = <800000>;
271 regulator-max-microvolt = <3300000>;
275 regulator-min-microvolt = <5000000>;
276 regulator-max-microvolt = <5150000>;
280 regulator-min-microvolt = <1000000>;
281 regulator-max-microvolt = <3000000>;
292 regulator-min-microvolt = <800000>;
293 regulator-max-microvolt = <1550000>;
297 regulator-min-microvolt = <800000>;
298 regulator-max-microvolt = <1550000>;
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <3300000>;
307 regulator-min-microvolt = <1800000>;
308 regulator-max-microvolt = <3300000>;
313 regulator-min-microvolt = <1800000>;
314 regulator-max-microvolt = <3300000>;
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <3300000>;
328 clock-frequency = <100000>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_i2c3>;
334 compatible = "eeti,egalax_ts";
336 interrupt-parent = <&gpio6>;
338 wakeup-gpios = <&gpio6 7 0>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_hog>;
347 pinctrl_hog: hoggrp {
349 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
350 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
351 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
352 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
353 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
354 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
355 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
356 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
357 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
361 pinctrl_audmux: audmuxgrp {
363 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
364 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
365 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
366 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
370 pinctrl_ecspi1: ecspi1grp {
372 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
373 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
374 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
375 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
379 pinctrl_enet: enetgrp {
381 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
382 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
383 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
384 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
385 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
386 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
387 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
388 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
389 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
390 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
391 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
392 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
393 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
394 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
395 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
396 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
400 pinctrl_gpio_keys: gpio_keysgrp {
402 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
403 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
404 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
408 pinctrl_i2c1: i2c1grp {
410 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
411 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
415 pinctrl_i2c2: i2c2grp {
417 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
418 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
422 pinctrl_i2c3: i2c3grp {
424 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
425 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
429 pinctrl_pcie: pciegrp {
431 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
435 pinctrl_pcie_reg: pciereggrp {
437 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
441 pinctrl_pwm1: pwm1grp {
443 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
447 pinctrl_uart1: uart1grp {
449 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
450 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
454 pinctrl_usbotg: usbotggrp {
456 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
460 pinctrl_usdhc2: usdhc2grp {
462 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
463 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
464 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
465 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
466 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
467 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
468 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
469 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
470 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
471 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
475 pinctrl_usdhc3: usdhc3grp {
477 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
478 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
479 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
480 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
481 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
482 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
483 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
484 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
485 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
486 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
490 pinctrl_usdhc4: usdhc4grp {
492 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
493 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
494 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
495 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
496 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
497 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
498 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
499 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
500 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
501 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
505 pinctrl_wdog: wdoggrp {
507 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
513 pinctrl_gpio_leds: gpioledsgrp {
515 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
525 fsl,data-mapping = "spwg";
526 fsl,data-width = <18>;
532 lvds0_out: endpoint {
533 remote-endpoint = <&panel_in>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_pcie>;
542 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_pwm1>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_uart1>;
567 vbus-supply = <®_usb_h1_vbus>;
572 vbus-supply = <®_usb_otg_vbus>;
573 pinctrl-names = "default";
574 pinctrl-0 = <&pinctrl_usbotg>;
575 disable-over-current;
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_usdhc2>;
583 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
584 wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&pinctrl_usdhc3>;
592 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
593 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&pinctrl_usdhc4>;
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_wdog>;
613 fsl,ext-reset-output;