1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
8 #include <dt-bindings/clock/imx6qdl-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
18 device_type = "memory";
19 reg = <0x10000000 0x40000000>;
23 compatible = "simple-bus";
27 reg_2p5v: regulator@0 {
28 compatible = "regulator-fixed";
30 regulator-name = "2P5V";
31 regulator-min-microvolt = <2500000>;
32 regulator-max-microvolt = <2500000>;
36 reg_3p3v: regulator@1 {
37 compatible = "regulator-fixed";
39 regulator-name = "3P3V";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
45 reg_usb_otg_vbus: regulator@2 {
46 compatible = "regulator-fixed";
48 regulator-name = "usb_otg_vbus";
49 regulator-min-microvolt = <5000000>;
50 regulator-max-microvolt = <5000000>;
55 reg_can_xcvr: regulator@3 {
56 compatible = "regulator-fixed";
58 regulator-name = "CAN XCVR";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&pinctrl_can_xcvr>;
63 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
66 reg_1p5v: regulator@4 {
67 compatible = "regulator-fixed";
69 regulator-name = "1P5V";
70 regulator-min-microvolt = <1500000>;
71 regulator-max-microvolt = <1500000>;
75 reg_1p8v: regulator@5 {
76 compatible = "regulator-fixed";
78 regulator-name = "1P8V";
79 regulator-min-microvolt = <1800000>;
80 regulator-max-microvolt = <1800000>;
84 reg_2p8v: regulator@6 {
85 compatible = "regulator-fixed";
87 regulator-name = "2P8V";
88 regulator-min-microvolt = <2800000>;
89 regulator-max-microvolt = <2800000>;
93 reg_usb_h1_vbus: regulator@7 {
94 compatible = "regulator-fixed";
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_usbh1>;
98 regulator-name = "usb_h1_vbus";
99 regulator-min-microvolt = <3300000>;
100 regulator-max-microvolt = <3300000>;
101 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
106 mipi_xclk: mipi_xclk {
107 compatible = "pwm-clock";
109 clock-frequency = <22000000>;
110 clock-output-names = "mipi_pwm3";
111 pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
116 compatible = "gpio-keys";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_gpio_keys>;
121 label = "Power Button";
122 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
123 linux,code = <KEY_POWER>;
129 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
130 linux,code = <KEY_MENU>;
135 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
136 linux,code = <KEY_HOME>;
141 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
142 linux,code = <KEY_BACK>;
147 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
148 linux,code = <KEY_VOLUMEUP>;
152 label = "Volume Down";
153 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
154 linux,code = <KEY_VOLUMEDOWN>;
159 compatible = "fsl,imx6q-sabrelite-sgtl5000",
160 "fsl,imx-audio-sgtl5000";
161 model = "imx6q-sabrelite-sgtl5000";
162 ssi-controller = <&ssi1>;
163 audio-codec = <&codec>;
165 "MIC_IN", "Mic Jack",
166 "Mic Jack", "Mic Bias",
167 "Headphone Jack", "HP_OUT";
172 backlight_lcd: backlight-lcd {
173 compatible = "pwm-backlight";
174 pwms = <&pwm1 0 5000000>;
175 brightness-levels = <0 4 8 16 32 64 128 255>;
176 default-brightness-level = <7>;
177 power-supply = <®_3p3v>;
181 backlight_lvds: backlight-lvds {
182 compatible = "pwm-backlight";
183 pwms = <&pwm4 0 5000000>;
184 brightness-levels = <0 4 8 16 32 64 128 255>;
185 default-brightness-level = <7>;
186 power-supply = <®_3p3v>;
191 compatible = "fsl,imx-parallel-display";
192 #address-cells = <1>;
194 interface-pix-fmt = "bgr666";
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_j15>;
202 lcd_display_in: endpoint {
203 remote-endpoint = <&ipu1_di0_disp0>;
210 lcd_display_out: endpoint {
211 remote-endpoint = <&lcd_panel_in>;
217 compatible = "okaya,rs800480t-7x0gp";
218 backlight = <&backlight_lcd>;
221 lcd_panel_in: endpoint {
222 remote-endpoint = <&lcd_display_out>;
228 compatible = "hannstar,hsd100pxn1";
229 backlight = <&backlight_lvds>;
233 remote-endpoint = <&lvds0_out>;
239 &ipu1_csi0_from_ipu1_csi0_mux {
241 data-shift = <12>; /* Lines 19:12 used */
246 &ipu1_csi0_mux_from_parallel_sensor {
247 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_ipu1_csi0>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_audmux>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_can1>;
264 xceiver-supply = <®_can_xcvr>;
269 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
270 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
271 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
272 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
276 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_ecspi1>;
282 compatible = "sst,sst25vf016b", "jedec,spi-nor";
283 spi-max-frequency = <20000000>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_enet>;
292 phy-handle = <ðphy>;
293 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
297 #address-cells = <1>;
300 ethphy: ethernet-phy {
301 compatible = "ethernet-phy-ieee802.3-c22";
303 txc-skew-ps = <3000>;
305 rxc-skew-ps = <3000>;
319 ddc-i2c-bus = <&i2c2>;
324 clock-frequency = <100000>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_i2c1>;
330 compatible = "fsl,sgtl5000";
332 clocks = <&clks IMX6QDL_CLK_CKO>;
333 VDDA-supply = <®_2p5v>;
334 VDDIO-supply = <®_3p3v>;
339 clock-frequency = <100000>;
340 pinctrl-names = "default";
341 pinctrl-0 = <&pinctrl_i2c2>;
345 compatible = "ovti,ov5640";
346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_ov5640>;
349 clocks = <&mipi_xclk>;
350 clock-names = "xclk";
351 DOVDD-supply = <®_1p8v>;
352 AVDD-supply = <®_2p8v>;
353 DVDD-supply = <®_1p5v>;
354 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
355 powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
358 ov5640_to_mipi_csi2: endpoint {
359 remote-endpoint = <&mipi_csi2_in>;
367 compatible = "ovti,ov5642";
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_ov5642>;
370 clocks = <&clks IMX6QDL_CLK_CKO2>;
371 clock-names = "xclk";
373 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
374 powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
375 gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
379 ov5642_to_ipu1_csi0_mux: endpoint {
380 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
390 clock-frequency = <100000>;
391 pinctrl-names = "default";
392 pinctrl-0 = <&pinctrl_i2c3>;
397 pinctrl-names = "default";
398 pinctrl-0 = <&pinctrl_hog>;
401 pinctrl_hog: hoggrp {
403 /* SGTL5000 sys_mclk */
404 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
408 pinctrl_audmux: audmuxgrp {
410 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
411 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
412 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
413 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
417 pinctrl_can1: can1grp {
419 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
420 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
424 pinctrl_can_xcvr: can-xcvrgrp {
426 /* Flexcan XCVR enable */
427 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
431 pinctrl_ecspi1: ecspi1grp {
433 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
434 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
435 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
436 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
440 pinctrl_enet: enetgrp {
442 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
443 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
444 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
445 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
446 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
447 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
448 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
449 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
450 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
451 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
452 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
453 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
454 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
455 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
456 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
458 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
462 pinctrl_gpio_keys: gpio-keysgrp {
465 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
467 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
469 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
471 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
472 /* Volume Up Button */
473 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
474 /* Volume Down Button */
475 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
479 pinctrl_i2c1: i2c1grp {
481 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
482 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
486 pinctrl_i2c2: i2c2grp {
488 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
489 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
493 pinctrl_i2c3: i2c3grp {
495 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
496 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
500 pinctrl_ipu1_csi0: ipu1csi0grp {
502 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
503 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
504 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
505 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
506 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
507 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
508 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
509 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
510 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
511 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
512 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
513 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
517 pinctrl_j15: j15grp {
519 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
520 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
521 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
522 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
523 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
524 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
525 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
526 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
527 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
528 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
529 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
530 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
531 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
532 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
533 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
534 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
535 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
536 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
537 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
538 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
539 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
540 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
541 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
542 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
543 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
544 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
545 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
546 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
550 pinctrl_ov5640: ov5640grp {
552 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0
553 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
557 pinctrl_ov5642: ov5642grp {
559 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
560 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
561 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0
562 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
566 pinctrl_pwm1: pwm1grp {
568 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
572 pinctrl_pwm3: pwm3grp {
574 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
578 pinctrl_pwm4: pwm4grp {
580 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
584 pinctrl_uart1: uart1grp {
586 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
587 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
591 pinctrl_uart2: uart2grp {
593 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
594 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
598 pinctrl_usbh1: usbh1grp {
600 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
604 pinctrl_usbotg: usbotggrp {
606 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
607 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
608 /* power enable, high active */
609 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
613 pinctrl_usdhc3: usdhc3grp {
615 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
616 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
617 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
618 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
619 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
620 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
621 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
622 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
626 pinctrl_usdhc4: usdhc4grp {
628 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
629 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
630 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
631 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
632 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
633 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
634 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
641 remote-endpoint = <&lcd_display_in>;
653 lvds0_out: endpoint {
654 remote-endpoint = <&panel_in>;
666 pinctrl-names = "default";
667 pinctrl-0 = <&pinctrl_pwm1>;
673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_pwm3>;
680 pinctrl-names = "default";
681 pinctrl-0 = <&pinctrl_pwm4>;
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_uart1>;
696 pinctrl-names = "default";
697 pinctrl-0 = <&pinctrl_uart2>;
702 vbus-supply = <®_usb_h1_vbus>;
707 vbus-supply = <®_usb_otg_vbus>;
708 pinctrl-names = "default";
709 pinctrl-0 = <&pinctrl_usbotg>;
710 disable-over-current;
715 pinctrl-names = "default";
716 pinctrl-0 = <&pinctrl_usdhc3>;
717 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
718 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
719 vmmc-supply = <®_3p3v>;
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_usdhc4>;
726 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
727 vmmc-supply = <®_3p3v>;
737 mipi_csi2_in: endpoint {
738 remote-endpoint = <&ov5640_to_mipi_csi2>;