1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/sound/fsl-imx-audmux.h>
12 /* these are used by bootloader for disabling nodes */
24 bootargs = "console=ttymxc1,115200";
28 compatible = "pwm-backlight";
29 pwms = <&pwm4 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <7>;
35 compatible = "gpio-keys";
39 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
46 interrupt-parent = <&gsc>;
53 interrupt-parent = <&gsc>;
60 interrupt-parent = <&gsc>;
67 interrupt-parent = <&gsc>;
72 label = "switch_hold";
74 interrupt-parent = <&gsc>;
80 compatible = "gpio-leds";
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_gpio_leds>;
86 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
88 linux,default-trigger = "heartbeat";
93 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
94 default-state = "off";
99 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
100 default-state = "off";
105 device_type = "memory";
106 reg = <0x10000000 0x40000000>;
110 compatible = "pps-gpio";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_pps>;
113 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
118 compatible = "simple-bus";
119 #address-cells = <1>;
122 reg_1p0v: regulator@0 {
123 compatible = "regulator-fixed";
125 regulator-name = "1P0V";
126 regulator-min-microvolt = <1000000>;
127 regulator-max-microvolt = <1000000>;
131 reg_3p3v: regulator@1 {
132 compatible = "regulator-fixed";
134 regulator-name = "3P3V";
135 regulator-min-microvolt = <3300000>;
136 regulator-max-microvolt = <3300000>;
140 reg_can1_stby: regulator-can1-stby {
141 compatible = "regulator-fixed";
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_reg_can1>;
144 regulator-name = "can1_stby";
145 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
146 regulator-min-microvolt = <3300000>;
147 regulator-max-microvolt = <3300000>;
150 reg_usb_h1_vbus: regulator@2 {
151 compatible = "regulator-fixed";
153 regulator-name = "usb_h1_vbus";
154 regulator-min-microvolt = <5000000>;
155 regulator-max-microvolt = <5000000>;
159 reg_usb_otg_vbus: regulator@3 {
160 compatible = "regulator-fixed";
162 regulator-name = "usb_otg_vbus";
163 regulator-min-microvolt = <5000000>;
164 regulator-max-microvolt = <5000000>;
165 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
171 compatible = "fsl,imx6q-ventana-sgtl5000",
172 "fsl,imx-audio-sgtl5000";
173 model = "sgtl5000-audio";
174 ssi-controller = <&ssi1>;
175 audio-codec = <&sgtl5000>;
177 "MIC_IN", "Mic Jack",
178 "Mic Jack", "Mic Bias",
179 "Headphone Jack", "HP_OUT";
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
191 fsl,audmux-port = <1>;
193 (IMX_AUDMUX_V2_PTCR_TFSDIR |
194 IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
195 IMX_AUDMUX_V2_PTCR_TCLKDIR |
196 IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
197 IMX_AUDMUX_V2_PTCR_SYN)
198 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
203 fsl,audmux-port = <4>;
205 IMX_AUDMUX_V2_PTCR_SYN
206 IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_flexcan1>;
213 xceiver-supply = <®_can1_stby>;
218 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
219 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
220 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
221 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
225 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ecspi2>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_enet>;
234 phy-mode = "rgmii-id";
235 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_gpmi_nand>;
246 ddc-i2c-bus = <&i2c3>;
251 clock-frequency = <100000>;
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctrl_i2c1>;
257 compatible = "gw,gsc";
259 interrupt-parent = <&gpio1>;
260 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
261 interrupt-controller;
262 #interrupt-cells = <1>;
263 #address-cells = <1>;
267 compatible = "gw,gsc-adc";
268 #address-cells = <1>;
351 compatible = "gw,gsc-fan";
352 #address-cells = <1>;
359 compatible = "nxp,pca9555";
363 interrupt-parent = <&gsc>;
368 compatible = "atmel,24c02";
374 compatible = "atmel,24c02";
380 compatible = "atmel,24c02";
386 compatible = "atmel,24c02";
392 compatible = "dallas,ds1672";
398 clock-frequency = <100000>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_i2c2>;
404 compatible = "fsl,pfuze100";
409 regulator-min-microvolt = <300000>;
410 regulator-max-microvolt = <1875000>;
413 regulator-ramp-delay = <6250>;
417 regulator-min-microvolt = <300000>;
418 regulator-max-microvolt = <1875000>;
421 regulator-ramp-delay = <6250>;
425 regulator-min-microvolt = <800000>;
426 regulator-max-microvolt = <3950000>;
432 regulator-min-microvolt = <400000>;
433 regulator-max-microvolt = <1975000>;
439 regulator-min-microvolt = <400000>;
440 regulator-max-microvolt = <1975000>;
446 regulator-min-microvolt = <800000>;
447 regulator-max-microvolt = <3300000>;
451 regulator-min-microvolt = <5000000>;
452 regulator-max-microvolt = <5150000>;
458 regulator-min-microvolt = <1000000>;
459 regulator-max-microvolt = <3000000>;
470 regulator-min-microvolt = <800000>;
471 regulator-max-microvolt = <1550000>;
475 regulator-min-microvolt = <800000>;
476 regulator-max-microvolt = <1550000>;
480 regulator-min-microvolt = <1800000>;
481 regulator-max-microvolt = <3300000>;
485 regulator-min-microvolt = <1800000>;
486 regulator-max-microvolt = <3300000>;
491 regulator-min-microvolt = <1800000>;
492 regulator-max-microvolt = <3300000>;
497 regulator-min-microvolt = <1800000>;
498 regulator-max-microvolt = <3300000>;
506 clock-frequency = <100000>;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_i2c3>;
511 sgtl5000: audio-codec@a {
512 compatible = "fsl,sgtl5000";
514 clocks = <&clks IMX6QDL_CLK_CKO>;
515 VDDA-supply = <&sw4_reg>;
516 VDDIO-supply = <®_3p3v>;
519 touchscreen: egalax_ts@4 {
520 compatible = "eeti,egalax_ts";
522 interrupt-parent = <&gpio7>;
524 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
528 compatible = "nxp,fxos8700";
537 fsl,data-mapping = "spwg";
538 fsl,data-width = <18>;
542 native-mode = <&timing0>;
543 timing0: hsd100pxn1 {
544 clock-frequency = <65000000>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_pcie>;
561 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
578 pinctrl-names = "default";
579 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
585 pinctrl-names = "default", "state_dio";
586 pinctrl-0 = <&pinctrl_pwm4_backlight>;
587 pinctrl-1 = <&pinctrl_pwm4_dio>;
600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_uart1>;
602 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
607 pinctrl-names = "default";
608 pinctrl-0 = <&pinctrl_uart2>;
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_uart5>;
619 vbus-supply = <®_usb_otg_vbus>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_usbotg>;
622 disable-over-current;
627 vbus-supply = <®_usb_h1_vbus>;
632 pinctrl-names = "default", "state_100mhz", "state_200mhz";
633 pinctrl-0 = <&pinctrl_usdhc3>;
634 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
635 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
636 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
637 vmmc-supply = <®_3p3v>;
638 no-1-8-v; /* firmware will remove if board revision supports */
647 pinctrl-names = "default";
648 pinctrl-0 = <&pinctrl_wdog>;
649 fsl,ext-reset-output;
654 pinctrl_audmux: audmuxgrp {
656 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
657 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
658 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
659 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
660 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
661 MX6QDL_PAD_EIM_D25__AUD5_RXC 0x130b0
662 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
663 MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0
667 pinctrl_enet: enetgrp {
669 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
670 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
671 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
672 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
673 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
674 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
675 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
676 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
677 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
678 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
679 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
680 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
681 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
682 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
683 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
684 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
688 pinctrl_ecspi2: escpi2grp {
690 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
691 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
692 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
693 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
697 pinctrl_flexcan1: flexcan1grp {
699 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
700 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
704 pinctrl_gpio_leds: gpioledsgrp {
706 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
707 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
708 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
712 pinctrl_gpmi_nand: gpminandgrp {
714 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
715 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
716 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
717 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
718 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
719 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
720 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
721 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
722 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
723 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
724 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
725 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
726 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
727 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
728 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
732 pinctrl_i2c1: i2c1grp {
734 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
735 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
736 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
740 pinctrl_i2c2: i2c2grp {
742 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
743 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
747 pinctrl_i2c3: i2c3grp {
749 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
750 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
754 pinctrl_pcie: pciegrp {
756 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
757 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
761 pinctrl_pps: ppsgrp {
763 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
767 pinctrl_pwm1: pwm1grp {
769 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
773 pinctrl_pwm2: pwm2grp {
775 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
779 pinctrl_pwm3: pwm3grp {
781 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
785 pinctrl_pwm4_backlight: pwm4grpbacklight {
788 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
792 pinctrl_pwm4_dio: pwm4grpdio {
795 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
799 pinctrl_reg_can1: regcan1grp {
801 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
805 pinctrl_uart1: uart1grp {
807 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
808 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
809 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
813 pinctrl_uart2: uart2grp {
815 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
816 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
820 pinctrl_uart5: uart5grp {
822 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
823 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
827 pinctrl_usbotg: usbotggrp {
829 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
830 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
831 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
835 pinctrl_usdhc3: usdhc3grp {
837 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
838 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
839 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
840 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
841 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
842 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
843 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
844 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
848 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
850 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
851 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
852 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
853 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
854 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
855 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
856 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
857 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
861 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
863 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
864 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
865 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
866 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
867 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
868 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
869 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
870 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
874 pinctrl_wdog: wdoggrp {
876 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0