1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
11 /* these are used by bootloader for disabling nodes */
23 bootargs = "console=ttymxc1,115200";
27 compatible = "pwm-backlight";
28 pwms = <&pwm4 0 5000000>;
29 brightness-levels = <0 4 8 16 32 64 128 255>;
30 default-brightness-level = <7>;
34 compatible = "gpio-keys";
38 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
45 interrupt-parent = <&gsc>;
52 interrupt-parent = <&gsc>;
59 interrupt-parent = <&gsc>;
66 interrupt-parent = <&gsc>;
71 label = "switch_hold";
73 interrupt-parent = <&gsc>;
79 compatible = "gpio-leds";
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_gpio_leds>;
85 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
87 linux,default-trigger = "heartbeat";
92 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
93 default-state = "off";
98 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
99 default-state = "off";
104 device_type = "memory";
105 reg = <0x10000000 0x40000000>;
109 compatible = "pps-gpio";
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_pps>;
112 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
116 reg_1p0v: regulator-1p0v {
117 compatible = "regulator-fixed";
118 regulator-name = "1P0V";
119 regulator-min-microvolt = <1000000>;
120 regulator-max-microvolt = <1000000>;
124 reg_3p3v: regulator-3p3v {
125 compatible = "regulator-fixed";
126 regulator-name = "3P3V";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
132 reg_can1_stby: regulator-can1-stby {
133 compatible = "regulator-fixed";
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_reg_can1>;
136 regulator-name = "can1_stby";
137 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
138 regulator-min-microvolt = <3300000>;
139 regulator-max-microvolt = <3300000>;
142 reg_usb_h1_vbus: regulator-usb-h1-vbus {
143 compatible = "regulator-fixed";
144 regulator-name = "usb_h1_vbus";
145 regulator-min-microvolt = <5000000>;
146 regulator-max-microvolt = <5000000>;
150 reg_usb_otg_vbus: regulator-usb-otg-vbus {
151 compatible = "regulator-fixed";
152 regulator-name = "usb_otg_vbus";
153 regulator-min-microvolt = <5000000>;
154 regulator-max-microvolt = <5000000>;
155 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
160 compatible = "fsl,imx6q-ventana-sgtl5000",
161 "fsl,imx-audio-sgtl5000";
162 model = "sgtl5000-audio";
163 ssi-controller = <&ssi1>;
164 audio-codec = <&codec>;
166 "MIC_IN", "Mic Jack",
167 "Mic Jack", "Mic Bias",
168 "Headphone Jack", "HP_OUT";
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_audmux>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_flexcan1>;
183 xceiver-supply = <®_can1_stby>;
188 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
189 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
190 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
191 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_enet>;
197 phy-mode = "rgmii-id";
198 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_gpmi_nand>;
209 ddc-i2c-bus = <&i2c3>;
214 clock-frequency = <100000>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_i2c1>;
220 compatible = "gw,gsc";
222 interrupt-parent = <&gpio1>;
223 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
224 interrupt-controller;
225 #interrupt-cells = <1>;
229 compatible = "gw,gsc-adc";
230 #address-cells = <1>;
320 compatible = "nxp,pca9555";
324 interrupt-parent = <&gsc>;
329 compatible = "atmel,24c02";
335 compatible = "atmel,24c02";
341 compatible = "atmel,24c02";
347 compatible = "atmel,24c02";
353 compatible = "dallas,ds1672";
359 clock-frequency = <100000>;
360 pinctrl-names = "default";
361 pinctrl-0 = <&pinctrl_i2c2>;
365 compatible = "lltc,ltc3676";
367 interrupt-parent = <&gpio1>;
368 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
371 /* VDD_SOC (1+R1/R2 = 1.635) */
373 regulator-name = "vddsoc";
374 regulator-min-microvolt = <674400>;
375 regulator-max-microvolt = <1308000>;
376 lltc,fb-voltage-divider = <127000 200000>;
377 regulator-ramp-delay = <7000>;
382 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
384 regulator-name = "vdd1p8";
385 regulator-min-microvolt = <1033310>;
386 regulator-max-microvolt = <2004000>;
387 lltc,fb-voltage-divider = <301000 200000>;
388 regulator-ramp-delay = <7000>;
393 /* VDD_ARM (1+R1/R2 = 1.635) */
395 regulator-name = "vddarm";
396 regulator-min-microvolt = <674400>;
397 regulator-max-microvolt = <1308000>;
398 lltc,fb-voltage-divider = <127000 200000>;
399 regulator-ramp-delay = <7000>;
404 /* VDD_DDR (1+R1/R2 = 2.105) */
406 regulator-name = "vddddr";
407 regulator-min-microvolt = <868310>;
408 regulator-max-microvolt = <1684000>;
409 lltc,fb-voltage-divider = <221000 200000>;
410 regulator-ramp-delay = <7000>;
415 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
417 regulator-name = "vdd2p5";
418 regulator-min-microvolt = <2490375>;
419 regulator-max-microvolt = <2490375>;
420 lltc,fb-voltage-divider = <487000 200000>;
425 /* VDD_AUD_1P8: Audio codec */
427 regulator-name = "vdd1p8a";
428 regulator-min-microvolt = <1800000>;
429 regulator-max-microvolt = <1800000>;
433 /* VDD_HIGH (1+R1/R2 = 4.17) */
435 regulator-name = "vdd3p0";
436 regulator-min-microvolt = <3023250>;
437 regulator-max-microvolt = <3023250>;
438 lltc,fb-voltage-divider = <634000 200000>;
447 clock-frequency = <100000>;
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_i2c3>;
453 compatible = "fsl,sgtl5000";
455 clocks = <&clks IMX6QDL_CLK_CKO>;
456 VDDA-supply = <®_1p8v>;
457 VDDIO-supply = <®_3p3v>;
460 touchscreen: egalax_ts@4 {
461 compatible = "eeti,egalax_ts";
463 interrupt-parent = <&gpio1>;
465 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
469 compatible = "nxp,fxos8700";
478 fsl,data-mapping = "spwg";
479 fsl,data-width = <18>;
483 native-mode = <&timing0>;
484 timing0: hsd100pxn1 {
485 clock-frequency = <65000000>;
500 pinctrl-names = "default";
501 pinctrl-0 = <&pinctrl_pcie>;
502 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
513 pinctrl-names = "default";
514 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
520 pinctrl-names = "default";
521 pinctrl-0 = <&pinctrl_pwm4>;
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_uart1>;
532 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_uart2>;
543 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_uart5>;
549 vbus-supply = <®_usb_otg_vbus>;
550 pinctrl-names = "default";
551 pinctrl-0 = <&pinctrl_usbotg>;
552 disable-over-current;
557 vbus-supply = <®_usb_h1_vbus>;
562 pinctrl-names = "default", "state_100mhz", "state_200mhz";
563 pinctrl-0 = <&pinctrl_usdhc3>;
564 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
565 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
566 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
567 vmmc-supply = <®_3p3v>;
568 no-1-8-v; /* firmware will remove if board revision supports */
573 pinctrl-names = "default";
574 pinctrl-0 = <&pinctrl_wdog>;
575 fsl,ext-reset-output;
579 pinctrl_audmux: audmuxgrp {
581 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
582 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
583 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
584 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
585 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
589 pinctrl_enet: enetgrp {
591 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
592 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
593 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
594 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
595 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
596 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
597 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
598 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
599 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
600 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
601 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
602 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
603 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
604 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
605 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
606 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
610 pinctrl_flexcan1: flexcan1grp {
612 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
613 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
617 pinctrl_gpio_leds: gpioledsgrp {
619 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
620 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
621 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
625 pinctrl_gpmi_nand: gpminandgrp {
627 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
628 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
629 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
630 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
631 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
632 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
633 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
634 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
635 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
636 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
637 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
638 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
639 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
640 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
641 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
645 pinctrl_i2c1: i2c1grp {
647 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
648 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
649 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
653 pinctrl_i2c2: i2c2grp {
655 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
656 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
660 pinctrl_i2c3: i2c3grp {
662 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
663 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
667 pinctrl_pcie: pciegrp {
669 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
670 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
674 pinctrl_pmic: pmicgrp {
676 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
680 pinctrl_pps: ppsgrp {
682 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
686 pinctrl_pwm2: pwm2grp {
688 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
692 pinctrl_pwm3: pwm3grp {
694 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
698 pinctrl_pwm4: pwm4grp {
700 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
704 pinctrl_reg_can1: regcan1grp {
706 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
710 pinctrl_uart1: uart1grp {
712 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
713 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
714 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
718 pinctrl_uart2: uart2grp {
720 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
721 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
725 pinctrl_uart5: uart5grp {
727 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
728 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
732 pinctrl_usbotg: usbotggrp {
734 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
735 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
736 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
740 pinctrl_usdhc3: usdhc3grp {
742 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
743 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
744 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
745 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
746 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
747 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
748 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
749 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
753 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
755 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
756 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
757 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
758 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
759 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
760 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
761 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
762 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
766 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
768 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
769 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
770 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
771 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
772 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
773 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
774 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
775 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
779 pinctrl_wdog: wdoggrp {
781 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0