2 * Copyright 2014-2016 Toradex AG
3 * Copyright 2012 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Toradex Colibri iMX6DL/S Module";
48 compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";
50 backlight: backlight {
51 compatible = "pwm-backlight";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_gpio_bl_on>;
54 pwms = <&pwm3 0 5000000>;
55 enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
59 reg_module_3v3: regulator-module-3v3 {
60 compatible = "regulator-fixed";
61 regulator-name = "+V3.3";
62 regulator-min-microvolt = <3300000>;
63 regulator-max-microvolt = <3300000>;
67 reg_module_3v3_audio: regulator-module-3v3-audio {
68 compatible = "regulator-fixed";
69 regulator-name = "+V3.3_AUDIO";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
75 reg_usb_host_vbus: regulator-usb-host-vbus {
76 compatible = "regulator-fixed";
77 pinctrl-names = "default";
78 pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
79 regulator-name = "usb_host_vbus";
80 regulator-min-microvolt = <5000000>;
81 regulator-max-microvolt = <5000000>;
82 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */
87 compatible = "fsl,imx-audio-sgtl5000";
88 model = "imx6dl-colibri-sgtl5000";
89 ssi-controller = <&ssi1>;
90 audio-codec = <&codec>;
92 "Headphone Jack", "HP_OUT",
93 "LINE_IN", "Line In Jack",
95 "Mic Jack", "Mic Bias";
100 /* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */
101 sound_spdif: sound-spdif {
102 compatible = "fsl,imx-audio-spdif";
104 spdif-controller = <&spdif>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_audmux &pinctrl_mic_gnd>;
117 /* Optional on SODIMM 55/63 */
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_flexcan1>;
124 /* Optional on SODIMM 178/188 */
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_flexcan2>;
133 cs-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_ecspi4>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_enet>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_hdmi_ddc>;
153 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
154 * touch screen controller
157 clock-frequency = <100000>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_i2c2>;
163 compatible = "fsl,pfuze100";
168 regulator-min-microvolt = <300000>;
169 regulator-max-microvolt = <1875000>;
172 regulator-ramp-delay = <6250>;
176 regulator-min-microvolt = <300000>;
177 regulator-max-microvolt = <1875000>;
180 regulator-ramp-delay = <6250>;
184 regulator-min-microvolt = <400000>;
185 regulator-max-microvolt = <1975000>;
191 regulator-min-microvolt = <5000000>;
192 regulator-max-microvolt = <5150000>;
198 regulator-min-microvolt = <1000000>;
199 regulator-max-microvolt = <3000000>;
212 regulator-min-microvolt = <800000>;
213 regulator-max-microvolt = <1550000>;
221 regulator-min-microvolt = <1800000>;
222 regulator-max-microvolt = <1800000>;
228 regulator-min-microvolt = <1800000>;
229 regulator-max-microvolt = <3300000>;
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <3300000>;
244 compatible = "fsl,sgtl5000";
246 clocks = <&clks IMX6QDL_CLK_CKO>;
247 VDDA-supply = <®_module_3v3_audio>;
248 VDDIO-supply = <®_module_3v3>;
249 VDDD-supply = <&vgen4_reg>;
250 lrclk-strength = <3>;
253 /* STMPE811 touch screen controller */
255 compatible = "st,stmpe811";
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_touch_int>;
259 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
260 interrupt-parent = <&gpio6>;
261 interrupt-controller;
267 compatible = "st,stmpe-ts";
268 /* 3.25 MHz ADC clock speed */
270 /* 8 sample average control */
272 /* 7 length fractional part in z */
275 * 50 mA typical 80 mA max touchscreen drivers
276 * current limit value
281 /* internal ADC reference */
283 /* ADC converstion time: 80 clocks */
284 st,sample-time = <4>;
285 /* 1 ms panel driver settling time */
287 /* 5 ms touch detect interrupt delay */
288 st,touch-det-delay = <5>;
294 * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
297 clock-frequency = <100000>;
298 pinctrl-names = "default", "recovery";
299 pinctrl-0 = <&pinctrl_i2c3>;
300 pinctrl-1 = <&pinctrl_i2c3_recovery>;
301 scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
302 sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
308 pinctrl-names = "default";
309 pinctrl-0 = <&pinctrl_pwm1>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&pinctrl_pwm2>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_pwm3>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_pwm4>;
334 /* Optional S/PDIF out on SODIMM 137 */
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_spdif>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_uart2_dte>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&pinctrl_uart3_dte>;
372 pinctrl-names = "default";
373 disable-over-current;
374 dr_mode = "peripheral";
380 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
382 cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
384 vqmmc-supply = <®_module_3v3>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_usdhc3>;
394 vqmmc-supply = <®_module_3v3>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_weim_sram &pinctrl_weim_cs0
404 &pinctrl_weim_cs1 &pinctrl_weim_cs2
405 &pinctrl_weim_rdnwr &pinctrl_weim_npwe>;
406 #address-cells = <2>;
412 pinctrl_audmux: audmuxgrp {
414 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
415 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
416 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
417 MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0
418 /* SGTL5000 sys_mclk */
419 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
423 pinctrl_cam_mclk: cammclkgrp {
425 /* Parallel Camera CAM sys_mclk */
426 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0
430 pinctrl_ecspi4: ecspi4grp {
432 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
433 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
434 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
436 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
440 pinctrl_enet: enetgrp {
442 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
443 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
444 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
445 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
446 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
447 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
448 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
449 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
450 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
451 MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
455 pinctrl_flexcan1: flexcan1grp {
457 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
458 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
462 pinctrl_flexcan2: flexcan2grp {
464 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
465 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
469 pinctrl_gpio_bl_on: gpioblon {
471 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
475 pinctrl_gpio_keys: gpiokeys {
477 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
481 pinctrl_hdmi_ddc: hdmiddcgrp {
483 MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
484 MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
488 pinctrl_i2c2: i2c2grp {
490 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
491 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
495 pinctrl_i2c3: i2c3grp {
497 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
498 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
502 pinctrl_i2c3_recovery: i2c3recoverygrp {
504 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
505 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
509 pinctrl_ipu1_csi0: ipu1csi0grp { /* Parallel Camera */
511 MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0xb0b1
512 MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13 0xb0b1
513 MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14 0xb0b1
514 MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15 0xb0b1
515 MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16 0xb0b1
516 MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17 0xb0b1
517 MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18 0xb0b1
518 MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19 0xb0b1
519 MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK 0xb0b1
520 MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1
521 MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1
522 /* Disable PWM pins on camera interface */
523 MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40
524 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x40
528 pinctrl_ipu1_lcdif: ipu1lcdifgrp {
530 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xa1
531 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xa1
532 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xa1
533 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xa1
534 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xa1
535 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xa1
536 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xa1
537 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xa1
538 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xa1
539 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xa1
540 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xa1
541 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xa1
542 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xa1
543 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xa1
544 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xa1
545 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xa1
546 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xa1
547 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xa1
548 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xa1
549 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xa1
550 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xa1
551 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xa1
555 pinctrl_mic_gnd: gpiomicgnd {
557 /* Controls Mic GND, PU or '1' pull Mic GND to GND */
558 MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0
562 pinctrl_mmc_cd: gpiommccd {
564 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1
568 pinctrl_pwm1: pwm1grp {
570 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
574 pinctrl_pwm2: pwm2grp {
576 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
577 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040
581 pinctrl_pwm3: pwm3grp {
583 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
584 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040
588 pinctrl_pwm4: pwm4grp {
590 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
594 pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
597 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0f058
601 pinctrl_spdif: spdifgrp {
603 MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
607 pinctrl_touch_int: gpiotouchintgrp {
609 /* STMPE811 interrupt */
610 MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x1b0b0
614 pinctrl_uart1_dce: uart1dcegrp {
616 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
617 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
622 pinctrl_uart1_dte: uart1dtegrp {
624 MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
625 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
626 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
627 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
631 /* Additional DTR, DSR, DCD */
632 pinctrl_uart1_ctrl: uart1ctrlgrp {
634 MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
635 MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
636 MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
640 pinctrl_uart2_dte: uart2dtegrp {
642 MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
643 MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
644 MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
645 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
649 pinctrl_uart3_dte: uart3dtegrp {
651 MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1
652 MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1
656 pinctrl_usbc_det: usbcdetgrp {
659 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
661 MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058
662 /* USBC_DET_OVERWRITE */
663 MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x0f058
667 pinctrl_usdhc1: usdhc1grp {
669 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
670 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
671 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
672 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
673 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
674 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
678 pinctrl_usdhc3: usdhc3grp {
680 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
681 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
682 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
683 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
684 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
685 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
686 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
687 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
688 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
689 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
691 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
695 pinctrl_weim_cs0: weimcs0grp {
698 MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
702 pinctrl_weim_cs1: weimcs1grp {
705 MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0b1
709 pinctrl_weim_cs2: weimcs2grp {
712 MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0xb0b1
716 pinctrl_weim_sram: weimsramgrp {
718 MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
719 MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
721 MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
722 MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
723 MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
724 MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
725 MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
726 MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
727 MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
728 MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
729 MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
730 MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
731 MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
732 MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
733 MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
734 MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
735 MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
736 MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
738 MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
739 MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
740 MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
741 MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
742 MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
743 MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
744 MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
745 MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
746 MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
747 MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
748 MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
749 MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
750 MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
751 MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
752 MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
753 MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
757 pinctrl_weim_rdnwr: weimrdnwr {
759 MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040
760 MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0
764 pinctrl_weim_npwe: weimnpwe {
766 MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040
767 MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0
771 /* ADDRESS[16:18] [25] used as GPIO */
772 pinctrl_weim_gpio_1: weimgpio-1 {
774 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
775 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
776 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
777 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
778 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
779 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
780 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
781 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
782 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
783 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
787 /* ADDRESS[19:24] used as GPIO */
788 pinctrl_weim_gpio_2: weimgpio-2 {
790 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
791 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
792 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
793 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
794 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
795 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
796 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
797 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
798 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
802 /* DATA[16:31] used as GPIO */
803 pinctrl_weim_gpio_3: weimgpio-3 {
805 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0
806 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
807 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
808 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
809 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0
810 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
811 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0
812 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
813 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
814 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
815 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
816 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
817 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
818 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
819 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
823 /* DQM[0:3] used as GPIO */
824 pinctrl_weim_gpio_4: weimgpio-4 {
826 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0
827 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0
828 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
829 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
833 /* RDY used as GPIO */
834 pinctrl_weim_gpio_5: weimgpio-5 {
836 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0
840 /* ADDRESS[16] DATA[30] used as GPIO */
841 pinctrl_weim_gpio_6: weimgpio-6 {
843 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
844 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0