GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / imx6q-marsboard.dts
1 /*
2  * Copyright (C) 2016 Sergio Prado (sergio.prado@e-labworks.com)
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License
11  *     version 2 as published by the Free Software Foundation.
12  *
13  *     This file is distributed in the hope that it will be useful,
14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *     GNU General Public License for more details.
17  *
18  * Or, alternatively,
19  *
20  *  b) Permission is hereby granted, free of charge, to any person
21  *     obtaining a copy of this software and associated documentation
22  *     files (the "Software"), to deal in the Software without
23  *     restriction, including without limitation the rights to use,
24  *     copy, modify, merge, publish, distribute, sublicense, and/or
25  *     sell copies of the Software, and to permit persons to whom the
26  *     Software is furnished to do so, subject to the following
27  *     conditions:
28  *
29  *     The above copyright notice and this permission notice shall be
30  *     included in all copies or substantial portions of the Software.
31  *
32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39  *     OTHER DEALINGS IN THE SOFTWARE.
40  */
41
42 /dts-v1/;
43 #include "imx6q.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
45
46 / {
47         model = "Embest MarS Board i.MX6Dual";
48         compatible = "embest,imx6q-marsboard", "fsl,imx6q";
49
50         memory@10000000 {
51                 reg = <0x10000000 0x40000000>;
52         };
53
54         reg_3p3v: regulator-3p3v {
55                 compatible = "regulator-fixed";
56                 regulator-name = "3P3V";
57                 regulator-min-microvolt = <3300000>;
58                 regulator-max-microvolt = <3300000>;
59         };
60
61         reg_usb_otg_vbus: regulator-usb-otg-vbus {
62                 compatible = "regulator-fixed";
63                 regulator-name = "usb_otg_vbus";
64                 regulator-min-microvolt = <5000000>;
65                 regulator-max-microvolt = <5000000>;
66                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
67                 enable-active-high;
68         };
69
70         leds {
71                 compatible = "gpio-leds";
72                 pinctrl-names = "default";
73                 pinctrl-0 = <&pinctrl_led>;
74
75                 user1 {
76                         label = "imx6:green:user1";
77                         gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
78                         default-state = "off";
79                         linux,default-trigger = "heartbeat";
80                 };
81
82                 user2 {
83                         label = "imx6:green:user2";
84                         gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
85                         default-state = "off";
86                 };
87         };
88 };
89
90 &audmux {
91         pinctrl-names = "default";
92         pinctrl-0 = <&pinctrl_audmux>;
93         status = "okay";
94 };
95
96 &ecspi1 {
97         pinctrl-names = "default";
98         pinctrl-0 = <&pinctrl_ecspi1>;
99         cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
100         status = "okay";
101
102         m25p80@0 {
103                 compatible = "microchip,sst25vf016b";
104                 spi-max-frequency = <20000000>;
105                 reg = <0>;
106         };
107 };
108
109 &fec {
110         pinctrl-names = "default";
111         pinctrl-0 = <&pinctrl_enet>;
112         phy-mode = "rgmii";
113         phy-reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
114         status = "okay";
115 };
116
117 &hdmi {
118         ddc-i2c-bus = <&i2c2>;
119         status = "okay";
120 };
121
122 &i2c1 {
123         clock-frequency = <100000>;
124         pinctrl-names = "default";
125         pinctrl-0 = <&pinctrl_i2c1>;
126         status = "okay";
127 };
128
129 &i2c2 {
130         clock-frequency = <100000>;
131         pinctrl-names = "default";
132         pinctrl-0 = <&pinctrl_i2c2>;
133         status = "okay";
134 };
135
136 &i2c3 {
137         clock-frequency = <100000>;
138         pinctrl-names = "default";
139         pinctrl-0 = <&pinctrl_i2c3>;
140         status = "okay";
141 };
142
143 &pwm1 {
144         pinctrl-names = "default";
145         pinctrl-0 = <&pinctrl_pwm1>;
146         status = "okay";
147 };
148
149 &pwm2 {
150         pinctrl-names = "default";
151         pinctrl-0 = <&pinctrl_pwm2>;
152         status = "okay";
153 };
154
155 &pwm3 {
156         pinctrl-names = "default";
157         pinctrl-0 = <&pinctrl_pwm3>;
158         status = "okay";
159 };
160
161 &pwm4 {
162         pinctrl-names = "default";
163         pinctrl-0 = <&pinctrl_pwm4>;
164         status = "okay";
165 };
166
167 &uart1 {
168         pinctrl-names = "default";
169         pinctrl-0 = <&pinctrl_uart1>;
170         status = "okay";
171 };
172
173 &uart2 {
174         pinctrl-names = "default";
175         pinctrl-0 = <&pinctrl_uart2>;
176         status = "okay";
177 };
178
179 &uart3 {
180         pinctrl-names = "default";
181         pinctrl-0 = <&pinctrl_uart3>;
182         status = "okay";
183 };
184
185 &uart4 {
186         pinctrl-names = "default";
187         pinctrl-0 = <&pinctrl_uart4>;
188         status = "okay";
189 };
190
191 &uart5 {
192         pinctrl-names = "default";
193         pinctrl-0 = <&pinctrl_uart5>;
194         status = "okay";
195 };
196
197 &usbh1 {
198         dr_mode = "host";
199         disable-over-current;
200         status = "okay";
201 };
202
203 &usbotg {
204         vbus-supply = <&reg_usb_otg_vbus>;
205         pinctrl-names = "default";
206         pinctrl-0 = <&pinctrl_usbotg>;
207         dr_mode = "otg";
208         disable-over-current;
209         status = "okay";
210 };
211
212 &usdhc2 {
213         pinctrl-names = "default";
214         pinctrl-0 = <&pinctrl_usdhc2>;
215         vmmc-supply = <&reg_3p3v>;
216         cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
217         wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
218         status = "okay";
219 };
220
221 &usdhc3 {
222         pinctrl-names = "default";
223         pinctrl-0 = <&pinctrl_usdhc3>;
224         vmmc-supply = <&reg_3p3v>;
225         non-removable;
226         status = "okay";
227 };
228
229 &iomuxc {
230
231         pinctrl_audmux: audmuxgrp {
232                 fsl,pins = <
233                         MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
234                         MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
235                         MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
236                         MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
237                         MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0 /* CAM_MCLK */
238                 >;
239         };
240
241         pinctrl_ecspi1: ecspi1grp {
242                 fsl,pins = <
243                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
244                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
245                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
246                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x000b1 /* CS0 */
247                 >;
248         };
249
250         pinctrl_enet: enetgrp {
251                 fsl,pins = <
252                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
253                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
254                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
255                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
256                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
257                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
258                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
259                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
260                         /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
261                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
262                         /* AR8035 pin strapping: IO voltage: pull up */
263                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
264                         /* AR8035 pin strapping: PHYADDR#0: pull down */
265                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
266                         /* AR8035 pin strapping: PHYADDR#1: pull down */
267                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
268                         /* AR8035 pin strapping: MODE#1: pull up */
269                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
270                         /* AR8035 pin strapping: MODE#3: pull up */
271                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
272                         /* AR8035 pin strapping: MODE#0: pull down */
273                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
274                         /* GPIO16 -> AR8035 25MHz */
275                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
276                         /* RGMII_nRST */
277                         MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x130b0
278                         /* AR8035 interrupt */
279                         MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x180b0
280                 >;
281         };
282
283         pinctrl_i2c1: i2c1grp {
284                 fsl,pins = <
285                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
286                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
287                 >;
288         };
289
290         pinctrl_i2c2: i2c2grp {
291                 fsl,pins = <
292                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
293                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
294                 >;
295         };
296
297         pinctrl_i2c3: i2c3grp {
298                 fsl,pins = <
299                         MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
300                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
301                 >;
302         };
303
304         pinctrl_led: ledgrp {
305                 fsl,pins = <
306                         MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1b0b1 /* LED1 */
307                         MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x1b0b1 /* LED2 */
308                 >;
309         };
310
311         pinctrl_pwm1: pwm1grp {
312                 fsl,pins = <
313                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT         0x1b0b1
314                 >;
315         };
316
317         pinctrl_pwm2: pwm2grp {
318                 fsl,pins = <
319                         MX6QDL_PAD_DISP0_DAT9__PWM2_OUT         0x1b0b1
320                 >;
321         };
322
323         pinctrl_pwm3: pwm3grp {
324                 fsl,pins = <
325                         MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
326                 >;
327         };
328
329         pinctrl_pwm4: pwm4grp {
330                 fsl,pins = <
331                         MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
332                 >;
333         };
334
335         pinctrl_uart1: uart1grp {
336                 fsl,pins = <
337                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
338                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
339                 >;
340         };
341
342         pinctrl_uart2: uart2grp {
343                 fsl,pins = <
344                         MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
345                         MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
346                 >;
347         };
348
349         pinctrl_uart3: uart3grp {
350                 fsl,pins = <
351                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
352                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
353                 >;
354         };
355
356         pinctrl_uart4: uart4grp {
357                 fsl,pins = <
358                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
359                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
360                 >;
361         };
362
363         pinctrl_uart5: uart5grp {
364                 fsl,pins = <
365                         MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
366                         MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
367                 >;
368         };
369
370         pinctrl_usbotg: usbotggrp {
371                 fsl,pins = <
372                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
373                         MX6QDL_PAD_EIM_D21__USB_OTG_OC          0x1b0b0
374                         MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x000b0 /* USB OTG POWER ENABLE */
375                 >;
376         };
377
378         pinctrl_usdhc2: usdhc2grp {
379                 fsl,pins = <
380                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
381                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
382                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
383                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
384                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
385                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
386                         MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
387                         MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1f0b0 /* WP */
388                 >;
389         };
390
391         pinctrl_usdhc3: usdhc3grp {
392                 fsl,pins = <
393                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17009
394                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10009
395                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17009
396                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17009
397                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17009
398                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17009
399                         MX6QDL_PAD_SD3_RST__SD3_RESET           0x17009
400                 >;
401         };
402 };