1 // SPDX-License-Identifier: (GPL-2.0+)
3 * Copyright (C) 2015 DH electronics GmbH
4 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/imx6qdl-clock.h>
11 #include <dt-bindings/input/input.h>
22 device_type = "memory";
23 reg = <0x10000000 0x40000000>;
26 reg_usb_otg_vbus: regulator-usb-otg-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "usb_otg_vbus";
29 regulator-min-microvolt = <5000000>;
30 regulator-max-microvolt = <5000000>;
33 reg_usb_h1_vbus: regulator-usb-h1-vbus {
34 compatible = "regulator-fixed";
35 regulator-name = "usb_h1_vbus";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
38 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
42 reg_3p3v: regulator-3P3V {
43 compatible = "regulator-fixed";
44 regulator-name = "3P3V";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_flexcan1>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_flexcan2>;
64 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio4 11 GPIO_ACTIVE_HIGH>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_ecspi1>;
69 flash@0 { /* S25FL116K */
72 compatible = "jedec,spi-nor";
73 spi-max-frequency = <50000000>;
80 cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_ecspi2>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_enet_100M>;
90 phy-handle = <ðphy0>;
97 ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
100 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
101 reset-assert-us = <1000>;
102 reset-deassert-us = <1000>;
103 smsc,disable-energy-detect; /* Make plugin detection reliable */
109 clock-frequency = <100000>;
110 pinctrl-names = "default", "gpio";
111 pinctrl-0 = <&pinctrl_i2c1>;
112 pinctrl-1 = <&pinctrl_i2c1_gpio>;
113 scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
114 sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
119 clock-frequency = <100000>;
120 pinctrl-names = "default", "gpio";
121 pinctrl-0 = <&pinctrl_i2c2>;
122 pinctrl-1 = <&pinctrl_i2c2_gpio>;
123 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
124 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
129 clock-frequency = <100000>;
130 pinctrl-names = "default", "gpio";
131 pinctrl-0 = <&pinctrl_i2c3>;
132 pinctrl-1 = <&pinctrl_i2c3_gpio>;
133 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
134 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
138 compatible = "lltc,ltc3676";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_pmic_hw300>;
142 interrupt-parent = <&gpio5>;
143 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
147 regulator-min-microvolt = <787500>;
148 regulator-max-microvolt = <1527272>;
149 lltc,fb-voltage-divider = <100000 110000>;
150 regulator-suspend-mem-microvolt = <1040000>;
151 regulator-ramp-delay = <7000>;
157 regulator-min-microvolt = <1885714>;
158 regulator-max-microvolt = <3657142>;
159 lltc,fb-voltage-divider = <100000 28000>;
160 regulator-ramp-delay = <7000>;
166 regulator-min-microvolt = <787500>;
167 regulator-max-microvolt = <1527272>;
168 lltc,fb-voltage-divider = <100000 110000>;
169 regulator-suspend-mem-microvolt = <980000>;
170 regulator-ramp-delay = <7000>;
176 regulator-min-microvolt = <855571>;
177 regulator-max-microvolt = <1659291>;
178 lltc,fb-voltage-divider = <100000 93100>;
179 regulator-ramp-delay = <7000>;
185 regulator-min-microvolt = <3240306>;
186 regulator-max-microvolt = <3240306>;
187 lltc,fb-voltage-divider = <102000 29400>;
193 regulator-min-microvolt = <2484708>;
194 regulator-max-microvolt = <2484708>;
195 lltc,fb-voltage-divider = <100000 41200>;
202 touchscreen@49 { /* TSC2004 */
203 compatible = "ti,tsc2004";
205 vio-supply = <®_3p3v>;
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_tsc2004_hw300>;
208 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
213 compatible = "atmel,24c02";
219 compatible = "microcrystal,rv3029";
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_rtc_hw300>;
223 interrupt-parent = <&gpio7>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_hog_base>;
232 pinctrl_hog_base: hog-base-grp {
234 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0
235 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0
236 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0
237 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x120b0
238 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x120b0
242 pinctrl_ecspi1: ecspi1-grp {
244 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
245 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
246 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
247 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
248 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
252 pinctrl_ecspi2: ecspi2-grp {
254 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
255 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
256 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
257 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0
261 pinctrl_enet_100M: enet-100M-grp {
263 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
264 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
265 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
266 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
267 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
268 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
269 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
270 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
271 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
272 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
273 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x000b0
274 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b1
275 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x120b0
279 pinctrl_flexcan1: flexcan1-grp {
281 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
282 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
286 pinctrl_flexcan2: flexcan2-grp {
288 MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
289 MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
293 pinctrl_i2c1: i2c1-grp {
295 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
296 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
300 pinctrl_i2c1_gpio: i2c1-gpio-grp {
302 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
303 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
307 pinctrl_i2c2: i2c2-grp {
309 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
310 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
314 pinctrl_i2c2_gpio: i2c2-gpio-grp {
316 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
317 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
321 pinctrl_i2c3: i2c3-grp {
323 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
324 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
328 pinctrl_i2c3_gpio: i2c3-gpio-grp {
330 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
331 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
335 pinctrl_pmic_hw300: pmic-hw300-grp {
337 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0
341 pinctrl_rtc_hw300: rtc-hw300-grp {
343 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120B0
347 pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
349 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120B0
353 pinctrl_uart1: uart1-grp {
355 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
356 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
357 MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
358 MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x4001b0b1
359 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b1
360 MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x4001b0b1
361 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x4001b0b1
362 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x4001b0b1
366 pinctrl_uart4: uart4-grp {
368 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
369 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
373 pinctrl_uart5: uart5-grp {
375 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
376 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
377 MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1
378 MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x4001b0b1
382 pinctrl_usbh1: usbh1-grp {
384 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120B0
388 pinctrl_usbotg: usbotg-grp {
390 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
394 pinctrl_usdhc2: usdhc2-grp {
396 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
397 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
398 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
399 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
400 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
401 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
402 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120B0
406 pinctrl_usdhc3: usdhc3-grp {
408 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
409 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
410 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
411 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
412 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
413 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
414 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120B0
418 pinctrl_usdhc4: usdhc4-grp {
420 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
421 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
422 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
423 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
424 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
425 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
426 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
427 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
428 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
429 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
435 vin-supply = <&sw3_reg>;
439 vin-supply = <&sw1_reg>;
443 vin-supply = <&sw1_reg>;
447 vin-supply = <&sw2_reg>;
451 vin-supply = <&sw2_reg>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&pinctrl_uart1>;
458 dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
459 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
460 dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
461 rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_uart4>;
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_uart5>;
479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_usbh1>;
481 vbus-supply = <®_usb_h1_vbus>;
487 vbus-supply = <®_usb_otg_vbus>;
488 pinctrl-names = "default";
489 pinctrl-0 = <&pinctrl_usbotg>;
490 disable-over-current;
496 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_usdhc2>;
498 cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
499 keep-power-in-suspend;
504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_usdhc3>;
506 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
508 keep-power-in-suspend;
513 pinctrl-names = "default";
514 pinctrl-0 = <&pinctrl_usdhc4>;
518 keep-power-in-suspend;