arch/arm/boot/dts/imx6q-dhcom-som.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+)
   2 /*
   3  * Copyright (C) 2015 DH electronics GmbH
   4  * Copyright (C) 2018 Marek Vasut <marex@denx.de>
   5  */
   6
   7 #include "imx6q.dtsi"
   8 #include <dt-bindings/pwm/pwm.h>
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/clock/imx6qdl-clock.h>
  11 #include <dt-bindings/input/input.h>
  12
  13 / {
  14         aliases {
  15                 mmc0 = &usdhc2;
  16                 mmc1 = &usdhc3;
  17                 mmc2 = &usdhc4;
  18                 mmc3 = &usdhc1;
  19         };
  20
  21         memory@10000000 {
  22                 device_type = "memory";
  23                 reg = <0x10000000 0x40000000>;
  24         };
  25
  26         reg_usb_otg_vbus: regulator-usb-otg-vbus {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "usb_otg_vbus";
  29                 regulator-min-microvolt = <5000000>;
  30                 regulator-max-microvolt = <5000000>;
  31         };
  32
  33         reg_usb_h1_vbus: regulator-usb-h1-vbus {
  34                 compatible = "regulator-fixed";
  35                 regulator-name = "usb_h1_vbus";
  36                 regulator-min-microvolt = <5000000>;
  37                 regulator-max-microvolt = <5000000>;
  38                 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
  39                 enable-active-high;
  40         };
  41
  42         reg_3p3v: regulator-3P3V {
  43                 compatible = "regulator-fixed";
  44                 regulator-name = "3P3V";
  45                 regulator-min-microvolt = <3300000>;
  46                 regulator-max-microvolt = <3300000>;
  47                 regulator-always-on;
  48         };
  49 };
  50
  51 &can1 {
  52         pinctrl-names = "default";
  53         pinctrl-0 = <&pinctrl_flexcan1>;
  54         status = "okay";
  55 };
  56
  57 &can2 {
  58         pinctrl-names = "default";
  59         pinctrl-0 = <&pinctrl_flexcan2>;
  60         status = "okay";
  61 };
  62
  63 &ecspi1 {
  64         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio4 11 GPIO_ACTIVE_HIGH>;
  65         pinctrl-names = "default";
  66         pinctrl-0 = <&pinctrl_ecspi1>;
  67         status = "okay";
  68
  69         flash@0 {       /* S25FL116K */
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72                 compatible = "jedec,spi-nor";
  73                 spi-max-frequency = <50000000>;
  74                 reg = <0>;
  75                 m25p,fast-read;
  76         };
  77 };
  78
  79 &ecspi2 {
  80         cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&pinctrl_ecspi2>;
  83         status = "okay";
  84 };
  85
  86 &fec {
  87         pinctrl-names = "default";
  88         pinctrl-0 = <&pinctrl_enet_100M>;
  89         phy-mode = "rmii";
  90         phy-handle = <&ethphy0>;
  91         status = "okay";
  92
  93         mdio {
  94                 #address-cells = <1>;
  95                 #size-cells = <0>;
  96
  97                 ethphy0: ethernet-phy@0 {       /* SMSC LAN8710Ai */
  98                         reg = <0>;
  99                         max-speed = <100>;
 100                         reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
 101                         reset-assert-us = <1000>;
 102                         reset-deassert-us = <1000>;
 103                         smsc,disable-energy-detect; /* Make plugin detection reliable */
 104                 };
 105         };
 106 };
 107
 108 &i2c1 {
 109         clock-frequency = <100000>;
 110         pinctrl-names = "default", "gpio";
 111         pinctrl-0 = <&pinctrl_i2c1>;
 112         pinctrl-1 = <&pinctrl_i2c1_gpio>;
 113         scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 114         sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 115         status = "okay";
 116 };
 117
 118 &i2c2 {
 119         clock-frequency = <100000>;
 120         pinctrl-names = "default", "gpio";
 121         pinctrl-0 = <&pinctrl_i2c2>;
 122         pinctrl-1 = <&pinctrl_i2c2_gpio>;
 123         scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 124         sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 125         status = "okay";
 126 };
 127
 128 &i2c3 {
 129         clock-frequency = <100000>;
 130         pinctrl-names = "default", "gpio";
 131         pinctrl-0 = <&pinctrl_i2c3>;
 132         pinctrl-1 = <&pinctrl_i2c3_gpio>;
 133         scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 134         sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 135         status = "okay";
 136
 137         ltc3676: pmic@3c {
 138                 compatible = "lltc,ltc3676";
 139                 pinctrl-names = "default";
 140                 pinctrl-0 = <&pinctrl_pmic_hw300>;
 141                 reg = <0x3c>;
 142                 interrupt-parent = <&gpio5>;
 143                 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
 144
 145                 regulators {
 146                         sw1_reg: sw1 {
 147                                 regulator-min-microvolt = <787500>;
 148                                 regulator-max-microvolt = <1527272>;
 149                                 lltc,fb-voltage-divider = <100000 110000>;
 150                                 regulator-suspend-mem-microvolt = <1040000>;
 151                                 regulator-ramp-delay = <7000>;
 152                                 regulator-boot-on;
 153                                 regulator-always-on;
 154                         };
 155
 156                         sw2_reg: sw2 {
 157                                 regulator-min-microvolt = <1885714>;
 158                                 regulator-max-microvolt = <3657142>;
 159                                 lltc,fb-voltage-divider = <100000 28000>;
 160                                 regulator-ramp-delay = <7000>;
 161                                 regulator-boot-on;
 162                                 regulator-always-on;
 163                         };
 164
 165                         sw3_reg: sw3 {
 166                                 regulator-min-microvolt = <787500>;
 167                                 regulator-max-microvolt = <1527272>;
 168                                 lltc,fb-voltage-divider = <100000 110000>;
 169                                 regulator-suspend-mem-microvolt = <980000>;
 170                                 regulator-ramp-delay = <7000>;
 171                                 regulator-boot-on;
 172                                 regulator-always-on;
 173                         };
 174
 175                         sw4_reg: sw4 {
 176                                 regulator-min-microvolt = <855571>;
 177                                 regulator-max-microvolt = <1659291>;
 178                                 lltc,fb-voltage-divider = <100000 93100>;
 179                                 regulator-ramp-delay = <7000>;
 180                                 regulator-boot-on;
 181                                 regulator-always-on;
 182                         };
 183
 184                         ldo1_reg: ldo1 {
 185                                 regulator-min-microvolt = <3240306>;
 186                                 regulator-max-microvolt = <3240306>;
 187                                 lltc,fb-voltage-divider = <102000 29400>;
 188                                 regulator-boot-on;
 189                                 regulator-always-on;
 190                         };
 191
 192                         ldo2_reg: ldo2 {
 193                                 regulator-min-microvolt = <2484708>;
 194                                 regulator-max-microvolt = <2484708>;
 195                                 lltc,fb-voltage-divider = <100000 41200>;
 196                                 regulator-boot-on;
 197                                 regulator-always-on;
 198                         };
 199                 };
 200         };
 201
 202         touchscreen@49 {        /* TSC2004 */
 203                 compatible = "ti,tsc2004";
 204                 reg = <0x49>;
 205                 vio-supply = <&reg_3p3v>;
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&pinctrl_tsc2004_hw300>;
 208                 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
 209                 status = "disabled";
 210         };
 211
 212         eeprom@50 {
 213                 compatible = "atmel,24c02";
 214                 reg = <0x50>;
 215                 pagesize = <16>;
 216         };
 217
 218         rtc@56 {
 219                 compatible = "microcrystal,rv3029";
 220                 pinctrl-names = "default";
 221                 pinctrl-0 = <&pinctrl_rtc_hw300>;
 222                 reg = <0x56>;
 223                 interrupt-parent = <&gpio7>;
 224                 interrupts = <12 2>;
 225         };
 226 };
 227
 228 &iomuxc {
 229         pinctrl-names = "default";
 230         pinctrl-0 = <&pinctrl_hog_base>;
 231
 232         pinctrl_hog_base: hog-base-grp {
 233                 fsl,pins = <
 234                         MX6QDL_PAD_EIM_A19__GPIO2_IO19          0x120b0
 235                         MX6QDL_PAD_EIM_A23__GPIO6_IO06          0x120b0
 236                         MX6QDL_PAD_EIM_A22__GPIO2_IO16          0x120b0
 237                         MX6QDL_PAD_EIM_A16__GPIO2_IO22          0x120b0
 238                         MX6QDL_PAD_EIM_A17__GPIO2_IO21          0x120b0
 239                 >;
 240         };
 241
 242         pinctrl_ecspi1: ecspi1-grp {
 243                 fsl,pins = <
 244                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 245                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 246                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 247                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 248                         MX6QDL_PAD_KEY_ROW2__GPIO4_IO11         0x1b0b0
 249                 >;
 250         };
 251
 252         pinctrl_ecspi2: ecspi2-grp {
 253                 fsl,pins = <
 254                         MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO      0x100b1
 255                         MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI       0x100b1
 256                         MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK       0x100b1
 257                         MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29       0x1b0b0
 258                 >;
 259         };
 260
 261         pinctrl_enet_100M: enet-100M-grp {
 262                 fsl,pins = <
 263                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 264                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 265                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x1b0b0
 266                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x1b0b0
 267                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x1b0b0
 268                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x1b0b0
 269                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
 270                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0
 271                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0
 272                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 273                         MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0x000b0
 274                         MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x000b1
 275                         MX6QDL_PAD_GPIO_7__GPIO1_IO07           0x120b0
 276                 >;
 277         };
 278
 279         pinctrl_flexcan1: flexcan1-grp {
 280                 fsl,pins = <
 281                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 282                         MX6QDL_PAD_GPIO_8__FLEXCAN1_RX          0x1b0b0
 283                 >;
 284         };
 285
 286         pinctrl_flexcan2: flexcan2-grp {
 287                 fsl,pins = <
 288                         MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX        0x1b0b0
 289                         MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX        0x1b0b0
 290                 >;
 291         };
 292
 293         pinctrl_i2c1: i2c1-grp {
 294                 fsl,pins = <
 295                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 296                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 297                 >;
 298         };
 299
 300         pinctrl_i2c1_gpio: i2c1-gpio-grp {
 301                 fsl,pins = <
 302                         MX6QDL_PAD_EIM_D21__GPIO3_IO21          0x4001b8b1
 303                         MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x4001b8b1
 304                 >;
 305         };
 306
 307         pinctrl_i2c2: i2c2-grp {
 308                 fsl,pins = <
 309                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 310                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 311                 >;
 312         };
 313
 314         pinctrl_i2c2_gpio: i2c2-gpio-grp {
 315                 fsl,pins = <
 316                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12         0x4001b8b1
 317                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13         0x4001b8b1
 318                 >;
 319         };
 320
 321         pinctrl_i2c3: i2c3-grp {
 322                 fsl,pins = <
 323                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 324                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 325                 >;
 326         };
 327
 328         pinctrl_i2c3_gpio: i2c3-gpio-grp {
 329                 fsl,pins = <
 330                         MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x4001b8b1
 331                         MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x4001b8b1
 332                 >;
 333         };
 334
 335         pinctrl_pmic_hw300: pmic-hw300-grp {
 336                 fsl,pins = <
 337                         MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1B0B0
 338                 >;
 339         };
 340
 341         pinctrl_rtc_hw300: rtc-hw300-grp {
 342                 fsl,pins = <
 343                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x120B0
 344                 >;
 345         };
 346
 347         pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
 348                 fsl,pins = <
 349                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x120B0
 350                 >;
 351         };
 352
 353         pinctrl_uart1: uart1-grp {
 354                 fsl,pins = <
 355                         MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 356                         MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 357                         MX6QDL_PAD_EIM_D20__UART1_RTS_B         0x1b0b1
 358                         MX6QDL_PAD_EIM_D19__UART1_CTS_B         0x4001b0b1
 359                         MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x4001b0b1
 360                         MX6QDL_PAD_EIM_D24__GPIO3_IO24          0x4001b0b1
 361                         MX6QDL_PAD_EIM_D25__GPIO3_IO25          0x4001b0b1
 362                         MX6QDL_PAD_EIM_EB3__GPIO2_IO31          0x4001b0b1
 363                 >;
 364         };
 365
 366         pinctrl_uart4: uart4-grp {
 367                 fsl,pins = <
 368                         MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x1b0b1
 369                         MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x1b0b1
 370                 >;
 371         };
 372
 373         pinctrl_uart5: uart5-grp {
 374                 fsl,pins = <
 375                         MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA    0x1b0b1
 376                         MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x1b0b1
 377                         MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B      0x1b0b1
 378                         MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B      0x4001b0b1
 379                 >;
 380         };
 381
 382         pinctrl_usbh1: usbh1-grp {
 383                 fsl,pins = <
 384                         MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x120B0
 385                 >;
 386         };
 387
 388         pinctrl_usbotg: usbotg-grp {
 389                 fsl,pins = <
 390                         MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 391                 >;
 392         };
 393
 394         pinctrl_usdhc2: usdhc2-grp {
 395                 fsl,pins = <
 396                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 397                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 398                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 399                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 400                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 401                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 402                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x120B0
 403                 >;
 404         };
 405
 406         pinctrl_usdhc3: usdhc3-grp {
 407                 fsl,pins = <
 408                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 409                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 410                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 411                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 412                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 413                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 414                         MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x120B0
 415                 >;
 416         };
 417
 418         pinctrl_usdhc4: usdhc4-grp {
 419                 fsl,pins = <
 420                         MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 421                         MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 422                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 423                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 424                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 425                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 426                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 427                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 428                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 429                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 430                 >;
 431         };
 432 };
 433
 434 &reg_arm {
 435         vin-supply = <&sw3_reg>;
 436 };
 437
 438 &reg_soc {
 439         vin-supply = <&sw1_reg>;
 440 };
 441
 442 &reg_pu {
 443         vin-supply = <&sw1_reg>;
 444 };
 445
 446 &reg_vdd1p1 {
 447         vin-supply = <&sw2_reg>;
 448 };
 449
 450 &reg_vdd2p5 {
 451         vin-supply = <&sw2_reg>;
 452 };
 453
 454 &uart1 {
 455         pinctrl-names = "default";
 456         pinctrl-0 = <&pinctrl_uart1>;
 457         uart-has-rtscts;
 458         dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
 459         dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
 460         dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 461         rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
 462         status = "okay";
 463 };
 464
 465 &uart4 {
 466         pinctrl-names = "default";
 467         pinctrl-0 = <&pinctrl_uart4>;
 468         status = "okay";
 469 };
 470
 471 &uart5 {
 472         pinctrl-names = "default";
 473         pinctrl-0 = <&pinctrl_uart5>;
 474         uart-has-rtscts;
 475         status = "okay";
 476 };
 477
 478 &usbh1 {
 479         pinctrl-names = "default";
 480         pinctrl-0 = <&pinctrl_usbh1>;
 481         vbus-supply = <&reg_usb_h1_vbus>;
 482         dr_mode = "host";
 483         status = "okay";
 484 };
 485
 486 &usbotg {
 487         vbus-supply = <&reg_usb_otg_vbus>;
 488         pinctrl-names = "default";
 489         pinctrl-0 = <&pinctrl_usbotg>;
 490         disable-over-current;
 491         dr_mode = "otg";
 492         status = "okay";
 493 };
 494
 495 &usdhc2 {
 496         pinctrl-names = "default";
 497         pinctrl-0 = <&pinctrl_usdhc2>;
 498         cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 499         keep-power-in-suspend;
 500         status = "okay";
 501 };
 502
 503 &usdhc3 {
 504         pinctrl-names = "default";
 505         pinctrl-0 = <&pinctrl_usdhc3>;
 506         cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
 507         fsl,wp-controller;
 508         keep-power-in-suspend;
 509         status = "disabled";
 510 };
 511
 512 &usdhc4 {
 513         pinctrl-names = "default";
 514         pinctrl-0 = <&pinctrl_usdhc4>;
 515         non-removable;
 516         bus-width = <8>;
 517         no-1-8-v;
 518         keep-power-in-suspend;
 519         status = "okay";
 520 };