GNU Linux-libre 4.9.333-gnu1
[releases.git] / arch / arm / boot / dts / imx6q-bx50v3.dtsi
1 /*
2  * Copyright 2015 Timesys Corporation.
3  * Copyright 2015 General Electric Company
4  *
5  * This file is dual-licensed: you can use it either under the terms
6  * of the GPL or the X11 license, at your option. Note that this dual
7  * licensing only applies to this file, and not this project as a
8  * whole.
9  *
10  *  a) This file is free software; you can redistribute it and/or
11  *     modify it under the terms of the GNU General Public License
12  *     version 2 as published by the Free Software Foundation.
13  *
14  *     This file is distributed in the hope that it will be useful
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 #include "imx6q-ba16.dtsi"
44
45 / {
46         clocks {
47                 mclk: clock@0 {
48                         compatible = "fixed-clock";
49                         reg = <0>;
50                         #clock-cells = <0>;
51                         clock-frequency = <22000000>;
52                 };
53         };
54
55         gpio-poweroff {
56                 compatible = "gpio-poweroff";
57                 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
58                 status = "okay";
59         };
60
61         reg_wl18xx_vmmc: regulator-wl18xx {
62                 compatible = "regulator-fixed";
63                 regulator-name = "vwl1807";
64                 regulator-min-microvolt = <3300000>;
65                 regulator-max-microvolt = <3300000>;
66                 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
67                 startup-delay-us = <70000>;
68                 enable-active-high;
69         };
70
71         reg_wlan: regulator-wlan {
72                 compatible = "regulator-fixed";
73                 regulator-name = "3P3V_wlan";
74                 regulator-min-microvolt = <3300000>;
75                 regulator-max-microvolt = <3300000>;
76                 regulator-always-on;
77                 regulator-boot-on;
78                 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
79         };
80
81         sound {
82                 compatible = "fsl,imx6q-ba16-sgtl5000",
83                              "fsl,imx-audio-sgtl5000";
84                 model = "imx6q-ba16-sgtl5000";
85                 ssi-controller = <&ssi1>;
86                 audio-codec = <&sgtl5000>;
87                 audio-routing =
88                         "MIC_IN", "Mic Jack",
89                         "Mic Jack", "Mic Bias",
90                         "LINE_IN", "Line In Jack",
91                         "Headphone Jack", "HP_OUT";
92                 mux-int-port = <1>;
93                 mux-ext-port = <4>;
94         };
95
96         aliases {
97                 mdio-gpio0 = &mdio0;
98         };
99
100         mdio0: mdio-gpio {
101                 compatible = "virtual,mdio-gpio";
102                 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
103                         <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
104
105                 #address-cells = <1>;
106                 #size-cells = <0>;
107
108                 switch@0 {
109                         compatible = "marvell,mv88e6085"; /* 88e6240*/
110                         #address-cells = <1>;
111                         #size-cells = <0>;
112                         reg = <0>;
113
114                         switch_ports: ports {
115                                 #address-cells = <1>;
116                                 #size-cells = <0>;
117                         };
118
119                         mdio {
120                                 #address-cells = <1>;
121                                 #size-cells = <0>;
122
123                                 switchphy0: switchphy@0 {
124                                         reg = <0>;
125                                 };
126
127                                 switchphy1: switchphy@1 {
128                                         reg = <1>;
129                                 };
130
131                                 switchphy2: switchphy@2 {
132                                         reg = <2>;
133                                 };
134
135                                 switchphy3: switchphy@3 {
136                                         reg = <3>;
137                                 };
138
139                                 switchphy4: switchphy@4 {
140                                         reg = <4>;
141                                 };
142                         };
143                 };
144         };
145 };
146
147 &ecspi5 {
148         fsl,spi-num-chipselects = <1>;
149         cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
150         pinctrl-names = "default";
151         pinctrl-0 = <&pinctrl_ecspi5>;
152         status = "okay";
153
154         m25_eeprom: m25p80@0 {
155                 compatible = "atmel,at25";
156                 spi-max-frequency = <20000000>;
157                 size = <0x8000>;
158                 pagesize = <64>;
159                 reg = <0>;
160                 address-width = <16>;
161         };
162 };
163
164 &i2c1 {
165         pca9547: mux@70 {
166                 compatible = "nxp,pca9547";
167                 reg = <0x70>;
168                 #address-cells = <1>;
169                 #size-cells = <0>;
170
171                 mux1_i2c1: i2c@0 {
172                         #address-cells = <1>;
173                         #size-cells = <0>;
174                         reg = <0x0>;
175
176                         ads7830: ads7830@48 {
177                                 compatible = "ti,ads7830";
178                                 reg = <0x48>;
179                         };
180
181                         mma8453: mma8453@1c {
182                                 compatible = "fsl,mma8453";
183                                 reg = <0x1c>;
184                         };
185                 };
186
187                 mux1_i2c2: i2c@1 {
188                         #address-cells = <1>;
189                         #size-cells = <0>;
190                         reg = <0x1>;
191
192                         eeprom: eeprom@50 {
193                                 compatible = "atmel,24c08";
194                                 reg = <0x50>;
195                         };
196
197                         mpl3115: mpl3115@60 {
198                                 compatible = "fsl,mpl3115";
199                                 reg = <0x60>;
200                         };
201                 };
202
203                 mux1_i2c3: i2c@2 {
204                         #address-cells = <1>;
205                         #size-cells = <0>;
206                         reg = <0x2>;
207                 };
208
209                 mux1_i2c4: i2c@3 {
210                         #address-cells = <1>;
211                         #size-cells = <0>;
212                         reg = <0x3>;
213
214                         sgtl5000: codec@0a {
215                                 compatible = "fsl,sgtl5000";
216                                 reg = <0x0a>;
217                                 clocks = <&mclk>;
218                                 VDDA-supply = <&reg_1p8v>;
219                                 VDDIO-supply = <&reg_3p3v>;
220                         };
221                 };
222
223                 mux1_i2c5: i2c@4 {
224                         #address-cells = <1>;
225                         #size-cells = <0>;
226                         reg = <0x4>;
227
228                         pca9539: pca9539@74 {
229                                 compatible = "nxp,pca9539";
230                                 reg = <0x74>;
231                                 gpio-controller;
232                                 #gpio-cells = <2>;
233                                 interrupt-controller;
234                                 interrupt-parent = <&gpio2>;
235                                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
236
237                                 P06 {
238                                         gpio-hog;
239                                         gpios = <6 0>;
240                                         output-low;
241                                         line-name = "PCA9539-P06";
242                                 };
243
244                                 P07 {
245                                         gpio-hog;
246                                         gpios = <7 0>;
247                                         output-low;
248                                         line-name = "PCA9539-P07";
249                                 };
250
251                                 P10 {
252                                         gpio-hog;
253                                         gpios = <8 0>;
254                                         output-low;
255                                         line-name = "PCA9539-P10";
256                                 };
257
258                                 P11 {
259                                         gpio-hog;
260                                         gpios = <9 0>;
261                                         output-low;
262                                         line-name = "PCA9539-P11";
263                                 };
264
265                                 P12 {
266                                         gpio-hog;
267                                         gpios = <10 0>;
268                                         output-low;
269                                         line-name = "PCA9539-P12";
270                                 };
271
272                                 P13 {
273                                         gpio-hog;
274                                         gpios = <11 0>;
275                                         output-low;
276                                         line-name = "PCA9539-P13";
277                                 };
278
279                                 P14 {
280                                         gpio-hog;
281                                         gpios = <12 0>;
282                                         output-low;
283                                         line-name = "PCA9539-P14";
284                                 };
285
286                                 P15 {
287                                         gpio-hog;
288                                         gpios = <13 0>;
289                                         output-low;
290                                         line-name = "PCA9539-P15";
291                                 };
292
293                                 P16 {
294                                         gpio-hog;
295                                         gpios = <14 0>;
296                                         output-low;
297                                         line-name = "PCA9539-P16";
298                                 };
299
300                                 P17 {
301                                         gpio-hog;
302                                         gpios = <15 0>;
303                                         output-low;
304                                         line-name = "PCA9539-P17";
305                                 };
306                         };
307                 };
308
309                 mux1_i2c6: i2c@5 {
310                         #address-cells = <1>;
311                         #size-cells = <0>;
312                         reg = <0x5>;
313                 };
314
315                 mux1_i2c7: i2c@6 {
316                         #address-cells = <1>;
317                         #size-cells = <0>;
318                         reg = <0x6>;
319                 };
320
321                 mux1_i2c8: i2c@7 {
322                         #address-cells = <1>;
323                         #size-cells = <0>;
324                         reg = <0x7>;
325                 };
326         };
327 };
328
329 &usdhc4 {
330         pinctrl-names = "default";
331         pinctrl-0 = <&pinctrl_usdhc4>;
332         bus-width = <4>;
333         vmmc-supply = <&reg_wl18xx_vmmc>;
334         no-1-8-v;
335         non-removable;
336         wakeup-source;
337         keep-power-in-suspend;
338         cap-power-off-card;
339         max-frequency = <25000000>;
340         #address-cells = <1>;
341         #size-cells = <0>;
342         status = "okay";
343
344         wlcore: wlcore@2 {
345                 compatible = "ti,wl1837";
346                 reg = <2>;
347                 interrupt-parent = <&gpio2>;
348                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
349                 tcxo-clock-frequency = <26000000>;
350         };
351 };
352
353 &pcie {
354         /* Synopsys, Inc. Device */
355         pci_root: root@0,0 {
356                 compatible = "pci16c3,abcd";
357                 reg = <0x00000000 0 0 0 0>;
358
359                 #address-cells = <3>;
360                 #size-cells = <2>;
361                 #interrupt-cells = <1>;
362         };
363 };
364
365 &clks {
366         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
367                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
368                           <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
369                           <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
370                           <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
371                           <&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
372         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
373                                  <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
374                                  <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
375                                  <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
376                                  <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
377                                  <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
378 };