arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright 2014-2022 Toradex
   4  * Copyright 2012 Freescale Semiconductor, Inc.
   5  * Copyright 2011 Linaro Ltd.
   6  */
   7
   8 /dts-v1/;
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/input/input.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include "imx6q.dtsi"
  14 #include "imx6qdl-apalis.dtsi"
  15
  16 / {
  17         model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.2";
  18         compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q",
  19                      "fsl,imx6q";
  20
  21         aliases {
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c3;
  24                 i2c2 = &i2c2;
  25                 rtc0 = &rtc_i2c;
  26                 rtc1 = &snvs_rtc;
  27         };
  28
  29         chosen {
  30                 stdout-path = "serial0:115200n8";
  31         };
  32
  33         leds {
  34                 compatible = "gpio-leds";
  35
  36                 pinctrl-names = "default";
  37                 pinctrl-0 = <&pinctrl_leds_ixora>;
  38
  39                 led4-green {
  40                         gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  41                         label = "LED_4_GREEN";
  42                 };
  43
  44                 led4-red {
  45                         gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  46                         label = "LED_4_RED";
  47                 };
  48
  49                 led5-green {
  50                         gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
  51                         label = "LED_5_GREEN";
  52                 };
  53
  54                 led5-red {
  55                         gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
  56                         label = "LED_5_RED";
  57                 };
  58         };
  59
  60         reg_3v3_vmmc: regulator-3v3-vmmc {
  61                 compatible = "regulator-fixed";
  62                 enable-active-high;
  63                 gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
  64                 pinctrl-names = "default";
  65                 pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
  66                 regulator-max-microvolt = <3300000>;
  67                 regulator-min-microvolt = <3300000>;
  68                 regulator-name = "3v3_vmmc";
  69                 startup-delay-us = <100>;
  70         };
  71
  72         reg_can1_supply: regulator-can1-supply {
  73                 compatible = "regulator-fixed";
  74                 enable-active-high;
  75                 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>;
  76                 pinctrl-names = "default";
  77                 pinctrl-0 = <&pinctrl_enable_can1_power>;
  78                 regulator-name = "can1_supply";
  79                 startup-delay-us = <1000>;
  80         };
  81
  82         reg_can2_supply: regulator-can2-supply {
  83                 compatible = "regulator-fixed";
  84                 enable-active-high;
  85                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  86                 pinctrl-names = "default";
  87                 pinctrl-0 = <&pinctrl_enable_can2_power>;
  88                 regulator-name = "can2_supply";
  89                 startup-delay-us = <1000>;
  90         };
  91 };
  92
  93 &can1 {
  94         xceiver-supply = <&reg_can1_supply>;
  95         status = "okay";
  96 };
  97
  98 &can2 {
  99         xceiver-supply = <&reg_can2_supply>;
 100         status = "okay";
 101 };
 102
 103 &gpio1 {
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_uart24_forceoff>;
 106
 107         /*
 108          * uart-2-4-on-x21-enable-hog enables the UART transceiver for Apalis
 109          * UART2 and UART3. If one wants to disable the transceiver force
 110          * the GPIO to output-low, if one wants to control the transceiver
 111          * from user space delete the hog node.
 112          */
 113         uart-2-4-on-x21-enable-hog {
 114                 gpio-hog;
 115                 gpios = <11 GPIO_ACTIVE_HIGH>; /* MXM3 180 */
 116                 output-high;
 117         };
 118 };
 119
 120 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
 121 &i2c1 {
 122         status = "okay";
 123
 124         /* M41T0M6 real time clock on carrier board */
 125         rtc_i2c: rtc@68 {
 126                 compatible = "st,m41t0";
 127                 reg = <0x68>;
 128         };
 129
 130         eeprom: eeprom@50 {
 131                 compatible = "atmel,24c02";
 132                 reg = <0x50>;
 133                 pagesize = <16>;
 134         };
 135 };
 136
 137 /*
 138  * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
 139  * board)
 140  */
 141 &i2c3 {
 142         status = "okay";
 143 };
 144
 145 &pcie {
 146         pinctrl-names = "default";
 147         pinctrl-0 = <&pinctrl_reset_moci>;
 148         /* active-high meaning opposite of regular PERST# active-low polarity */
 149         reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
 150         reset-gpio-active-high;
 151         status = "okay";
 152 };
 153
 154 &pwm1 {
 155         status = "okay";
 156 };
 157
 158 &pwm2 {
 159         status = "okay";
 160 };
 161
 162 &pwm3 {
 163         status = "okay";
 164 };
 165
 166 &pwm4 {
 167         status = "okay";
 168 };
 169
 170 &reg_usb_host_vbus {
 171         status = "okay";
 172 };
 173
 174 &reg_usb_otg_vbus {
 175         status = "okay";
 176 };
 177
 178 &sata {
 179         status = "okay";
 180 };
 181
 182 &sound_spdif {
 183         status = "okay";
 184 };
 185
 186 &spdif {
 187         status = "okay";
 188 };
 189
 190 &uart1 {
 191         status = "okay";
 192 };
 193
 194 &uart2 {
 195         status = "okay";
 196 };
 197
 198 &uart4 {
 199         status = "okay";
 200 };
 201
 202 &uart5 {
 203         status = "okay";
 204 };
 205
 206 &usbh1 {
 207         vbus-supply = <&reg_usb_host_vbus>;
 208         status = "okay";
 209 };
 210
 211 &usbotg {
 212         vbus-supply = <&reg_usb_otg_vbus>;
 213         status = "okay";
 214 };
 215
 216 /* MMC1 */
 217 &usdhc1 {
 218         pinctrl-names = "default", "sleep";
 219         pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>;
 220         pinctrl-1 = <&pinctrl_usdhc1_4bit_sleep &pinctrl_mmc_cd_sleep>;
 221         bus-width = <4>;
 222         cap-power-off-card;
 223         vmmc-supply = <&reg_3v3_vmmc>;
 224         status = "okay";
 225 };
 226
 227 &iomuxc {
 228         pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp {
 229                 fsl,pins = <
 230                         MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
 231                 >;
 232         };
 233
 234         pinctrl_enable_can1_power: enablecan1powergrp {
 235                 fsl,pins = <
 236                         MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
 237                 >;
 238         };
 239
 240         pinctrl_enable_can2_power: enablecan2powergrp {
 241                 fsl,pins = <
 242                         MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b0
 243                 >;
 244         };
 245
 246         pinctrl_uart24_forceoff: uart24forceoffgrp {
 247                 fsl,pins = <
 248                         MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0
 249                 >;
 250         };
 251
 252         pinctrl_leds_ixora: ledsixoragrp {
 253                 fsl,pins = <
 254                         MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
 255                         MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
 256                         MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
 257                         MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
 258                 >;
 259         };
 260
 261         pinctrl_mmc_cd_sleep: mmccdslpgrp {
 262                 fsl,pins = <
 263                          /* MMC1 CD */
 264                         MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0
 265                 >;
 266         };
 267
 268         pinctrl_usdhc1_4bit_sleep: usdhc1-4bitslpgrp {
 269                 fsl,pins = <
 270                         MX6QDL_PAD_SD1_CMD__SD1_CMD     0x3000
 271                         MX6QDL_PAD_SD1_CLK__SD1_CLK     0x3000
 272                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0  0x3000
 273                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1  0x3000
 274                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2  0x3000
 275                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3  0x3000
 276                 >;
 277         };
 278 };